JPS5920213B2 - stereo demodulation circuit - Google Patents

Description

[Detailed Description of the Invention] This invention is a PLL (Phase Locked L
The present invention relates to a stereo demodulation circuit of the .oop) system, and particularly to optimal control of a stereo switch circuit when switching between stereo and monaural.

FIG. 1 shows a conventional stereo/monaural switching circuit in a stereo demodulation circuit.

19 in the input composite signal to input terminal 2.
KHz pilot signal and PLL at input terminal 4.
An output frequency-divided signal of 19 KHz from the circuit, ie, a phase-locked loop, is applied, and the phase comparator 6 detects the synchronized state of both human forces.

When both human power signals are in a synchronous state, the output current of the phase comparator 6 flows through the resistor 8 of the low-pass filter 7.

At this time, since no output current flows through the resistor 10, the capacitor 1 externally connected to the external terminals 12 and 14 of the integrated circuit
6 is charged with the terminal 14 side being positive and the terminal 12 side being negative.

Therefore, the base potential of the transistor 220 becomes higher than the base potential of the transistor 20 of the differential amplifier 18, which functions to increase the collector current of the transistor 22 more than the current flowing to the collector of the current reversing transistor 24.

As a result, from the current flowing through the constant current source 260, the transistor 2
A current obtained by subtracting twice the collector current of 2 flows from the control circuit 28 into the transistor 22.

By drawing in this current, the control circuit 28 starts a control operation, a drive current is given to the stereo display element 30 consisting of an LED, a control signal is outputted from the output terminal 32 to a stereo switch circuit (not shown), and the stereo switch circuit is controlled.

The stereo/monaural switching circuit 34 includes a transistor 36.
, 38 and resistors 40, 42, and 44 are provided. When forcing the monaural state, a bias is applied to the terminal 46 to turn on the transistors 36 and 38, and the resistor 44
The base potential of the transistor 220 is shifted to a low potential via.

According to such a control method, the oscillation of the voltage controlled oscillator 48 stops instantaneously when the transistor 38 is in the on state, whereas the oscillation of the voltage controlled oscillator 48 stops instantaneously when the transistor 38 is in the on state. The base potential of the transistor 22 decreases with a delay time due to a discharge time constant determined by the resistor 44 of the circuit 34.

FIG. 2 shows the transition of this base potential. If the level indicated by B is the inversion operation level of the differential amplifier 18 when the transistor 36, 38 turns on at point A, there is a delay time indicated by T. become.

During this delay time T, since the control circuit 28 is in an operating state, an unbalanced switching signal is outputted from the stereo switch circuit to the demodulator, which causes abnormal sounds such as popping sounds.

That is, when performing the switching control on the input side of the differential amplifier 18, the delay time of the low-pass filter T causes disturbances in the output of the stereo demodulator when the stereo state is forcibly shifted to the monaural state. .

Furthermore, in order to eliminate the influence of the low-pass filter 7, if the switching control is performed on the output side of the differential amplifier 18, which does not have this influence, there will be an inconvenience when transitioning from the forced monaural state to the stereo state. occurs.

That is, before the PLL system reaches a stable state, the voltage controlled oscillator 4
Since the oscillation of 8 is started, there is a possibility that a malfunction may be induced in the transient state immediately after transition to the stereo state.

As described above, no matter which type of switching control is used, inconveniences occur immediately after switching from a stereo state to a forced monaural state or from a forced monaural state to a stereo state, and there is a need for practical improvements.

The present invention provides a stereo demodulation circuit that prevents the generation of abnormal sounds such as pop sounds caused by the stoppage of the voltage controlled oscillator of the phase-locked loop and the shift in stereo/monaural switching timing.

The present invention includes a low-pass filter that passes a phase comparison output between a switching signal and a pilot signal generated in a phase-locked loop in synchronization with a stereo composite signal, and a trigger circuit that controls the operation of a stereo switch circuit. In a stereo demodulation circuit comprising a differential amplifier whose operation is controlled by the output of a low-pass filter, one input bias level of the differential amplifier is switched in relation to a time constant of the low-pass filter, and the phase-locked loop A stereo/monaural switching circuit is installed to switch the operation of the voltage controlled oscillator, and when switching from a stereo state to a forced monaural state, the stereo switch circuit is rendered inactive at the same time as the voltage controlled oscillator stops operating, and the forced monaural state is set. The present invention is characterized in that, when switching from a state to a stereo state, the stereo switch circuit is brought into an operating state after a predetermined time delay from the start of operation of the voltage controlled oscillator due to a time constant of a low-pass filter.

Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings.

FIG. 3 shows an embodiment of the stereo demodulation circuit of the present invention.
An integrated circuit for LL type stereo demodulation is shown.

In the figure, an input composite signal input from an input terminal 50 is amplified by an input amplifier 52 and then compared with a feedback signal by a phase comparator 54.

The output of this phase comparator 54 passes through a low-pass filter 56 and a current amplifier 58, and becomes a control input of a voltage controlled oscillator 60.

The oscillation output of this voltage controlled oscillator 600 is divided by the frequency divider 62°64
The divided output of the frequency divider 64 is fed back to the phase comparator 54 and compared with the input terminal 500 Å power.

A PLL is created by a loop consisting of each of the above circuits 54 to 64.
system is configured.

Further, the output signals of the frequency dividers 62 and 640 are input to the frequency divider 66, and a signal synchronized with the pilot signal in the input composite signal is generated by the frequency divider 66.

The output signal of this frequency divider 66 is inputted from the input amplifier 52 to a phase comparator 68 .

The output signal of the phase comparator 68 is compared with a pilot signal and is input to a trigger circuit 72 via a low-pass filter 10.

This trigger circuit 72 is provided to control a stereo display element 74 and a stereo switch circuit 76, and this trigger circuit 72 includes a differential amplifier and a stereo display element and a stereo switch circuit in response to the output of the differential amplifier. A control circuit for controlling the operation of 76 is included.

That is, except for forced monaural state control, the trigger circuit 7
2 is input.

When the pilot signal level is sufficiently large, the stereo switch circuit 76 is controlled to be activated, and the demodulated switching signal output from the frequency divider 62 is input to the demodulator 78.

In this state, the right signal output terminal 80R of the demodulator 78
The right and left signals are individually output from the left signal output terminal 80L.

An input terminal 82 is a control input terminal for forced monaural control, and a control circuit 84 is operated by the control input applied to this terminal 82.

This operation activates the stereo/monaural switching circuit 86.

This stereo/monaural switching circuit 86 is provided to control the stereo demodulation state to a forced monaural state in response to a control input input to the input terminal 82.

At the time of this monaural switching, the differential amplifier of the trigger circuit 72 and the voltage controlled oscillator 60 are controlled to be inactive.

The input terminal 88 is a control input terminal for λM switching, and the AM switching device 90 is operated by the control input given to this terminal 88, and the voltage controlled oscillator 60 and the trigger circuit 7 are activated when switching rocks.
2 differential amplifiers as well as the no-cut device 92 are deactivated.

Note that the bicut device 92 is provided to cut high-frequency components in the monaural output signal to reduce auditory noise.

FIG. 4 shows a specific example of the circuit configuration of the stereo/monaural switching circuit 86.

In the figure, the input terminal 102 is connected to the input amplifier 52.
A 9 KHz pilot signal is provided, and a 19 KHz O frequency-divided signal is provided to the input terminal 104 from the frequency divider 66.

The synchronized state of the meat input is detected by a phase comparator 68, and the output of this phase comparator 68 is input to a low-pass filter 70 composed of resistors 108, 110 and a capacitor 116 externally connected to external terminals 112, 114. .

The output of this low-pass filter 70 is input to the differential amplifier 11B of the trigger circuit 72 via a resistor 96.98 which is means for controlling the operating level of the differential amplifier 118.

The differential amplifier 118 is a transistor 120°122.12
4 and a constant current source 126.

Control circuit 1 controlled by operation of transistor 124
The output of 28 is input to a display element 74 and a stereo switch circuit 76.

The stereo/monaural switching circuit 86 includes a transistor 1.
36, 138 and resistors 140, 142° 144, this switch circuit 1
00 may be controlled to be in the on state by the bias applied to the terminal 146 during forced monaural switching.

That is, the collector of the transistor 136 is connected to the base of the transistor 122 via a resistor 144, and the transistor 122 is turned off when the transistor 136 is turned on.

On the other hand, the output generated by switching the transistor 138 serves as a control input for the voltage controlled oscillator 600.

With the above configuration, when switching from a stereo state to a forced monaural state, when a control input for switching is given to the input terminal 82 and a bias is given to the terminal 146 based on this, the switch circuit 100 is turned on. becomes.

That is, both transistors 136 and 138 are turned on, and when transistor 138 is turned on, the voltage controlled oscillator 6
0 is instantly controlled to the inactive state.

At this time, since the collector of the transistor 136 is almost at ground potential when the transistor 136 is on, the base potential of the transistor 122 instantly drops to the divided potential of the resistor 98°144, and this potential is applied to the low-pass filter 70. After that, it will decrease exponentially.

In this embodiment, the divided potential of the resistor 98.degree. 144 is set to a potential at which the differential amplifier 118 is rendered inoperative by the insertion of the resistor 98 and its resistance value.

Therefore, at the same time as the transistor 136 turns on, a stop control signal is applied to the stereo switch circuit 76 via the control circuit 128, and the stereo switch circuit γ6 is controlled to be inactive at the same time as the voltage controlled oscillator 60 stops oscillating. Ru.

FIG. 5 shows the transition of the base potential of the transistor 1220, where A is the point in time when the stereo state switches to the monaural state;
B is the level at which the differential amplifier 118 switches to an inactive state;
Further, Vo is the divided potential of the resistor 98°114.

When switching to the forced monaural state in this way, there is no delay in stopping the stereo switch circuit 76, so that abnormal sounds such as pops due to disturbances in the demodulated output are prevented from occurring.

Further, when the forced monaural state is canceled to control the stereo state, that is, when the bias application to the terminal 146 is canceled, the transistors 136 and 138 are simultaneously turned off.

When transistor 138 is turned off, voltage controlled oscillator 60 is instantaneously activated.

In this case, even if the transistor 136 is turned off, the base potential of the transistor 1220 remains at the low-pass filter 7.
The charging potential of the capacitor 2116 of 0 is maintained at a potential at which the differential amplifier 118 is turned off.

That is, transistor 136 in a forced mono state.
In the on state, since the capacitor 116 of the low-pass filter 70 is charged with the terminal 112 being positive and the terminal 114 being negative, the differential amplifier 118 is turned on after a delay time due to charging of the capacitor 116.

If the forced monaural state is released at the 0 point shown in FIG. 5, the potential of the transistor 122 rises exponentially, and there is a delay time T before the differential amplifier 118 turns on. .

As a result, the stereo switch circuit 16 returns to the operating state after a time T from the start of oscillation of the voltage controlled oscillator 60.

Therefore, after the forced monaural state is released, the stereo switch circuit 76 operates in a state where the PLL system is sufficiently stable, thereby preventing the demodulator 78 from malfunctioning when the PLL system is in an unstable state.

According to the circuit of this embodiment, a resistance of 96.98 mm is added to the conventional circuit.
The stereo switch circuit can be optimally controlled with an extremely simple configuration, and can be manufactured and provided at low cost because it can be easily integrated into an IC.

As explained above, according to the present invention, when switching between the stereo state and the forced monaural state, when switching from the former to the latter, the stereo switch circuit is controlled in addition to controlling the inactive state of the voltage controlled oscillator. The stereo switch circuit is controlled to be in the inactive state instantaneously, and when switching from the latter to the former, the stereo switch circuit is controlled to be in the active state after a certain period of time delay from the return of the voltage controlled oscillator to the operating state, so the stereo switch circuit is in the optimal state. As a result, it is possible to prevent abnormal sounds from occurring when switching between stereo and monaural.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional stereo/monaural switching circuit.
FIG. 2 is an explanatory diagram showing its operation, FIG. 3 is a block diagram of a stereo demodulation circuit, and FIG. 4 is a circuit diagram showing a specific circuit configuration example of a stereo/monaural switching circuit in the stereo demodulation circuit of the present invention. FIG. 5 is an explanatory diagram showing its operation. 70...Low pass filter, 76...
Stereo switch circuit, 86... Stereo/monaural switching circuit, 96, 98... Resistor, 100
...Switch circuit.

Claims (1)

[Claims] 1. A low-pass filter that passes the phase comparison output of a switching signal and a pilot signal generated in a phase-locked loop in synchronization with a stereo composite signal, and a low-pass filter that is installed in a trigger circuit that controls the operation of the stereo switch circuit and that is connected to the low-pass filter. A stereo demodulation circuit is provided with a differential amplifier whose operation is controlled by the output. A stereo/monaural switching circuit is installed to switch the operation of the voltage controlled oscillator, and when switching from a stereo state to a forced monaural state, the stereo switch circuit is rendered inactive at the same time as the voltage controlled oscillator stops operating, and the forced monaural state is set. 1. A stereo demodulation circuit characterized in that when switching from a stereo state to a stereo state, the stereo switch circuit is brought into an operating state with a delay of a certain period of time from the start of operation of the voltage controlled oscillator according to a time constant of the low-pass filter.