JPS5920031A - デ−タ転送装置 - Google Patents

デ−タ転送装置

Info

Publication number
JPS5920031A
JPS5920031A JP12925282A JP12925282A JPS5920031A JP S5920031 A JPS5920031 A JP S5920031A JP 12925282 A JP12925282 A JP 12925282A JP 12925282 A JP12925282 A JP 12925282A JP S5920031 A JPS5920031 A JP S5920031A
Authority
JP
Japan
Prior art keywords
command
circuit
data transfer
channels
chaining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12925282A
Other languages
English (en)
Japanese (ja)
Other versions
JPS622349B2 (enrdf_load_stackoverflow
Inventor
Shuji Hisanaga
久永 修司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12925282A priority Critical patent/JPS5920031A/ja
Publication of JPS5920031A publication Critical patent/JPS5920031A/ja
Publication of JPS622349B2 publication Critical patent/JPS622349B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP12925282A 1982-07-23 1982-07-23 デ−タ転送装置 Granted JPS5920031A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12925282A JPS5920031A (ja) 1982-07-23 1982-07-23 デ−タ転送装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12925282A JPS5920031A (ja) 1982-07-23 1982-07-23 デ−タ転送装置

Publications (2)

Publication Number Publication Date
JPS5920031A true JPS5920031A (ja) 1984-02-01
JPS622349B2 JPS622349B2 (enrdf_load_stackoverflow) 1987-01-19

Family

ID=15004966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12925282A Granted JPS5920031A (ja) 1982-07-23 1982-07-23 デ−タ転送装置

Country Status (1)

Country Link
JP (1) JPS5920031A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62247443A (ja) * 1986-03-20 1987-10-28 Fujitsu Ltd チヤネル制御方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62247443A (ja) * 1986-03-20 1987-10-28 Fujitsu Ltd チヤネル制御方式

Also Published As

Publication number Publication date
JPS622349B2 (enrdf_load_stackoverflow) 1987-01-19

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