JPS59195987U - High voltage power supply overshoot suppression circuit - Google Patents

High voltage power supply overshoot suppression circuit

Info

Publication number
JPS59195987U
JPS59195987U JP8566883U JP8566883U JPS59195987U JP S59195987 U JPS59195987 U JP S59195987U JP 8566883 U JP8566883 U JP 8566883U JP 8566883 U JP8566883 U JP 8566883U JP S59195987 U JPS59195987 U JP S59195987U
Authority
JP
Japan
Prior art keywords
voltage
signal
high voltage
circuit
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8566883U
Other languages
Japanese (ja)
Other versions
JPS642546Y2 (en
Inventor
根本 数実
荻原 一行
Original Assignee
澤藤電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 澤藤電機株式会社 filed Critical 澤藤電機株式会社
Priority to JP8566883U priority Critical patent/JPS59195987U/en
Publication of JPS59195987U publication Critical patent/JPS59195987U/en
Application granted granted Critical
Publication of JPS642546Y2 publication Critical patent/JPS642546Y2/ja
Granted legal-status Critical Current

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  • Dc-Dc Converters (AREA)
  • Power Conversion In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は来者案稈係る高電圧電源のオーバシュート抑止
回路の1実施例、第2図は従来のデッドタイムコントロ
ール端子9により高電圧を発生させた場合のオシロスコ
ープの波形、第3図は本考案のオシロスコープの波形を
示す。 1は本考案に係る高電圧電源のオーバシュート抑止回路
、2はスイッチングレギュレータコントロール用ICl
3はスイッチング回路、4は昇圧トランス、7は分圧回
路、8は電流検出抵抗、9はデッドタイムコントロール
端子、A、A′ハ高電圧波形、B、 B’は比較器出力
電圧波形である。
Fig. 1 shows an example of the overshoot suppression circuit for a high voltage power supply according to the visitor's proposal, Fig. 2 shows the waveform of an oscilloscope when a high voltage is generated by the conventional dead time control terminal 9, and Fig. 3 shows the waveform of an oscilloscope. The waveforms of the oscilloscope of the present invention are shown. 1 is an overshoot suppression circuit for a high voltage power supply according to the present invention, and 2 is an ICl for controlling a switching regulator.
3 is a switching circuit, 4 is a step-up transformer, 7 is a voltage divider circuit, 8 is a current detection resistor, 9 is a dead time control terminal, A and A' are high voltage waveforms, and B and B' are comparator output voltage waveforms. .

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電圧制御型パルス発振器と、該発振器からの信号を増幅
する増幅手段と、該増幅手段からの信号により電源に接
続されよトランスの1次側電流をスイッチング制御する
スイッチング手段と、該スイッチング電流により生じた
電圧を昇圧する電圧昇圧手段と、該電圧昇圧手段からの
高電圧を整流する整流手段と、該整流手段により整流さ
れた電圧を平滑にする平滑手段と、該平滑にされた電圧
を分圧し検出する電圧検出手段と、該電圧検出手段から
の検出電圧を基準電圧と比較する比較手段と、該比較手
段からの差分を前記電圧制御型パルス発振器に負帰還し
たことからなる高電圧電源において、外部から高電圧出
力の発生・阻止を制御する外部制御端子を有し、該外部
制御端子からの高電圧発生信号にもとづきスイッチング
用のパルス電圧を発生させる信号をデッドタイムコント
ロール端子に供給する回路と、前記電圧検出手段からの
信号に重畳していた信号を徐々に減少させる回路とを備
えると共に、前記外部制御端子からの高電圧阻止信号に
もとづき前記電圧検出手段からの信号に所定の信号を重
畳させる回路とを有することを特徴とする高電圧電源の
オーバシュート抑止回路。
a voltage-controlled pulse oscillator; an amplifying means for amplifying a signal from the oscillator; a switching means for controlling switching of a primary current of a transformer connected to a power supply by a signal from the amplifying means; a voltage boosting means for boosting the high voltage, a rectifying means for rectifying the high voltage from the voltage boosting means, a smoothing means for smoothing the voltage rectified by the rectifying means, and a voltage dividing means for dividing the smoothed voltage. A high voltage power supply comprising a voltage detecting means for detecting, a comparing means for comparing the detected voltage from the voltage detecting means with a reference voltage, and a difference from the comparing means being negatively fed back to the voltage controlled pulse oscillator, A circuit having an external control terminal for externally controlling generation and blocking of high voltage output, and supplying a signal to a dead time control terminal to generate a pulse voltage for switching based on a high voltage generation signal from the external control terminal. , a circuit that gradually reduces a signal superimposed on the signal from the voltage detection means, and superimposes a predetermined signal on the signal from the voltage detection means based on a high voltage blocking signal from the external control terminal. 1. An overshoot suppression circuit for a high voltage power supply, characterized in that the circuit has a circuit for suppressing overshoot.
JP8566883U 1983-06-03 1983-06-03 High voltage power supply overshoot suppression circuit Granted JPS59195987U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8566883U JPS59195987U (en) 1983-06-03 1983-06-03 High voltage power supply overshoot suppression circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8566883U JPS59195987U (en) 1983-06-03 1983-06-03 High voltage power supply overshoot suppression circuit

Publications (2)

Publication Number Publication Date
JPS59195987U true JPS59195987U (en) 1984-12-26
JPS642546Y2 JPS642546Y2 (en) 1989-01-20

Family

ID=30215631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8566883U Granted JPS59195987U (en) 1983-06-03 1983-06-03 High voltage power supply overshoot suppression circuit

Country Status (1)

Country Link
JP (1) JPS59195987U (en)

Also Published As

Publication number Publication date
JPS642546Y2 (en) 1989-01-20

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