JPS5915134U - Voltage stabilization circuit with reset signal generation function - Google Patents
Voltage stabilization circuit with reset signal generation functionInfo
- Publication number
- JPS5915134U JPS5915134U JP10924782U JP10924782U JPS5915134U JP S5915134 U JPS5915134 U JP S5915134U JP 10924782 U JP10924782 U JP 10924782U JP 10924782 U JP10924782 U JP 10924782U JP S5915134 U JPS5915134 U JP S5915134U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- smoothing circuit
- reset signal
- signal generation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のリセット信号発生機能付直流電圧安定化
回路を説明するためのブロック図、第2図はその動作を
説明するための波形図、第3図はこの考案の一実施例を
示すブロック図、第4図はその動作を説明するための波
形図である。
1:商用電源、2:電源スィッチ、4:主整流平滑回路
、5:直流電圧安定化回路、8:コンデンサ、11ニレ
ベル検出回路、12:副整流平滑回路、13:誤差増幅
器、14:基準電圧発生回路、18:スイッチ素子。
補正 昭57.10.30
実用新案登録請求の範囲、図面の簡単な説明を次のよう
に補正する。
O実用新案登録請求の範囲
A 主整流平滑回路と、
B この主整流平滑回路の平滑出力電圧より高い電圧を
出力I7、電源オフ時に主整流平滑回路の電圧低下速度
より遅い速度で出力電圧が低下するように平滑回路の時
定数の負荷電流の関係が設定された副整流平滑回路と、
Cこの副整流平滑回路の出力電圧により一定の基準電圧
を発生する基準電圧発生回路と、D この基準電圧発生
回路から出力される基準電圧を利用して上記主整流平滑
回路の出力電圧を安定化する電圧安定化回路と、
E この電圧安定化回路に用いられる誤差増幅器の出力
電圧が所定値より大きいときにオンに制御されるスイッ
チ素子と、
F このスイッチ素子により充電電圧が急速放電される
コンデンサと、
G このコンデンサの電圧が所信以下にあることを検出
してリセット信号を発生するレベル検出回路と、
から成るリセット信号発生機能付電圧安定化回路。
図面の簡単な説明“
第1図は従来のリセット信号発生機能付直流電圧安定化
回路を説明するためのブロック図、第2図はその動作を
説明するための波形図、第3図はこの考案の一実施例を
示すブロック図、第4図はその動作を説明するための波
形図である。
1:商用電源、2:電源スィッチ、4:主整流平滑回路
、5:直流電圧安定化回路、8:コンデンサ、11ニレ
ベル検出回路、12:副整流平滑回路、13:誤差増幅
器、14:基準電圧発生回路、18:スイッチ素子。Fig. 1 is a block diagram for explaining a conventional DC voltage stabilization circuit with a reset signal generation function, Fig. 2 is a waveform diagram for explaining its operation, and Fig. 3 shows an embodiment of this invention. The block diagram and FIG. 4 are waveform diagrams for explaining the operation. 1: Commercial power supply, 2: Power switch, 4: Main rectifier smoothing circuit, 5: DC voltage stabilization circuit, 8: Capacitor, 11 Two-level detection circuit, 12: Sub-rectifier smoothing circuit, 13: Error amplifier, 14: Reference voltage Generation circuit, 18: switch element. Amendment October 30, 1982 The claims for utility model registration and the brief description of the drawings are amended as follows. O Utility Model Registration Claims A: A main rectifier and smoothing circuit, and B: Outputs a voltage higher than the smoothed output voltage of the main rectifier and smoothing circuit, and when the power is turned off, the output voltage decreases at a slower rate than the voltage drop rate of the main rectifier and smoothing circuit. A sub-rectifying and smoothing circuit in which the relationship between the time constant and load current of the smoothing circuit is set to a voltage stabilizing circuit that stabilizes the output voltage of the main rectifying and smoothing circuit using the reference voltage output from the generating circuit; F a capacitor whose charging voltage is rapidly discharged by this switch element; G a level detection circuit that detects that the voltage of this capacitor is below a desired level and generates a reset signal; Voltage stabilization circuit with reset signal generation function. Brief explanation of the drawings: “Figure 1 is a block diagram for explaining a conventional DC voltage stabilization circuit with a reset signal generation function, Figure 2 is a waveform diagram for explaining its operation, and Figure 3 is a diagram for explaining the conventional DC voltage stabilization circuit with reset signal generation function. FIG. 4 is a waveform diagram for explaining the operation. 1: Commercial power supply, 2: Power switch, 4: Main rectifier smoothing circuit, 5: DC voltage stabilization circuit, 8: Capacitor, 11 Two-level detection circuit, 12: Sub-rectification smoothing circuit, 13: Error amplifier, 14: Reference voltage generation circuit, 18: Switch element.
Claims (1)
出力し、電源オフ時に主整流平滑回路の電圧低下速度よ
り遅い速度で出力電圧が低下するように平滑回路の時定
数の負荷電流の関係が設定された副整流平滑回路と、 Cこの副整流平滑回路の出力電圧により一定の基準電圧
を発生する基準電圧発生回路と、D この基準電圧発生
回路から出力される基準電圧を利用して上記主整流平滑
回路の出力電圧を安定化する電圧安定化回路と、 E この電圧安定化回路に用いられる誤差増幅器の出力
電圧によって制御され、電源の投入及び断時にオンに制
御されるスイッチ素子と、F このスイッチ素子により
充電電圧が急速放電されるコンデンサと、 G このコンデンサの電圧が断値以下にあることを検出
してリセット信号を発生するレベル検出−回路と、 から成るリセット信号発生機能付電圧安定化回路。[Claims for Utility Model Registration] A: A main rectifier and smoothing circuit; B: A voltage higher than the smoothed output voltage of the main rectifier and smoothing circuit, and when the power is turned off, the output voltage is lower than the voltage drop rate of the main rectifier and smoothing circuit. A sub-rectifying and smoothing circuit in which the relationship between the time constant of the smoothing circuit and the load current is set to decrease; C a reference voltage generation circuit that generates a constant reference voltage from the output voltage of this sub-rectifying and smoothing circuit; and D this reference. a voltage stabilizing circuit that stabilizes the output voltage of the main rectifying and smoothing circuit using the reference voltage output from the voltage generating circuit; F is a capacitor whose charging voltage is rapidly discharged by this switch element; G is a capacitor that detects that the voltage of this capacitor is below the cut-off value and generates a reset signal. A voltage stabilization circuit with a reset signal generation function, consisting of a level detection circuit and a reset signal generation function.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10924782U JPS5915134U (en) | 1982-07-19 | 1982-07-19 | Voltage stabilization circuit with reset signal generation function |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10924782U JPS5915134U (en) | 1982-07-19 | 1982-07-19 | Voltage stabilization circuit with reset signal generation function |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5915134U true JPS5915134U (en) | 1984-01-30 |
JPH0219856Y2 JPH0219856Y2 (en) | 1990-05-31 |
Family
ID=30254561
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10924782U Granted JPS5915134U (en) | 1982-07-19 | 1982-07-19 | Voltage stabilization circuit with reset signal generation function |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5915134U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02213219A (en) * | 1989-02-14 | 1990-08-24 | Matsushita Electric Ind Co Ltd | Logic circuit having reset pulse generating function |
-
1982
- 1982-07-19 JP JP10924782U patent/JPS5915134U/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02213219A (en) * | 1989-02-14 | 1990-08-24 | Matsushita Electric Ind Co Ltd | Logic circuit having reset pulse generating function |
Also Published As
Publication number | Publication date |
---|---|
JPH0219856Y2 (en) | 1990-05-31 |
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