JPS59188925A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS59188925A
JPS59188925A JP6301083A JP6301083A JPS59188925A JP S59188925 A JPS59188925 A JP S59188925A JP 6301083 A JP6301083 A JP 6301083A JP 6301083 A JP6301083 A JP 6301083A JP S59188925 A JPS59188925 A JP S59188925A
Authority
JP
Japan
Prior art keywords
oxygen
carbon
substrate
concentration
degree
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6301083A
Other languages
Japanese (ja)
Inventor
Tatsuichi Ko
高 辰一
Jiro Oshima
次郎 大島
Masayasu Abe
正泰 安部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP6301083A priority Critical patent/JPS59188925A/en
Publication of JPS59188925A publication Critical patent/JPS59188925A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Abstract

PURPOSE:To enhance mechanical strength of a substrate, and to contrive to stabilize the manufacturing process of a semiconductor device by a method wherein carbon ions having high energy of the prescribed value or more are implanted for formation of oxygen depositing nuclei in the substrate to provide oxygen deposited layers to depend upon carbon distributing concentration. CONSTITUTION:A substrate 1 having the degree of 4X10<17>cm<-3> of interlattice oxygen concentration and the degree of 1-3X10<15>cm<-3> of carbon concentration in a crystal, and distributed inside uniformly together with oxygen 2 and carbon is prepared. Then high energy carbon implantation is performed, implantation of carbon atoms 11 is performed by 4MeV, 5X10<13>cm<-3>, peak concentration thereof is the degree of 1X10<18>cm<-3>, the peak exists at the distance of the degree of 5mum from the surface, half-width is 0.2mum, and a buried type carbon implanted layer is formed. Moreover when heat treatment is performed at 1,200 deg.C for the degree of two hours, the implanted carbons act as oxygen depositing nuclei to form buried type oxygen deposited layers (defect layers) according to oxygen deposits, and complete crystal regions 13 having lower oxygen concentration at the shallower region and at the region deeper than the carbon implanted layer, and having the extremely small amount of defects are formed.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は半導体装置の製造方法にかかシ、特に半導体
基板の活性層完全結晶化に関するもので、高密度集積回
路に適用される。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method of manufacturing a semiconductor device, and particularly relates to complete crystallization of an active layer of a semiconductor substrate, and is applied to high-density integrated circuits.

〔発明の背景技術〕[Background technology of the invention]

従来、半導体基板活性層完全結晶化の手段として主にイ
ンドリシック・ゲッタリング(IQ)法、裏面欠陥法な
どが用いられていた。
Conventionally, the indolithic gettering (IQ) method, the back surface defect method, and the like have been mainly used as means for completely crystallizing the active layer of a semiconductor substrate.

上記IG法は第1図ないし第3図に示すように、まず、
酸素含有量が固溶度以上に多い結晶シリコン基板(1)
(以降基板と略称)を用意する(第1図)。
As shown in Figures 1 to 3, the above IG method first involves the following steps:
Crystalline silicon substrate with oxygen content higher than solid solubility (1)
(hereinafter abbreviated as substrate) is prepared (Fig. 1).

なお、図における(2)は基板中に存在する酸素を示す
。次に、低温長時間の第1段熱処理を一例の700℃に
て48時間施し、基板中に欠陥となる酸素析出物(3)
を形成する(第2図)。ついで、高温長時間の第2段熱
処理を一例として1100℃で4時間施し基板表面の酸
素を逐い出し表面層に完全結晶層(4)を形成する(第
3図)。
Note that (2) in the figure indicates oxygen present in the substrate. Next, a first stage heat treatment for a long time at a low temperature is performed at 700°C for 48 hours, and oxygen precipitates (3) which become defects in the substrate are formed.
(Figure 2). Next, a second stage heat treatment at a high temperature and a long period of time is performed at, for example, 1100° C. for 4 hours to drive out oxygen from the substrate surface and form a perfectly crystalline layer (4) on the surface layer (FIG. 3).

斜上のIG処理を施した基板においては、その後の工程
で不所望に基板に入った重金属が基板内部の欠陥にゲッ
タリングされるため、完全結晶層を保存することができ
る。
In a substrate subjected to the tilted IG process, heavy metals that have undesirably entered the substrate in subsequent steps are gettered to defects inside the substrate, so that a perfectly crystalline layer can be preserved.

次の裏面欠陥法は欠陥を生成する不純物を基板の裏面か
ら機械的に、または拡散等によシ導入し、その欠陥(5
)をゲッタリング・サイトとして用いている(第4図)
In the next backside defect method, impurities that generate defects are introduced mechanically or by diffusion from the backside of the substrate.
) is used as a gettering site (Figure 4)
.

〔背景技術の問題点〕[Problems with background technology]

IG処理された半導体基板は表面の薄い層を除くすべて
が高密度の酸素析出物を含む欠陥層であシ、機械的強度
がきわめて低い。このため、基板処理工程での割れやチ
ッピングが多発し、製品歩留を著るしく悪くする。IG
処理後の基板中の酸素濃度は、第5図に示す酸素濃度分
布図に見られるように補誤差関数状の分布に々る。この
分布の深さはIG処理の第2段熱処理時間、IG処理後
の熱履歴によって変化を生ずる。また、深い素子を形成
すると接合の近傍の酸素濃度は高くなυ素子の特性に悪
影響をおよぼす。これを防ぐためには極めて長時間にわ
たる第2段熱処理を施す必要がある。
The IG-treated semiconductor substrate has a defective layer containing high-density oxygen precipitates except for a thin layer on the surface, and has extremely low mechanical strength. For this reason, cracking and chipping occur frequently during the substrate processing process, significantly reducing product yield. I.G.
The oxygen concentration in the substrate after processing follows a distribution in the form of a complementary error function, as seen in the oxygen concentration distribution diagram shown in FIG. The depth of this distribution varies depending on the second stage heat treatment time of the IG treatment and the thermal history after the IG treatment. Furthermore, when a deep element is formed, the oxygen concentration near the junction is high, which adversely affects the characteristics of the υ element. In order to prevent this, it is necessary to perform a second stage heat treatment for an extremely long time.

裏面欠陥法はIG法と異なシ核生成を行なわず、導入さ
れた欠陥によるゲラクリング効果を利用するもので、欠
陥導入後に行なわれる熱処理によシ欠陥が回復し十分な
効果が得られない欠点がある。
Unlike the IG method, the back surface defect method does not perform nucleation, but instead utilizes the Gerakling effect caused by the introduced defects, and has the drawback that the heat treatment performed after introducing the defects recovers the defects, making it impossible to obtain a sufficient effect. be.

〔発明の目的〕[Purpose of the invention]

この発明は上記従来の欠点を改良するために、機械的に
充分な強度を保つとともに熱的に安定なIG処理法によ
り半導体集積回路の安定化をはかることを目的として開
発された半導体装置の製造方法を提供する。
In order to improve the above-mentioned conventional drawbacks, this invention has been developed to manufacture a semiconductor device with the aim of stabilizing a semiconductor integrated circuit using an IG processing method that maintains sufficient mechanical strength and is thermally stable. provide a method.

〔発明の概要〕[Summary of the invention]

この発明は半導体基板に高エネルギ炭素イオン注入を施
し注入炭素分布濃度に依存した酸素析出層を設け、これ
をゲッタリング・サイトとして表層に酸素濃度の安定し
て低い完全結晶層を形成する。
This invention implants high-energy carbon ions into a semiconductor substrate to form an oxygen precipitated layer depending on the implanted carbon distribution concentration, and uses this as a gettering site to form a perfectly crystalline layer with a stable and low oxygen concentration on the surface layer.

〔発明の実施例〕[Embodiments of the invention]

次にこの発明を1実施例につき図面を参照して詳細に説
明する。まず、基板(’1)を用意する(第1図)。こ
の基板(1)は結晶中の格子間酸素濃度は通常のIG用
結晶よシも低い4×1017crn−3程度、また、炭
素濃度は1〜3 X IQ”cm−2程度であシ、これ
らの基板内の分布は第8図に酸素の濃度を線(0)で、
また、炭素の濃度を線(C)で夫々示す。このような初
期状態では酸素、炭素ともに基板内で均一に分布してい
る。
Next, one embodiment of the present invention will be explained in detail with reference to the drawings. First, a substrate ('1) is prepared (Fig. 1). The interstitial oxygen concentration in the crystal of this substrate (1) is about 4 x 1017 crn-3, which is lower than that of ordinary IG crystals, and the carbon concentration is about 1 to 3 x IQ" cm-2. The distribution in the substrate is shown in Figure 8, where the oxygen concentration is indicated by the line (0),
Further, the concentration of carbon is shown by a line (C). In such an initial state, both oxygen and carbon are uniformly distributed within the substrate.

次に、高エネルギ炭素イオン注入を施した後の状態を第
6図に示す。図において、aυは注入炭素原子で、注入
は4 Men、 5 X 10”α−2で施した。その
ピークの濃度はl x IQ”m−”程度、また、注入
ピークは表面から51tm程旋のところにあシ、半値幅
は0.2μm程度で、第9図に第8図と同様の表わし方
で示したように埋込み型の炭素注入層が形成されている
ことが判る。
Next, FIG. 6 shows the state after high-energy carbon ion implantation. In the figure, aυ is the implanted carbon atom, and the implantation was performed at 4 Men, 5 × 10" α-2. The peak concentration was about l x IQ "m-", and the implantation peak was about 51 tm rotation from the surface. However, the half width is about 0.2 μm, and it can be seen that a buried carbon injection layer is formed as shown in FIG. 9 using the same representation as FIG. 8.

次に、1200℃で2時間程度の熱処理を施して第7図
に示すように、注入された炭素が酸素核出核となシ酸素
析出物(12+による埋込み型酸素析出層(欠陥層)が
形成され、炭素注入層より浅い領域および深い領域如酸
素濃度が低く、かつ、欠陥量の極めて少ない領域である
完全結晶領域■が形成される。さらに、上記を第10図
に第8図と同様の表わし方で示し、図中に破線で示した
初期状態の酸素の分布からみて炭素注入の効果が明確に
判る。
Next, heat treatment was performed at 1200°C for about 2 hours, and as shown in Figure 7, the implanted carbon became oxygen nucleates and oxygen precipitates (12+) formed a buried oxygen precipitate layer (defect layer). A perfectly crystalline region (2) is formed, which is a region shallower and deeper than the carbon implanted layer, where the oxygen concentration is lower and the amount of defects is extremely small.Furthermore, the above is shown in FIG. The effect of carbon injection is clearly seen from the distribution of oxygen in the initial state shown by the broken line in the figure.

すなわち、斜上により酸素析出層は拡散定数の小さい炭
素を核としているため極めて安定であシ、重金属イオン
等のゲッタサイトとして有効に作用するものである。
That is, due to the upward slope, the oxygen precipitated layer is extremely stable because its core is carbon, which has a small diffusion constant, and effectively acts as a getter site for heavy metal ions and the like.

〔発明の効果〕・ この発明によれば、従来のIG基板と異カリ高濃度欠陥
層を0.5μm程度のきわめて薄い埋込層としたため機
械的強度が高くなシ、工程における割れなどの事故が減
少した。
[Effects of the invention]- According to this invention, the conventional IG substrate and the foreign potassium high concentration defect layer are made into an extremely thin buried layer of about 0.5 μm, so mechanical strength is high and accidents such as cracks in the process are avoided. decreased.

次に、熱的に安定な酸素析出核を有するため、基板表面
の完全結晶層がきわめて安定であシ、第11図に示すよ
うに完全結晶層中の酸素濃度を低くすることができた。
Next, since it has thermally stable oxygen precipitation nuclei, the perfect crystal layer on the surface of the substrate is extremely stable, and the oxygen concentration in the perfect crystal layer can be lowered as shown in FIG. 11.

図には追加熱処理温度との相関につき、従来を破線で示
した。また、基板表面からの深さとの相関を第12図に
従来(破線表示)と比較して示した。さらに斜上は第1
3図に示すよりに、酸素析出核をイオン注入法で形成す
ることによって出発基板中の酸素濃度を低減させること
ができたことにも依ることが明らかである。
In the figure, the relationship with the additional heat treatment temperature is shown by a broken line. Further, the correlation with the depth from the substrate surface is shown in FIG. 12 in comparison with the conventional method (indicated by a broken line). Further up the slope is the first
As shown in FIG. 3, it is clear that this is due to the fact that the oxygen concentration in the starting substrate could be reduced by forming oxygen precipitation nuclei by ion implantation.

次に、従来のIG法においては酸素析出核形成のため長
時間の低温熱処理を必要としたが、この発明を用いるこ
とによシ高温での第2段熱処理のみで済み生産性の面で
の向上も顕著なものがある。
Next, in the conventional IG method, long-term low-temperature heat treatment was required to form oxygen precipitate nuclei, but by using this invention, only the second stage heat treatment at high temperature is required, which improves productivity. There are also notable improvements.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は基板の断面図、第2図および第3図は基板に対
する従来のIG法による工程中の基板の断面図、第4図
は裏面欠陥法による基板の断面図、第5図は基板中の酸
素濃度分布を示す線図、第6図および第7図は1実施例
の製造方法による工程中の基板の断面図、第8図は第1
図に示した状態の基板中の酸素と炭素の濃度を示す線図
、第9図は第6図に示した状態の基板中の酸素と炭素と
の濃度を示す線図、第10図は第7図に示した状態の基
板の基板中の酸素と炭素との濃度を示す線図、第11図
FiIG後に施す熱処理による完全結晶領域中での酸素
濃度の変化につき従来と比較して示す線図、第12図は
深さ方向に対するIG基板中の酸素濃度を示す線図、第
13図は酸素析出領域における結晶中酸素濃度に対する
析出酸素量の変化を示す線図である。 1     基板 2     基板中の酸素 4     完全結晶層 11      注入炭素原子 12     酸素析出物 13、    完全結晶領域 代理人 弁理士 井 上 −男 第  1  図 第  2  因 第  5  図 第  6  図 第  7  図 第8図 7ハー 第  9  図 虎、〜− 第10図 第1図 第12図 第13図 ル唾鵬+輸態−
Fig. 1 is a cross-sectional view of the substrate, Figs. 2 and 3 are cross-sectional views of the substrate during the process using the conventional IG method, Fig. 4 is a cross-sectional view of the substrate using the back side defect method, and Fig. 5 is the substrate. 6 and 7 are cross-sectional views of the substrate during the process according to the manufacturing method of the first embodiment, and FIG. 8 is a diagram showing the oxygen concentration distribution in the substrate.
Figure 9 is a diagram showing the concentration of oxygen and carbon in the substrate in the state shown in Figure 6. Figure 10 is a diagram showing the concentration of oxygen and carbon in the substrate in the state shown in Figure 6. A diagram showing the concentration of oxygen and carbon in the substrate of the substrate in the state shown in Figure 7, and Figure 11 A diagram showing the change in oxygen concentration in the perfect crystal region due to heat treatment performed after FiIG compared with the conventional one. , FIG. 12 is a diagram showing the oxygen concentration in the IG substrate in the depth direction, and FIG. 13 is a diagram showing the change in the amount of precipitated oxygen with respect to the oxygen concentration in the crystal in the oxygen precipitated region. 1 Substrate 2 Oxygen in the substrate 4 Perfectly crystalline layer 11 Injected carbon atoms 12 Oxygen precipitates 13, Perfectly crystalline region Representative Patent attorney Mr. Inoue 1 Figure 2 Cause 5 Figure 6 Figure 7 Figure 8 7 Ha No. 9 Figure Tiger, ~- Figure 10 Figure 1 Figure 12 Figure 13 Le Shapeng + Transport -

Claims (1)

【特許請求の範囲】[Claims] 半導体基板内部に存在する酸素を析出させこれをゲッタ
リング・サイトとして用いる半導体装置の製造方法に督
いて、半導体基板中の酸素析出核形成にあたJIMeV
以上にて高エネルギ炭素イオン注入を施し注入炭素分布
濃度に依存した酸素析出層を設けることを特徴とする半
導体装置の製造方法。
JIMeV teaches a method for manufacturing a semiconductor device that precipitates oxygen existing inside a semiconductor substrate and uses it as a gettering site, and is used to form oxygen precipitate nuclei in a semiconductor substrate.
A method of manufacturing a semiconductor device characterized by performing high-energy carbon ion implantation and providing an oxygen precipitated layer depending on the implanted carbon distribution concentration.
JP6301083A 1983-04-12 1983-04-12 Manufacture of semiconductor device Pending JPS59188925A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6301083A JPS59188925A (en) 1983-04-12 1983-04-12 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6301083A JPS59188925A (en) 1983-04-12 1983-04-12 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS59188925A true JPS59188925A (en) 1984-10-26

Family

ID=13216915

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6301083A Pending JPS59188925A (en) 1983-04-12 1983-04-12 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS59188925A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63246831A (en) * 1987-04-02 1988-10-13 Seiko Instr & Electronics Ltd Silicon crystal substrate
JPH0254933A (en) * 1988-08-19 1990-02-23 Toshiba Corp Manufacture of semiconductor device
JPH0269357U (en) * 1988-11-14 1990-05-25
JPH03181125A (en) * 1989-12-11 1991-08-07 Mitsubishi Electric Corp Semiconductor device and its manufacture
EP1102314A3 (en) * 1999-11-17 2005-08-03 Denso Corporation Method for manufacturing a SOI substrate
JP2007149799A (en) * 2005-11-25 2007-06-14 Shin Etsu Handotai Co Ltd Annealed wafer and manufacturing method thereof
JP2015204316A (en) * 2014-04-11 2015-11-16 信越半導体株式会社 Silicon wafer and method for manufacturing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5618430A (en) * 1979-07-25 1981-02-21 Fujitsu Ltd Manufacture of semiconductor element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5618430A (en) * 1979-07-25 1981-02-21 Fujitsu Ltd Manufacture of semiconductor element

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63246831A (en) * 1987-04-02 1988-10-13 Seiko Instr & Electronics Ltd Silicon crystal substrate
JPH0254933A (en) * 1988-08-19 1990-02-23 Toshiba Corp Manufacture of semiconductor device
JPH0269357U (en) * 1988-11-14 1990-05-25
JPH03181125A (en) * 1989-12-11 1991-08-07 Mitsubishi Electric Corp Semiconductor device and its manufacture
EP1102314A3 (en) * 1999-11-17 2005-08-03 Denso Corporation Method for manufacturing a SOI substrate
US7220654B2 (en) 1999-11-17 2007-05-22 Denso Corporation Method for manufacturing semiconductor substrate
US7754580B2 (en) 1999-11-17 2010-07-13 Denso Corporation Method for manufacturing semiconductor substrate
JP2007149799A (en) * 2005-11-25 2007-06-14 Shin Etsu Handotai Co Ltd Annealed wafer and manufacturing method thereof
JP2015204316A (en) * 2014-04-11 2015-11-16 信越半導体株式会社 Silicon wafer and method for manufacturing the same

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