JPS59188328A - One strand ground-fault detecting relay - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a single line ground fault detection relay for detecting a single line ground fault in a high resistance grounding power system.

Conventionally, there is one shown in FIG. 1 as this type of single line ground fault detection relay. In the figure, 1 is an instrument transformer (hereinafter abbreviated as PT) for phase voltage detection, and 2-1 to 2-6 are PTs.
A secondary line voltage introduction transformer, 6 is a PT tertiary zero-phase voltage introduction transformer, 4-1 to 4-6, and 5-1 to 5-
4 is a vector synthesis resistor, and 6 is a zero-phase overvoltage detection element that receives an input signal from the secondary side of the PT tertiary zero-phase voltage introducing transformer 30. 7-1 to 7-6 and 8 are rectangular wave conversion circuits;
9-11 to 9-6td are NAND circuits, 10-1 to 10-3 are phase discrimination circuits, and 11-1 to 11-6 are AND circuits, respectively.

Next, the operation of the conventional circuit shown in FIG. 1 will be explained below. FIG. 2 is a single line ground fault detection characteristic diagram of the conventional relay shown in FIG. 1, and 12-1 to 12-6 are the output characteristics of the AND circuits 11-1 to 11-6 shown in FIG. 1, respectively.
Characteristic 12-4 shows the output characteristic of the zero-phase overvoltage detection element 6 shown in FIG. Further, the voltages -VA to -Vc are reference voltages, and FIG. 3 shows the principle for deriving the reference voltages -VA to -Vc. That is, voltages BAB, EBC,
ECA is the line voltage, and is equal to 2 of PTI in FIG.
The next phase voltage is converted to a line voltage by the FT secondary line voltage introduction transformer 2-1 to 2-3, and the vector synthesis resistor 4-1 is used to obtain a composite current proportional to the line voltage.
The circuit is constructed such that the combined currents are vector-combined through K to 4-6 to obtain an amount of electricity proportional to -MA to -Vc shown in FIG. The amount of electricity proportional to the reference voltage -VA is the resistor 4-1 for vector synthesis.
．． 4-6 respectively line voltage EAB.

- ECA is vector-synthesized and the reference voltage -VB
, =Vc can also be obtained in the same manner.

Next, the principle for deriving the output characteristics 12-1 to 12-3 of the AND circuits 11-1 to 11-3 of FIG. 1 shown in FIG. 2 is shown in FIG. 4 for the first phase.

The characteristics 12-1 to 12-6 are obtained by dividing the reference voltage -VA K proportional to the electrical quantity -KIVA derived in FIG.
The 13th order zero-phase voltage introduction transformer 6 receives the zero-phase voltage 3V.
The output voltage proportional to O is derived through the vector synthesis resistor 5-1, and is vector-combined with the electric quantity of 2VO to -.
to get 2 VO-KI VA. Furthermore, the vector synthesis resistor 5-4 is connected to the output of the KPT 3rd order zero-phase voltage introduction transformer 6.
The symmetrical arc shown in FIG. 4 is a locus drawn such that the phase difference θ between - and the electrical quantity of 2VO obtained through is a constant value. In addition, the phase angle θ of the two vectors 2VO and -KtVA is greater than the specified value, 180°〉θ〉9
FIG. 5 shows an example in which the operating output is obtained from the single line ground fault detection relay shown in FIG. 1 when the angle is 0°. Waveform-K2Vo
is the output waveform of the vector synthesis resistor 5-4 in FIG. 1, and waveform -2'VO-Kt VA is the input waveform □ of the circuit 7-1 in FIG. This input waveform -2VO-KtVA is passed through the rectangular wave converting circuits 7-1 to 7-6 and 8, respectively, to obtain the output signals of the rectangular wave converting circuits 8 and 7-1 shown in FIG. By applying the output signals of the two rectangular wave converting circuits 8 and 7-1 to the N A N D circuit 9-1 in FIG. A high level output signal can be obtained only in a low level state when both outputs are absent. This is the NAND circuit 9 in Figure 5.
-1 output waveform, and the output pulse width of the NAND circuit 9-1 is 2VO on the waveform and 2VO-KtVA on the waveform -1.
When the phases are in the same phase, it is 180°, and when the phases are opposite, it is zero. Therefore, by detecting the above-mentioned pulse width, that is, the output signal of the NAND circuit 9-1, by some method, it is determined whether the phase angle of the two inputs of the above-mentioned -2VO-KIVh is equal to or larger than the specified value. be able to. The waveform example in Fig. 5 is when the phase angle θ is less than the specified value and the relay is inoperative, and the pulse width is thicker than the specified value (the output signal (H signal) of the NAND circuit 9-1 is used as the lock signal). Therefore, the output of the phase discrimination circuit 10-1 is not output.

The zero-sequence overvoltage detection element 6 receives the output signal of the FT tertiary zero-sequence voltage introduction transformer 3 and operates when the zero-sequence voltage exceeds a specified value. 10-6 output and AND circuit 11-
1 to 11-6.

In addition, the circuit diagram in Figure 6-1 shows the circuit at the time of a one-wire ground fault in an example of a high-resistance grounding system, and 16 is the neutral point grounding resistance (
14 is the neutral point grounding reactor (hereinafter referred to as NGL), 15 is the ground capacitance of the cable transmission line (hereinafter referred to as ground capacitance 1), 16 is the fault point resistance, EA
is the generator induced voltage, and Zg is the back impedance.

If the above-mentioned Fig. 6-1 is replaced with an equivalent circuit in the object coordinate method, it becomes as shown in Fig. 6-2. Further, since the rear impedance Zg is negligible, if this is omitted, the result is shown in Fig. 6-3.

Figure 7-1 shows a two-wire ground fault accident at the same location. If this is replaced with an equivalent circuit in the symmetric coordinate method in the same manner as in FIG. 6, it will become as shown in FIG. 7-2, and if further simplified, it can be expressed as in FIG. 7-3. Here, if we compare the zero-sequence voltage VO in Figure 6-3 and Figure 7-3, it is clear that there is a difference in the magnitude and phase of vO. It can be seen that the magnitude of 16 is influenced by RF. The above situation is shown in FIGS. 8 and 9. First, Fig. 8 shows the vector locus of the zero-sequence voltage -Vo at the time of a one-wire ground fault accident, and Fig. 6-
This is the case where the failure point resistance 3RF in Figure 3 is changed from zero to infinity, and Figure 9 is the Bektor locus of the zero-phase voltage -Vo at the same point two-wire ground fault of the Bc phase, and the 7-3
The figure shows the case where the failure point resistance RF is changed from zero to infinity. Therefore, as shown in Fig. 10, the operating range of the relay is set so that the characteristic 1
It is necessary to do as shown in 2-1. On the other hand, the same point 2
Zero-sequence voltage -V at the time of line ground fault.

Since the vector trajectory is as shown in FIG. 9, it is necessary to avoid erroneously detecting this. However, the characteristics of the relay are as shown in Figure 2, with reference voltages VA, VB, 'V of each phase.
Since the trap is set to form an arc with respect to c, for example,
In the case of a two-wire ground fault in the Bc phase, there is a possibility that the vector of zero-sequence voltage -VO will enter the characteristic range of the B or C phase of the relay, and this performance limit is a one-wire ground fault. This will determine the quality of the performance of the detection relay.

This situation is shown in FIG. Figure 11 shows the case of a two-wire ground fault in the Bc phase, and the voltage triangles are EA and EB.

Bc, and the line voltage of the B and C phases decreases. Reference voltage V
Since A, VB, and VC are obtained by vector synthesis from line voltages, the phases and magnitudes of the voltages from the center of gravity point zero of the voltage triangle to the apex of the triangle are also proportional to that.

Therefore, relay characteristics 12-1.12-2.12-3
As shown in FIG. 11, the B-phase characteristic 12-2 and the C-phase characteristic 12-3 approach each other in accordance with the magnitude of the line voltage Enc.

Therefore, if the above-mentioned line voltage Enc falls below a certain level, characteristics 12-2 and 12-3 will overlap and the operation will occur even in the case of a two-wire ground fault.Conventionally, as a countermeasure for this, it is not shown in Fig. 1. However, the circuit has been devised so that it locks when the line voltage is below a certain value or does not output an output signal when two phases are activated.

As mentioned above, the first drawback of the conventional one-wire ground fault detection relay is that the zero-sequence voltage -V during a one-wire ground fault fault is
In order to detect the o vector reliably, the circular arc must be made quite large, and characteristic 12 in Figure 11.
-2 and 12-6 can be superimposed by significantly increasing the line voltage EBC, or in other words, by increasing the line voltage drop detection lock value, the range that does not depend on the lock element can be narrowed. That's true. Next, the second drawback of the conventional one-wire ground fault detection relay is that in the case of a two-wire ground fault at different points, such as the near end of phase B and the far end of phase C, in this case, the zero-sequence voltage -vO
The phase of
It is indicated by vector OF in the figure. In other words, if the line voltage remains to such an extent that the line voltage drop detection lock element does not respond, the determination must be made entirely based on the original phase characteristics 12-2 and 12-6, but in this case Since the operating range of relay characteristics 12-2 and 12-6 is wide, it is very difficult to handle two-wire ground faults at different points.

As mentioned above, the operating range of the conventional one-wire ground fault detection relay is an arc passing through the center point zero shown in Figure 2, and the size of the arc is much larger than the VO vector locus in the case of a one-wire ground fault. This has the major drawback of lowering the performance limit for causing malfunctions due to two-wire ground faults at different locations.

The present invention has been made to eliminate the above-mentioned drawbacks.
- To provide a single-line ground fault detection relay that facilitates the minimum necessary circular arc characteristic for the vector of zero-sequence voltage at the time of a line-ground fault, and has high-performance ground fault detection characteristics that make it difficult to react to a two-line ground fault. The purpose is to

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 12, parts that are the same as those in FIG.
is a square wave conversion circuit.

Next, the operation of the present invention will be explained. FIG. 13 is for explaining the characteristics of the relay of the present invention and shows only the first phase. In the figure, characteristics 17-1 and 17-2 are the locus of zero-sequence voltage -■0 at the time of the one-line ground fault fault described in Fig. 8, and characteristic 12-4 is the zero-sequence overvoltage detection in Fig. 12. The output characteristics of element B are the same as before. Characteristic 19-1 is a characteristic diagram of the relay of the present invention, in which the structure completely surrounds the locus of the zero-sequence voltage -VO, so that -V during a complete one-line ground fault
For the o vector, apply an anti-phase offset voltage of −KaVA from the zero point in the anti-phase direction, and obtain characteristics 17-1 and 17.
A concentric circle with the center point of the arc of -2 is made to touch the vector - at 3VA. Inquiry, characteristic 19-1 and characteristic 17-1
The center points of the vector −K do not necessarily have to be the same.
If the offset voltage of aVA is increased, the arc becomes larger, so by appropriately moving the center point, the trajectory 17-
1 and 17-2. Vector KtVA
.

The method for deriving KIVB and KxVC is the same as the conventional method and is shown in FIG. 3 above. Next, the principle for deriving characteristic 19-1 is shown in FIG. Obtained by vector synthesis of the reference voltage KIVA and the zero-phase voltage -K2Vo -KzVo -KIVA is obtained by vector synthesis of the vector synthesis resistors 4-1, 4-6 and 5- as in the conventional case.
1, and derive 3VA as an offset voltage - from the reference voltage VA, and vector synthesize this with 2VO as a zero-sequence voltage - to obtain -2 Vo + Ka VA. The current may be combined via 8.4-11.5-4. Vector synthesis resistor 4-8.4-
111) Output 1ri-KaVA is the set voltage and vector synthesis resistor 4- is used to derive the reference voltage KIVA.
1. It is connected so that the polarity is opposite to that of 4-6. 2VO-K to the 2 horn electricity jjjr- derived in this way
If the phase angle θ of 2VO + K3VO is set to a constant value on IVA, and a circle touching each vertex of 3VA is drawn on the reference vector KtVA and the offset voltage vector -, characteristic 19-1 in Fig. 14 can be obtained. can. The operating range of the relay is inside characteristic 19-1, and the phase angle θ may be measured so that the relay will operate if the phase angle θ is a constant value of 180°>θ>90° or more. The method for measuring the phase angle θ is the same as before: 2 VO-Kt for the electric quantity, 2 VO+ for the VA, and the same as before.
This can be easily detected by converting 3VA into pulses using the rectangular wave conversion circuit 7-1, 8-1 and measuring the overlapping time or interruption time of the two pulse widths. The operating output is obtained by ANDing the characteristic 19-1 and the characteristic 12-4 of the zero-sequence overvoltage detection element B, as in the conventional case.

In the above embodiment, as shown in FIG. 14, the offset voltage -3VA was set at 180° with respect to the reference voltage KIVA, but the characteristics can be changed by appropriately changing the offset voltage phase, for example by setting a delay of 90°. The reference voltage of K
By changing to IIVALOC, the slope of the arc 19-1 can be changed. This is because the vector of zero-sequence voltage -vO at the time of a one-wire ground fault changes to lead or lag the reference voltage depending on whether the zero-phase circuit in the power system is inducting L or cano (C), which causes the relay to operate. Depending on this, it may be decided whether the range should be widened or reversed. In such a case, there is an example of application as shown in FIG. 15.

As described above, according to the present invention, the minimum required arc characteristic for the zero-sequence voltage -■0 vector at the time of a one-line ground fault can be easily obtained by adding a resistor for synthesis. This has the effect of reliably providing ground fault detection characteristics that are difficult to respond to in the event of a two-wire ground fault.

[Brief explanation of the drawing]

Figure 1 is a block circuit diagram of a conventional single line ground fault detection relay.
FIG. 2 is a detection characteristic diagram of FIG. 1, FIGS. 3 to 11 are supplementary explanatory diagrams for explaining the conventional example and the present invention, and FIG.
The figure is a principle circuit diagram of a one-line ground fault detection relay showing an embodiment of the present invention, FIG. 13 is a zero-phase phase characteristic diagram according to the present invention, and FIG.
4 and 15 are explanatory diagrams of the circuit shown in FIG. 12. 1...Instrument transformer, 2-1 to 2-6...
PT secondary line voltage introduction transformer, 6...PT tertiary zero-phase voltage introduction) lance, 4-1 to 4-12.5
-1 to 5-6...Resistance for vector synthesis, 6-
...Zero-sequence overvoltage detection element, 7-1 to 7-3.8
-1 to 8-6...Square wave conversion circuit, 9-1 to 9-6...NAND AND circuit 10-1 to 10
-6...Phase discrimination circuit, 11-1 to 11-6
...AND circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Masu Oiwa Figure 2 Figure 4 Figure 5 Figure 6-4 Figure 6-2 Figure 6-3 Figure Q Condolence 7-f Figure A Tsuri 7-3 Figure 6 Figure 9 Part 1 Flea EA No. IO En No. ii Fig. A No. 72 Fig. 13 Fig. 14 @ No. 15 Written amendment to the drawing procedure (voluntary) -'' Mi Palace display Patent application No. 1983-62504 Name Relationship between the person and owner of the single line ground fault detection relay Patent Applicant Sen, 2-2-3 Marunouchi, Chiyoda-ku, Tokyo;
(601) Mitsubishi Electric Co., Ltd. Representative Hitoshi Katayama Hitoshi 1 2-2-3-5 Marunouchi, Chiyoda-ku, Tokyo, Claims column 6 of the specification subject to amendment, Contents of amendment Claims as per attached sheet Correct the range of. 7. Document stating the scope of claims after the amendment to the list of attached documents 1 binary star Claims after the above amendment (1) Secondary line voltage of an instrument transformer that detects the phase voltage of an AC power transmission system The line-to-line voltage of the introduced transformer is the phase voltage derived by vector synthesis using the vector synthesis resistor for detecting the phase voltage, the reference voltage derived by the vector synthesis resistor for detecting the reference voltage in the same phase as the phase voltage, and the reference voltage of the transformer. A first quantity of electricity obtained by vector synthesis of the three-way winding area and the fc transformer three-way voltage, and an offset voltage and zero-sequence voltage that are in opposite phase to the reference voltage and proportional to the reference voltage. A NAND circuit that detects a second electrical quantity obtained by vector synthesis, a phase difference between the first electrical quantity and the second electrical quantity, and a NAND circuit that detects the phase difference between the first electrical quantity and the second electrical quantity, and The origin of the vector locus is a first element which is designed to move in parallel in the direction of the offset voltage in proportion to the offset voltage to obtain a circular arc characteristic, and a first element which is designed to obtain an arc characteristic by moving in parallel in the direction of the offset voltage in proportion to the offset voltage. a second element configured to detect the first element;
A single-line ground fault detection relay characterized in that the element and the second element operate together to output a relay output signal when the tile is broken. (2) a first quantity of electricity obtained by vector synthesis of a voltage obtained by shifting the phase of the anti-phase offset voltage by a predetermined amount and a zero-phase voltage;
The phase difference between the zero-sequence voltage and the second electrical quantity obtained by vector synthesis of the zero-sequence voltage and the reference voltage is detected.When the output signals of the first element and the second element operate together, the relay is activated. A single line ground fault detection relay according to claim 1, characterized in that the relay is adapted to output an output signal.

Claims (2)

[Claims] (1) The phase voltage derived by vector combining the line voltage of the secondary line voltage introduction transformer of the instrument transformer that detects the phase voltage of the AC power transmission system using the vector combination resistor for phase voltage detection, and the phase voltage derived from the phase voltage. a first quantity of electricity obtained by vector synthesis of a reference voltage derived by a vector composite resistor for detecting a reference voltage in the same phase as the voltage and a transformer tertiary voltage derived from a secondary winding of the transformer; , a second quantity of electricity obtained by vector synthesis of an offset voltage and a zero-sequence voltage that are in opposite phase to the reference voltage and proportional to the reference voltage, and the first quantity of electricity and the second quantity of electricity. a NAND circuit that detects the phase difference between the
a first element configured to move in parallel from the origin of the vector locus of the zero-phase voltage in the direction of the offset voltage in proportion to the offset voltage when a line ground fault occurs in the power transmission system, and to obtain a circular arc characteristic; a second element configured to detect an amount of electricity proportional to the magnitude of the phase voltage;
A single-line ground fault detection relay characterized in that a relay output signal is output when an element and a second element operate together. (2) A first quantity of electricity obtained by shifting the phase of the anti-phase offset voltage applied to the phase voltage by a predetermined amount, and a second quantity of electricity obtained by vector synthesis of the zero-sequence voltage and the phase voltage. 1. The straight line according to claim 1, wherein an output signal of a relay is output when the output signals of the first element configured to detect a phase difference and the output signal of the second element operate together. Fault detection relay.