JPH0517771B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a single line ground fault detection relay for detecting a single line ground fault in a high resistance grounding power system.

Conventionally, there is one shown in FIG. 1 as this type of single line ground fault detection relay. In the figure, 1 is a voltage transformer for phase voltage detection (hereinafter abbreviated as PT), 2-1
or 2-3 is the PT secondary line voltage introduction transformer, 3
is PT 3rd order zero-phase voltage introduction transformer, 4-1 or 4
-6 and 5-1 to 5-4 are vector synthesis resistors, and 6 is a zero-phase overvoltage detection element that connects the input signal to PT3.
The next zero-phase voltage is obtained from the secondary side of the transformer 3. 7
-1 to 7-3 and 8 are rectangular wave conversion circuits, 9
-1 to 9-3 are NAND circuits, 10-1 to 10-3 are phase discrimination circuits, 11-1 to 11
-3 are AND circuits.

Next, the operation of the conventional circuit shown in FIG. 1 will be explained below. Figure 2 is a single-line ground fault detection characteristic diagram of the conventional relay shown in Figure 1, and is 12-1 to 12-3.
are the output characteristics of the AND circuits 11-1 to 11-3 shown in FIG. 1, respectively, and characteristic 12-4 is the output characteristic of the zero-sequence overvoltage detection element 6 shown in FIG. Further, the voltages -V _A to -V _C are reference voltages, and FIG. 3 shows the principle of deriving the reference voltages -V _A to -V _C. That is, the voltages E _AB , E _BC , E _CA
are line voltages, respectively, and PT1 and 2 in FIG.
PT secondary line voltage introduction transformer 2-1
to 2-3, which are converted into line voltages, and are vector-synthesized by vector-synthesizing the composite currents via vector-synthesizing resistors 4-1 to 4-6 to obtain a composite current proportional to the line-to-line voltage. The circuit is configured to obtain an amount of electricity proportional to -V _A to -V _C shown in Figure 3. In other words, the amount of electricity proportional to the reference voltage -V _A is the vector synthesis resistor 4-1, 4-
6, the line voltages E _AB and -E _CA are vector-synthesized, respectively, and the reference voltages -V _B and -V _C can be obtained in the same way. Next, the figure 1 shown in figure 2
Output characteristics 1 of AND circuits 11-1 to 11-3
The derivation principle of 2-1 to 12-3 is shown in FIG. 4 for the first phase. The characteristics 12-1 to 12
-3 is the electrical quantity -K ₁ V _A proportional to the reference voltage -V _A derived in Fig. 3, and the zero-sequence voltage 3V ₀ obtained from the tertiary circuit of PT1 shown in Fig. 1 as the PT third-order zero-sequence voltage. The output voltage proportional to the zero-phase voltage 3V ₀ received by the introduction transformer 3 is vector-synthesized with the electrical quantity of -K ₂ V ₀ derived through the vector synthesis resistor 5-1 to obtain -K ₂ V _0.
−K ₁ V _A is obtained. Furthermore, the trajectory was drawn so that the phase difference θ with the electrical quantity of −K ₂ V ₀ obtained from the output of the PT tertiary zero-phase voltage introduction transformer 3 through the vector synthesis resistor 5-4 was a constant value. This is a symmetrical circular arc shown in FIG. Furthermore, when the phase angle θ of the two vectors -K ₂ V ₀ -K ₁ V _A and -K ₂ V ₀ is greater than the specified value, and 180°>θ>90°, the single-line ground fault in Figure 1 is detected. An example of obtaining operational output from a relay is shown in FIG. The waveform -K ₂ V ₀ is the output waveform of the vector synthesis resistor 5-4 in Figure 1, and the waveform -K ₂ V ₀ -K ₁ V _A is the first
This is the input waveform of the circuit 7-1 in the figure. This input waveform -K ₂ V ₀ -K ₁ V _A is passed through the rectangular wave converting circuits 7-1 to 7-3 and 8, respectively, to obtain the output signals of the rectangular wave converting circuits 8 and 7-1 shown in FIG. The output signals of the two rectangular wave conversion circuits 8 and 7-1 shown in FIG.
By applying the voltage to the NAND circuit 9-1, a high-level output signal can be obtained only when the output of the rectangular wave conversion circuit 7-1 and the output of the rectangular wave conversion circuit 8 are low level. This is figure 5
This is the output waveform of the NAND circuit 9-1, and its
The output pulse width of the NAND circuit 9-1 is the waveform −K ₂ V ₀
When the phases of -K ₂ V ₀ -K ₁ V _A are in the same phase, it is 180°, and when they are in opposite phases, it is zero. Therefore, by detecting the above-mentioned pulse width, that is, the output signal of the NAND circuit 9-1 by some method, the above-mentioned -
It can be determined whether the phase angles of the two inputs, K ₂ V ₀ -K ₁ V _A and -K ₂ V ₀ , are equal to or greater than a specified value. Fifth
The waveform example in the figure is for a case where the phase angle θ is less than the specified value and the relay is inoperative, and the pulse width is larger than the specified value and the output signal (H signal) of the NAND circuit 9-1 is used as the lock signal, so the phase discrimination circuit There is no output of 10-1. In addition, the zero-phase overvoltage detection element 6 is
It operates when the output signal of the PT tertiary zero-phase voltage introduction transformer 3 is received and the zero-phase voltage exceeds a specified value, and the phase discrimination circuit 10- is used as a stopper.
1 to 10-3 and the AND circuits 11-1 to 11-3.

In addition, the circuit diagram in Figure 6-1 is an equivalent circuit in the event of a single-line ground fault in an example of a high-resistance grounding system, where 13 is a neutral point grounding resistor (hereinafter referred to as NGR), and 14 is a neutral point grounding reactor. (hereinafter referred to as NGL), 15 is the ground capacitance of the cable system transmission line (hereinafter referred to as ground capacity), 16 is the fault point resistance, E _A is the generator induced voltage,
Z _g is the back impedance. If the above-mentioned Fig. 6-1 is replaced with an equivalent circuit in the object coordinate method, it becomes as shown in Fig. 6-2. Furthermore, the back impedance
Since Z _g is negligible, if this is omitted, the result will be Figure 6-3.

Figure 7-1 shows a two-wire ground fault accident at the same location. If this is replaced with an equivalent circuit in the object coordinate method similar to that shown in Figure 6, Figure 7-
2, and if further simplified, it can be represented as shown in FIG. 7-3. Here, the above-mentioned 6-
Comparing the zero-sequence voltage V ₀ in Fig. 3 and Fig. 7-3, it is clear that there is a difference in the magnitude and phase of V _0. As mentioned above, the vector of the zero-sequence voltage V ₀ depends on the magnitude RF of the fault point resistor 16. You can see that it depends on the situation. The above situation is shown in FIGS. 8 and 9. First, the 8th
The figure shows the vector locus of the zero-sequence voltage -V ₀ at the time of an A-phase one-wire ground fault, and shows the case where the fault point resistance 3RF in Figure 6-3 is varied from zero to infinity.
Figure 9 shows the vector locus of the zero-sequence voltage -V ₀ at the same point two-wire ground fault of the BC phase, and represents the case where the fault point resistance RF in Figure 7-3 is varied from zero to infinity. There is. Therefore, as shown in Fig. 10, the operating range of the relay is as shown in characteristic 12-1 so that the locus 17-1 or 17-2 of the zero-sequence voltage -V ₀ at the time of a single-wire ground fault can be detected. It is necessary to do so. On the other hand, the zero-sequence voltage at the time of a two-wire ground fault accident at the same point -
Since the vector locus of V ₀ is as shown in FIG. 9, it is necessary to avoid erroneously detecting this. However, as shown in Figure 2, the characteristics of a relay are arcuate with respect to the reference voltages V _A , V _B , and V _C of each phase, so for example, if a two-wire ground fault occurs in the BC phase, For example, there is a possibility that a vector of zero-sequence voltage -V ₀ may enter the characteristic range of the B phase or C phase of the relay, and this performance limit determines the quality of the performance as a one-wire ground fault detection relay. You end up doing it. This situation is shown in FIG. Figure 11 is BC
In the case of a phase two-wire ground fault, the voltage triangle is E _A ,
E _B and E _C , and the line voltage of the BC phase decreases. Since the reference voltages V _A , V _B , and V _C are obtained by vector synthesis from the line voltages, the phases are directed from the center of gravity zero of the voltage triangle to the apex of the triangle, and the magnitude is proportional thereto. Therefore, characteristics of relay 1
2-1, 12-2, and 12-3 are also arcs with respect to the reference voltages V _A , V _B , and V _C as shown in FIG. _B.C.
They will move closer to each other depending on the size of the .
Therefore, if the line voltage E _BC falls below a certain level, characteristics 12-2 and 12-3 will overlap and it will operate even in the event of a two-wire ground fault. Although not shown, the circuit is devised so that it locks when the line voltage is below a certain value or does not output an output signal when two phases are activated.

In this way, the first drawback _of the conventional one-line ground fault detection relay is that, as already mentioned in Fig. The arc must be made considerably large, and the limit line voltage E _BC at which characteristics 12-2 and 12-3 in Fig. 11 overlap must be made considerably large.In other words, the line voltage drop detection lock By increasing the value, the range in which the locking element is not relied on becomes narrower. Next, the second drawback of the conventional one-line ground fault detection relay is in the case of a two-wire ground fault at different points, such as at the close end of phase B and the far end of phase C. In this case, the phase of the zero-sequence voltage -V ₀ is large. This is shown by the vector OF in FIG. 11. In other words, in the case where the line voltage remains to such an extent that the line voltage drop detection lock element described above does not respond, the original phase characteristics 12-2 and 1
2-3, but in this case, the operating range of the relay characteristics 12-2 and 12-3 is wide, so it is very difficult to deal with a two-wire ground fault at a different point.

As mentioned above, the operating range of the conventional one-wire ground fault detection relay is an arc passing through the center point zero shown in Figure 2, and the size of the arc is much larger than the V ₀ vector locus in the case of a one-wire ground fault. This had the major drawback of lowering the performance limit for causing malfunctions due to two-wire ground faults at different locations.

The present invention was made in order to eliminate the above-mentioned drawbacks, and it facilitates the minimum required arc characteristic for the vector of zero-sequence voltage in the event of a single-wire ground fault, and provides high performance that is difficult to react to in the event of a two-wire ground fault. An object of the present invention is to provide a single line ground fault detection relay having excellent ground fault detection characteristics.

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. In FIG. 12, the same parts as in FIG. 1 are designated by the same reference numerals.
12 and 5-1 to 5-6 are vector synthesis resistors, and 8-1 to 8-3 are rectangular wave conversion circuits.

Next, the operation of the present invention will be explained. FIG. 13 is for explaining the relay of the present invention and its characteristics, and shows only the first phase. In the figure, characteristic 17-1,
17-2 is the locus of the zero-sequence voltage -V ₀ at the time of the single-wire ground fault fault described in FIG. 8, and characteristic 12-4 is the output characteristic of the zero-sequence overvoltage detection element 6 in FIG. is the same as Characteristic 19-1 is a characteristic diagram of the relay of the present invention, and in order to have a configuration that completely surrounds the locus of zero-sequence voltage -V ₀ , it has an opposite phase with respect to the -V ₀ vector at the time of a complete one-wire ground fault. from the zero point in the direction −
Applying an anti-phase offset voltage of K ₃ V _A , characteristic 1
It is arranged to be in contact with the vector -K ₃ V _A at a concentric circle with the center point of the arcs 7-1 and 17-2. Note that the center points of characteristic 19-1 and characteristic 17-1 do not necessarily have to be the same; if the offset voltage of the vector -K ₃ V _A is increased, the arc becomes larger, so the center points should be moved appropriately. Therefore, it is sufficient to coordinate with the trajectories 17-1 and 17-2. Vector K ₁ V _A ,
The method for deriving K ₁ V _B and K ₁ V _C is the same as the conventional method and is shown in FIG. 3 above. Next, the principle for deriving characteristic 19-1 is shown in FIG. -K ₂ V ₀ -K 1 V _A obtained by vector synthesis of the reference voltage _K 1 V _A and the zero-sequence voltage -K ₂ V ₀ is obtained by vector synthesis of the vector synthesis resistors 4-1, 4-6, and 5- as in the conventional case _. 1, and derive the offset voltage -K ₃ V _A from the reference voltage V _A , and vector synthesize it with the zero-sequence voltage -K ₂ V ₀ to obtain -K ₂ V ₀ +K ₃ V _A. The currents may be combined via vector combining resistors 4-8, 4-11, and 5-4. Vector synthesis resistor 4-8
_{. _ _ _ _} The two quantities of electricity derived in this way -
By keeping the phase angle θ of K ₂ V ₀ −K ₁ V _A and −K ₂ V ₀ +K ₃ V ₀ constant, the corner apex of the reference vector K ₁ V _A and the offset voltage vector −K ₃ V _A is determined. By drawing a circle tangent to , characteristic 19-1 in FIG. 14 can be obtained. The operating range of the relay is inside characteristic 19-1, and the phase angle θ may be measured so that the relay operates if the phase angle θ is a constant value of 180°>θ>90° or more.
The method of measuring the phase angle θ is the same as before, using the electric quantity −
Convert K ₂ V ₀ −K ₁ V _A and −K ₂ V ₀ +K ₃ V _A into pulses using rectangular wave conversion circuits 7-1 and 8-1, respectively, and measure the overlapping time or interruption time of the two pulse widths. It can be easily detected by still,
The operating output is determined by ANDing the characteristic 19-1 and the characteristic 12-4 of the zero-phase overvoltage detection element 6, as in the conventional case.

In addition, in the above embodiment, as shown in FIG. 14, the offset voltage -K ₃ V _A is set to the reference voltage K ₁ V _A ,
180 degrees, but by appropriately changing the offset voltage phase, for example by setting a delay of 90 degrees, the characteristic reference voltage can be changed to K ₁₁ V _A Lα, and the slope of the arc 19-1 can be changed. This depends on whether the zero-phase circuit in the power system is inductive L or capacitive C, so the zero-phase voltage -V ₀ at the time of a one-wire ground fault
Since the vector changes to either lead or lag behind the reference voltage, the operating range of the relay may also be determined to widen the leading side or reverse it. In such a case, it is shown in Figure 15. There are similar application examples.

As described above, the present invention detects the line voltage of the secondary line voltage introduction transformers 2-1 to 2-3 of the instrument transformer 1 that detects the phase voltage of the AC power transmission system by using the vector composite resistor for line voltage detection. 4-1 to 4-6, the line voltage derived by vector synthesis and the vector synthesis resistor 4-1 to 4-6 for detecting the reference voltage in the same phase as the phase voltage.
4-6, the reference voltage V _A (the same applies below V _AO for the A phase component) and the zero-sequence voltage derived from the tertiary winding of the transformer 1 - the voltage corresponding to V ₀ -
The first quantity of electricity obtained by vector synthesis of K ₂ V ₀ and the voltage K ₁ V _A corresponding to the reference voltage −K ₂ V ₀ −K ₁ V _A
, an offset voltage −K ₃ V _A that is in opposite phase to the reference voltage and proportional to the reference voltage, and a voltage −K ₂ V ₀ corresponding to the zero-sequence voltage, and a second quantity of electricity −K obtained by vector synthesis. ₂ V ₀ −K _3A , the first electrical quantity −K ₂ V ₀ −K ₁ V _A , and the second electrical quantity −K ₂ V ₀ −K _3A ; a NAND circuit 9 for detecting the phase difference θ; 1-9-3
And, at the time of a one-line ground fault in the power transmission system, an amount corresponding to the offset voltage -K 3A is generated from the origin of the vector loci 17-1, _17-2 of the zero-sequence voltage -V ₀ in the direction of the offset voltage -K _3A . The first elements 10-1 to 10-1 are made such that the arc of the arc characteristic is made larger by the same amount, so that the arc characteristic 19-1 has almost the same shape as the vector locus 17-1, 17-2 of the zero-sequence voltage _-V 0
10-3, and a second element 6 configured to detect an amount of electricity proportional to the magnitude of the zero-sequence voltage _-V0 , the first elements 10-1 to 10-3 and the second element 6 A relay output signal is output when both are operated together.

Furthermore, in the embodiment shown in FIG. 15 of the present invention,
The NAND circuits 9-1 to 9-3 generate a voltage -K _3A ∠ which is obtained by shifting the phase of the anti-phase offset voltage -K _3A by a predetermined amount.
The second electrical quantity obtained by vector synthesis of 90° and the voltage −K ₂ V ₀ corresponding to the zero-sequence voltage −V ₀ −K ₂ V ₀ +K _3A
∠90° and the voltage corresponding to the zero-sequence voltage −V ₀ −
The present invention is characterized in that the phase difference θ between the first quantity of electricity -K ₂ V ₀ +K _1A obtained by vector synthesis of K ₂ V ₀ and the reference voltage is detected.

As described above, according to the present invention, in order to minimize the tolerance (detection margin) of the arc characteristic with respect to the vector locus of zero-sequence voltage -V ₀ at the time of a one-wire ground fault,
The arc characteristics have an appropriate offset to make it difficult to respond to two-wire ground faults.

In other words, in order to ensure reliable operation in the event of a one-wire ground fault, it is necessary to have characteristics with more margin than the vector locus of -V ₀ at this time.
In the conventional characteristics shown in the figure, in the region where the −V ₀ voltage is small (incomplete ground fault), the −V ₀ vector locus and the characteristics inevitably become close to each other, so we created a margin in this small voltage region. If the arc of the characteristic is widened, the operating range in the large voltage range (completely ground fault range) will become larger than necessary.

If this is made into the circular arc characteristic with offset according to the present invention, it is possible to obtain a characteristic with approximately the same margin from the small voltage region to the large voltage region, as shown in FIG. 13, and the large voltage region ( It is possible to set the operating range near the complete ground fault area to the minimum required level, and
This has the effect of improving the performance of preventing malfunctions such as line-to-ground faults compared to conventional characteristics.

The details will be explained below using FIG. 16. FIG. 16 is a characteristic diagram showing a performance comparison between the conventional one and the one of the present invention, and shows only the B-phase relay and operating range characteristics in a B-C phase two-wire ground fault accident. In FIG. 16, 12-2 is the conventional characteristic, 19-2 is the characteristic of the present invention, 01 is the center point of the characteristic 19-2, and 02 is the center point of the characteristic 12-2. In addition, characteristic 12-4 is the operating range characteristic of the above-mentioned zero-sequence overvoltage detection element, and characteristic 17-1 is described for convenience of explanation, and characteristic 19-1 is the -V ₀ voltage trajectory at the time of a B-phase single line ground fault. This is provided provisionally so that it can be compared with 2. In other words, at the time of a single line ground fault -
The locus of the V ₀ voltage vector has a circular arc characteristic with the fault phase voltage as a reference, and its center point is determined from the system conditions shown in Figure 6-3 as described above, but -V in Figure 16 The locus 17-1 of ₀ is drawn with the center point as 01, assuming that the voltage E _B is the reference voltage at the time of a single line ground fault. Characteristic 19-
2 is offset to maintain a certain margin with respect to the locus 17-1 of -V ₀ at the time of a single-line ground fault accident, and in the characteristic example of Fig. 16, the locus 17-1 of -V ₀ is Because it is an arc characteristic on a circle drawn with radii 01 and 03 so that it is concentric with the center point 01 of 1
The same margin proportional to the amount of offset can be obtained from a small region of V ₀ voltage (incomplete ground fault) to a large region (complete ground fault). On the other hand, characteristic 12-2
has no offset, so in order to obtain operating range tolerance, it is necessary to shift the center point of the characteristic and make it a large arc, and in the example of Fig. 16, the radius is 0.
It is an arc characteristic on the circle drawn by 02. In other words, in the small voltage range of single-line ground fault (for example, characteristic 12-
In order to obtain the same tolerance of characteristic 19-2 at the operating limit point _P3 ) of characteristic 12-4 and 19-2, it is necessary to increase characteristic 12-2 so that it passes through the intersection point _P3 of characteristics 12-4 and 19-2. As a result, the operating limit point P ₁ of characteristic 12-2 on the line voltage E _BC line is the characteristic 19-
It becomes wider than the operating limit point P ₂ of 2. Therefore, considering the two-wire ground fault accident, the conventional characteristic 12-
2, characteristic 19-2 of the present invention is more advantageous in that the unnecessary operating range is narrower, and has the effect of improving performance against two-wire ground faults at different locations.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram of a conventional single line ground fault detection relay, FIG. 2 is a detection characteristic diagram of FIG. 1, and FIGS. 3 to 11 are supplementary explanatory diagrams for explaining the conventional example and the present invention. FIG. 12 is a principle circuit diagram of a one-line ground fault detection relay showing an embodiment of the present invention, FIG. 13 is a zero-phase phase characteristic diagram according to the present invention, and FIGS. 14 and 15.
The figure is an explanatory diagram of the circuit shown in FIG. 12, and FIG. 16 is a characteristic diagram showing a performance comparison between the conventional circuit and the circuit of the present invention. 1...Instrument transformer, 2-1 to 2-3...
PT secondary line voltage introduction transformer, 3...PT tertiary zero-phase voltage introduction transformer, 4-1 to 4-12, 5-
1 to 5-6...Resistance for vector synthesis, 6...
Zero-phase overvoltage detection element, 7-1 to 7-3, 8-
1 to 8-3...Square wave conversion circuit, 9-1 to 9-3...NAND circuit, 10-1 to 10
-3...Phase discrimination circuit, 11-1 to 11-3
...AND circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] 1 Line-to-line voltage derived by vector-synthesizing the line-to-line voltage of the secondary line-voltage introduction transformer of the instrument transformer that detects the phase voltage of an AC power transmission system using a vector combination resistor for line-to-line voltage detection voltage, a reference voltage derived by a vector composite resistor for reference voltage detection in the same phase as the phase voltage, a voltage corresponding to the zero-sequence voltage derived from the tertiary winding of the transformer, and a voltage corresponding to the reference voltage. A first quantity of electricity obtained by vector synthesis of the voltage obtained by vector synthesis, and a voltage corresponding to an offset voltage and a zero-sequence voltage which are in opposite phase to the reference voltage and are proportional to the reference voltage. a NAND circuit that detects a phase difference between the first electrical quantity and the second electrical quantity; and a NAND circuit that detects the phase difference between the first electrical quantity and the second electrical quantity; a first element in which the arc of the arc characteristic is made larger in the voltage direction by an amount corresponding to the offset voltage so that the arc characteristic has approximately the same shape as the vector locus of the zero-sequence voltage; A second element configured to detect an amount of electricity proportional to the magnitude thereof, and an output signal of a relay is output when the first element and the second element operate together. Fault detection relay. 2. The NAND circuit generates a second electrical quantity obtained by vector synthesis of a voltage obtained by shifting the phase of the anti-phase offset voltage by a predetermined amount and a voltage corresponding to the zero-sequence voltage, a voltage corresponding to the zero-sequence voltage, and a voltage corresponding to the zero-sequence voltage. 2. The single line ground fault detection relay according to claim 1, wherein a phase difference between the first electrical quantity obtained by vector synthesis of the reference voltage and the first electrical quantity is detected.