JPS59175330A - One line ground-fault detecting relay - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a set of ground fault detection relay traps for detecting single wire ground faults in a high resistance ground power system.

Conventionally, there have been devices of this type as shown in FIGS. 1 and 2. In Figures 1 and 2, 1 is a transformer (hereinafter referred to as PT), 2 is an undervoltage relay, 5 is a zero-phase overvoltage relay, and 2a, 2b, and 2c are voltages at each phase contact of the undervoltage relay 2. If a drop is detected, it will be opened. Further, 4 is an auxiliary relay that is energized in the event of a line ground fault.

Next, the operation will be explained. When a line-to-ground fault occurs in a high-resistance grounded power system, the magnitude of the line-to-line voltage does not change, but the healthy phase voltage rises to the line-to-line voltage. The zero-sequence voltage (E is the phase voltage value) is generated.

Therefore, the undervoltage relay 2 is not detected, but the zero-phase overvoltage relay 6 is activated, and the auxiliary relay 4 shown in FIG. 2 responds. Next, if there is a short circuit between the lines, 3φS, 2φS, 2
In φG, the undervoltage relay 2 can detect a voltage drop, so even if the zero-phase overvoltage relay 6 responds due to a 2φG failure, the auxiliary relay 40 shown in Fig. 2 is locked and does not operate under the energizing condition. are doing. This method is called the short-circuit priority method and is a well-known method that has been widely used for detecting line-to-ground faults since ancient times.

Conventional single-line ground fault detection devices are configured as described above, so in the case of a 2φG failure at the far end in a large-capacity system with low power source impedance, a considerable amount of line voltage remains, and there are cases where the undervoltage relay cannot operate, resulting in a 2φG failure. However, there are cases where it is indistinguishable from a single-line ground fault, and it has a major drawback that reduces the reliability of protection.

This invention was made to eliminate the drawbacks of the conventional ones as described above, and provides a single line ground fault detection relay (hereinafter referred to as 1φG detection relay) that reliably detects only negative line ground faults.
The purpose of this research is to provide a single line ground fault detection relay that achieves this.

An embodiment of the present invention will be explained below with reference to the drawings.

FIG. 3 to FIG. 9 are supplementary explanatory diagrams for explaining the principle of the present invention in detail. Figure 3 is an equivalent circuit diagram for a single wire ground fault (point F1) and a two wire ground fault (point F2) in a high resistance grounding system, where 5 is the neutral point resistance, Zg is the back impedance, and "le Hall A path impedance.Kinji 4 shows a vector diagram of the PT10 secondary line voltage and tertiary zero-sequence voltage when a complete human phase 1φG occurs at the F1 point.

The ground voltage Ea of the faulty phase becomes zero, but gb and Ec of the healthy phase
are the line voltages EBAIEOA due to the influence of the neutral point resistance 5.
However, since the voltage triangle does not change, PT
The 102nd line voltage 2 does not change. On the other hand, in the third-order open delta circuit of PTI, a zero-sequence voltage of -5Ea=-3Vo is generated due to the combined voltage of Ea, Eb, and Ec.

Next, FIG. 5 shows a vector diagram of the secondary and tertiary voltages of PTl when a complete 2φG of B-C phase occurs at point F2.

The line voltage EBo of the B-C phase is determined by the ratio of the back impedance Zg and the line impedance ZeO, and it is easy to see that if the line impedance Ze is large with respect to the back impedance Zg, the line voltage EBo will also be large. Although detailed explanation is omitted here, in the case of a high resistance grounding system, the zero-sequence impedance Z04-3RN is the positive-sequence impedance Z.
, = Zg-1-Ze, negative phase impedance Z, ÷
Complete 2 at the same point because it is very difficult for Zg + Ze
At φG, the zero-sequence voltage -3Vo is 1φG as shown in Figure 5.
If the B-C phase is 2φG, the voltage will be generated in the same phase direction as the human phase voltage. Here, the zero-sequence voltage at the time of 1φG failure in FIG. 4 is -5Vo, and the zero-sequence voltage at the time of 2φG failure in FIG. 5 is -5V.

What can be seen by comparing the zero-sequence voltages is that in addition to the magnitude of the zero-sequence voltage, the phase relationship is different. In the case of a 1φG fault, the phase is opposite to the phase voltage phase, whereas in the case of a 2φG fault, the phase voltage phase is different. E They are in the same phase relationship.

This condition holds even if the failure phase of the 1φG failure or the 2φG failure is changed. The present invention focuses on this point, and also takes into consideration special system conditions and failure conditions. Next, 1 under special conditions
The zero-sequence voltage phase at the time of φG failure and 2φG failure will be explained. Figure 6-1 shows A-phase imperfection 1 in the cable system.
An equivalent circuit of a φG failure is shown, where 6 is a neutral point handle X, 7 is a cable ground capacitance Xc, and 8 is a failure point resistance R2. If we replace Fig. 6-1 with the equivalent circuit in the object coordinate method, we get the equivalent circuit shown in Fig. 6-2.
In Figure 3, the back impedance Zg is so small that it can be ignored, so if it is simplified, it will look like a simplified equivalent circuit.

On the other hand, FIG. 7-1 shows a case where, for example, a B-C phase incomplete 2φG fault occurs in the same system as that shown in FIG. 6-1. 7th
If Fig.-1 is replaced with an equivalent circuit in the object coordinate method, it becomes as shown in Fig. 7-2, and if it is further simplified, it becomes busy as shown in Fig. 7-3.

If we compare the equivalent circuits of Fig. 6-3 and Fig. 7-3, it is clear that there is a difference in the magnitude and phase relationship of the zero-sequence voltage (1)0, and this is the fault point resistance R.

You can see that it changes at 8. The thickness RN of the neutral point resistor 5, the size XL of the neutral point axle 6, and the magnitude Xc of the ground capacitance 70 of the cable are constants depending on the system, so they are shown in Figure 6-3 or 7. The vector locus of the zero-sequence voltage Vo in FIG. Figure 8 shows the vector locus of -Vo[pressure at the time of 1φG failure shown in Figure 6-3.
2 is an inductive case. In other words, each equivalent impedance is X in Figure 6-3. > 5 For XL, failure point resistance 8
When changes from infinity to 0, the -vO voltage vector changes from point 0 to point A along arc 8-1, and conversely, the equivalent impedance is 3XL>X.

In the case of , the point changes from point 0 to point A along the arc 8-2. Next, Figure 9 shows -Vo at the time of 2φG failure shown in Figure 7-3.
[It is a vector locus of pressure, and represents the τ■0 voltage vector in the vector case, and 1 arc 9-1 is 1 in the capacitive case.
Circle 18A9-2 is inductive, and arc 8-1 in FIG.
For arc 9-1 and arc 8-2 in Fig. 9, arc 9-
There is a relationship of 2.

From the above, if the system conditions are determined, the locus of the 1■0 voltage vector at the time of a 1φG failure is determined, and its characteristic is an arc with respect to the phase voltage vector, which is clearly different from the locus of the 1■0 vector at the time of a 2φG failure. Therefore, it is possible to use a 1φG detection relay in which the -VO evening pressure vector exists in the range surrounded by characteristics 8-1 and 8-2 shown in FIG.

The present invention will be explained below.

Figure 1O is a characteristic diagram of an example of a 1φG detection relay device, which is the basic principle of the present invention. The reference voltage of vector V. is a reference voltage that is in phase with the phase voltage of C phase, and characteristics 10-1.10-2.10-5 are arcs with respect to the reference voltages vAtVB and Vo of A phase, B phase, and C phase, respectively. This is a created characteristic that determines a 1φG failure if a 10 voltage vector falls within the arc, and characteristic 10
-1 is a criterion for detecting an A-phase 1φG failure, I\j property 10-2 is a criterion for detecting a B-phase 1φG failure, and characteristic 10-3 is a criterion for detecting a C-phase 1φG failure. Characteristic 10-4 is for detecting the magnitude of zero-sequence voltage, and is similar to the conventional zero-sequence overvoltage relay 6.
Although it is provided for the same purpose, it is not an essential condition of the present invention. Next, FIG. ii shows a principle circuit diagram of the one-line ground fault detection device of this embodiment for obtaining the characteristics shown in FIG. 1θ.

In Fig. 11, input transformers 11-1 to 11-6 are used to introduce the secondary line voltage of PTl, and the transformer 11-1 has the AB phase line voltage, and the transformer 11-2
The line voltage of the BC phase is introduced into 11-6, and the line voltage of the CA phase is introduced into 11-6.The secondary coil has an intermediate tap or is a two-turn type, and the transformer secondary voltage It is possible to derive both positive and negative waves at the same time. 12 is ■0
It is a transformer for introducing %PT10 tertiary output voltage, and has a secondary coil with an intermediate tap and a tertiary coil.

16-1 to 15-6. 14-1 to 14-4 are output resistors that derive a current proportional to the secondary voltage of transformers 11-1 to 11-6 and 12, so that current vectors can be synthesized. It is something. Reference numeral 15 denotes a zero-phase overvoltage element, which outputs an operational output if the output of the tertiary coil of the transformer 12 exceeds a certain value, and forms the characteristic 10-4 in Fig. 1θ. 16-1 to 16-5.17 A square wave conversion circuit, which is a transistor circuit that converts an AC input pulse waveform. 18-1 to 18-6 are NANDAND circuits -1 to 20
-6 is an AND circuit, and 19-1 to 19-6 are phase discrimination circuits. Next, the operation of the circuit will be explained for the case where the A phase is 1φG. In the case of 1φG, as mentioned above, the secondary line voltage of PTl does not change, so the transformers 11-1 to 11-6
The secondary voltage of xi is as shown in Figure 2-1. That is, the output voltage of the transformer 11-1 is EAB%, the output voltage of the transformer 11-2 is E, and the output type 0 voltage of the transformer 11-3 is E. It becomes an equilibrium triangle of A. This output voltage is
If currents are converted by 3-1 to 15-6 and vector combined, the output combination of resistors 16-1 and 16-6 will be voltage - (EAB
It is proportional to the vector of -VA shown in Figure 12-1.Similarly, the resistor 16-5
The output combination of resistors 16-5 and 16-4 is proportional to the vector of -vB at voltage -(EBO-EAB), and the output combination of resistors 16-5 and 16-4 is voltage -'EOA-E110') and -■
It is proportional to the vector of o. This voltage -■Eh, -VB, -
V. is in opposite phase to the PT10 secondary output phase voltage and in the same direction as the Vo vector at the time of 1φG failure, and is used as a reference vector. On the other hand, in the tertiary circuit of PT1, the ground side is positive and a zero-phase voltage of 5 Vo f is generated, which is introduced by the transformer 12, converted into a current by the resistors 14-1 to 14-5, and synthesized with the reference vector. 12-2 only for A phase
As shown in the figure.

In other words, the input to the square wave conversion circuit 16-1 is the resistor 1.
Vo (K2 constant R) is applied to the 4 1 k interface, and -KI V is further applied via the resistor 15-1.16-6.
Since A (Kl is a constant) is applied, an AC input proportional to Vo -K and V is applied as an input. On the other hand, 2Vo is applied to the square wave conversion circuit 17 through the resistor 14-4.
Now, if the phase difference between these two human forces is θ, then θ is a constant value (1
If we draw a trajectory while changing the magnitude and phase of VO so that θ is a constant under the condition of 800>θ), the first
This results in an arc as shown by the solid line in Fig. 2-2, and the characteristic 10-1 shown in Fig. 10 is obtained. Various methods have been used in the past to detect the phase difference between two manual forces, but the principle of operation in this embodiment will be briefly explained using output waveforms shown in FIGS. 13(a) to +f+. The input introduced into the rectangular wave conversion circuit 17.16-1 is shown in the same figure (al,
As in (C), for each h −K, Va and −, Vo
-K and VA AC waveforms, but if we adopt a circuit that switches only in the negative waves, the output of the NAND circuit 18-1 will be a square wave conversion circuit, as shown in Figure 11). The signal will be output during the period when both 17 and 16-1 are not outputting, that is, the time 180°-00, and if this pulse width exceeds the specified value, the operation will be locked. , this is connected to the phase discrimination circuit 19-
1 to detect.

In other words, as shown in Figure 12-2, the phase of Vo is -KIV.
If it expands with respect to A and goes out of the operating range, the phase difference θ becomes smaller, and the output pulse width of the NAND circuit 18-1 of Eel in FIG. 13 becomes longer and the operation becomes locked. On the other hand, No. 12-2
If the phase of Vo approaches the in-phase direction with respect to KIvA, it will enter the operating range, but in this case, the phase difference θ will become too large, and the output of the NAND circuit 18-1 in tel of FIG. The pulse width is shortened so that the operation lock is not effective, and by setting the output pulse width of the NAND circuit 18-1 to an appropriate value, it is possible to detect the phase difference θ between two people. be.

Although not particularly shown here, as measures against 2φG at the closest end, the conventional short-circuit priority method (a method that locks when the line voltage is below a certain value) or the lock method during multiphase operation (for example, the method shown in Fig. ii) If two or more of the phase output elements 2°-1 to 20-6 operate at the same time, the final output is locked.

As explained above, according to the one-line ground fault detection device of the present invention, it is possible to extract a characteristic having exactly the same shape as the one Vot [pressure vector locus that occurs at 1φG.

Once the conditions of the power system and the incomplete ground fault coefficient that you want to detect are set, it is possible to design a 1φG detection relay so that it has a similar characteristic that is slightly larger than the -Vo vector locus that occurs at that time. Far end 2 was the biggest drawback
Even in the case where the fault line voltage does not drop at φG, the phase characteristics of the present invention can ensure the inoperation, and have the effect of being able to respond only to a 1φG failure.

[Brief explanation of drawings]

Figures 1 and 2 are block diagrams of a conventional single-line ground fault detection device, Figures 3 to 9 are supplementary explanatory diagrams of the principle for explaining the present invention in detail, and Figure 1O is the basic principle of the present invention. FIG. 11 is a characteristic diagram of a one-line ground fault relay according to the present invention, and FIG.
Figure 2-2 shows the voltage vector diagram in the same example.
The figure shows an output signal waveform diagram of each part of the embodiment in FIG. 11. 1., PT, 11-1 to 11-3. ,・PT secondary line voltage introduction transformer, 12...PT tertiary Vol pressure introduction transformer, 13-1 to 15-6.14-1 to 14-4・
... Vector synthesis resistor, 15 ... Zero-phase overvoltage detection element, 16-1 to 16-1.17 ... Rectangular wave conversion circuit,
18-1 to 18-6...NANDAND circuit-1 to 1
9-6... Phase discrimination circuit %20-1 to 20-6...
AND circuit. In the figures, the same reference numerals indicate the same or equivalent parts. Figure l Figure 2 Figure 3 Figure t Figure 4 Figure 5

Claims (1)

[Claims] In a single-line ground fault detection relay that is activated by detecting zero-sequence voltage when a single-line ground fault occurs in the system, A first electrical quantity obtained by vector synthesis of the detected phase voltage and the tertiary zero-sequence voltage, respectively, and a second electrical quantity proportional to the zero-sequence voltage are derived, and the first electrical quantity and the above A single-line ground fault detection device characterized in that a single-line ground fault is determined by detecting a phase difference between the second electric quantities to ensure characteristics similar to a zero-sequence voltage vector locus at the time of a single-line ground fault.