WO2024057442A1 - Transformer protection relay and transformer protection method - Google Patents

Transformer protection relay and transformer protection method Download PDF

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Publication number
WO2024057442A1
WO2024057442A1 PCT/JP2022/034406 JP2022034406W WO2024057442A1 WO 2024057442 A1 WO2024057442 A1 WO 2024057442A1 JP 2022034406 W JP2022034406 W JP 2022034406W WO 2024057442 A1 WO2024057442 A1 WO 2024057442A1
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Prior art keywords
phase
condition
transformer
set value
harmonic
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PCT/JP2022/034406
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French (fr)
Japanese (ja)
Inventor
聡司 竹村
重遠 尾田
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三菱電機株式会社
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Priority to PCT/JP2022/034406 priority Critical patent/WO2024057442A1/en
Priority to JP2023503204A priority patent/JP7250230B1/en
Publication of WO2024057442A1 publication Critical patent/WO2024057442A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/04Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for transformers
    • H02H7/045Differential protection of transformers

Definitions

  • the present disclosure relates to a transformer protection relay and a transformer protection method.
  • a transformer protection relay for a two-turn transformer
  • primary and secondary winding currents are detected by a current transformer (CT) connected to the primary and secondary windings.
  • CT current transformer
  • the transformer protection relay uses the detected primary and secondary winding currents to determine whether there is an internal failure based on the ratio differential principle.
  • excitation inrush current When voltage is applied to a transformer, excitation inrush current (also referred to as inrush current) may occur. When an inrush current occurs, a difference occurs between the primary winding current and the secondary winding current, which causes malfunction of the transformer protection relay.
  • the excitation inrush current contains harmonics, especially second harmonics, in a proportion higher than a certain level with respect to the fundamental wave (rated frequency) component of the generator.
  • the ratio of the second harmonic component to the fundamental wave component included in the difference current between the primary winding current and the secondary winding current is calculated as the second harmonic content rate
  • the second harmonic content is calculated as the second harmonic content rate.
  • Differential relay operation is locked or inhibited when the rate is above a certain level.
  • the inrush current varies greatly depending on the hysteresis characteristics of the transformer core, residual magnetic flux, voltage application phase, etc. A phase that becomes smaller and smaller occurs.
  • the second harmonic each phase determination method that locks the ratio differential relay operation of only the phase whose second harmonic content is larger than the set value
  • the second harmonic content The transformer protection relay may malfunction in a phase where the ratio is smaller than that of other phases.
  • the second harmonic three-phase OR determination method a method that locks the ratio differential relay operation for all three phases if there is even one phase with a second harmonic content rate higher than the set value. There may be cases where According to this method, the occurrence of inrush current can be detected with high reliability.
  • Patent Document 1 discloses that when the second harmonic content rate in any two of the three phases becomes larger than the set value, a ratio differential relay is activated for all three phases. (hereinafter referred to as the second harmonic two-phase AND determination method) is disclosed. In this document, a second harmonic two-phase AND determination method is proposed as a complement to the conventional second harmonic each phase determination method.
  • Patent Document 2 discloses that when determining the occurrence of inrush current, a set value for comparison with the second harmonic content rate is updated in accordance with changes in transformer characteristics over time. Disclose.
  • the transformer protection relay using the second harmonic three-phase OR determination method described above has a problem in that the relay cannot operate if a transformer failure occurs while an inrush current is being generated. Normally, when the transformer is Y-connected, the detected value of the three-phase CT is converted into a line current when the transformer is ⁇ -connected. Therefore, in the case of a one-phase fault in a transformer, the fault current is included in the line current for two phases after conversion. Since most of the fault current is the fundamental wave component, the second harmonic component is hardly detected for the two phases where the fault current is detected, but the second harmonic component is not detected for the one phase where the fault current is not detected. continues. As a result, in the transformer protection relay using the second harmonic three-phase OR determination method, the relay operation continues to be locked even if a one-phase failure of the transformer occurs while the magnetizing inrush current is being generated.
  • the transformer protection relay using the second harmonic two-phase AND determination method may not be able to detect the occurrence of inrush current.
  • the second harmonic content of the inrush current is relatively large for one phase, but relatively small for the other two phases.
  • the second harmonic content of any two phases exceeds the general setting value of 15%, inrush current can be detected.
  • the second harmonic content of any one phase exceeds 15%, but the second harmonic content of the other two phases exceeds 15%. It may be lower than that. In that case, the transformer protection relay using the second harmonic two-phase AND determination method cannot prevent malfunctions caused by the magnetizing inrush current.
  • the above setting value it is difficult to set to less than 10%. If the power system in which the transformer is installed uses transmission lines with large capacitance components, such as power cables, in the event of a failure, the reactor component of the transformer winding and the ground capacitance of the transmission line Harmonics are generated because the components resonate. In this case, if the length of the power cable is relatively long, the resonance frequency approaches the second harmonic, and the second harmonic content increases to nearly 10%. For this reason, it is difficult to set the above setting value to less than 10%, and it is generally set within the range of 10% to 15%, and among these, it is often set to 15%.
  • the present disclosure has been made in consideration of the above problems, and one of its purposes is to reliably detect the occurrence of inrush current and lock the relay output, and to To provide a transformer protection relay that releases the lock and performs relay operation when a transformer failure occurs. Other objects and features of the present disclosure will be described in the embodiments below.
  • the transformer protection relay of one embodiment includes a first relay calculation section, a second relay calculation section, a third relay calculation section, a first determination section, a second determination section, and a third determination section. It is equipped with a section.
  • the first relay calculation section, the second relay calculation section, and the third relay calculation section are provided corresponding to the first phase, second phase, and third phase of the transformer, respectively, and are Current differential relay calculation is performed based on the fundamental wave component included in the difference current between the primary and secondary sides of the transformer.
  • the first determination section, the second determination section, and the third determination section are provided corresponding to the first phase, second phase, and third phase of the transformer, respectively, and detect the occurrence of inrush current.
  • Each of the first determining section, the second determining section, and the third determining section has a difference current between the primary side and the secondary side of any one of the first phase, the second phase, and the third phase.
  • the first condition is that the content rate of the second harmonic included in is larger than the first set value
  • the content rate of the second harmonic included in the difference current between the primary side and the secondary side of the corresponding phase is the first condition. It is determined whether or not the second condition, which is greater than the set value of 2, is met.
  • the second set value is smaller than the first set value.
  • Each of the first determining section, the second determining section, and the third determining section determines the output of the relay calculating section of the corresponding phase based on whether the first condition and the second condition are both satisfied. lock.
  • the determination unit for each phase of the transformer protection relay has a first setting that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one phase is The first condition that the value is larger than the second set value and the second condition that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of the corresponding phase are larger than the second set value are both satisfied.
  • the output of the corresponding relay calculation section is locked based on whether or not the relay is activated. This enables a transformer protection relay to reliably detect the occurrence of inrush current and lock the relay output, as well as to release the lock and operate the relay in the event of a transformer failure while inrush current is occurring. Can be provided.
  • FIG. 3 is a diagram for explaining the connection between a transformer and its protection relay.
  • FIG. 2 is a block diagram showing an example of the hardware configuration of the transformer protection relay in FIG. 1.
  • FIG. FIG. 2 is a block diagram for explaining signal processing in an arithmetic processing section.
  • FIG. 4 is a block diagram showing an example of the functional configuration of the A-phase calculation section in FIG. 3.
  • FIG. 3 is a diagram summarizing the characteristics of individual determination conditions for inrush current generation in a table format.
  • FIG. 4 is a block diagram showing a specific example of the configuration of an inrush determination section included in the A-phase calculation section of FIG. 3.
  • FIG. 7 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 6.
  • FIG. 4 is a block diagram illustrating a specific configuration example of an inrush determination section included in the A-phase calculation section of FIG. 3 in the transformer protection relay of Embodiment 2.
  • FIG. FIG. 9 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 8;
  • FIG. 9 is a block diagram showing a modification of the inrush determination section of FIG. 8;
  • 4 is a block diagram illustrating a specific configuration example of an inrush determination section included in the A-phase calculation section of FIG. 3 in the transformer protection relay of Embodiment 3.
  • FIG. FIG. 12 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 11.
  • FIG. 12 is a block diagram showing a modification of the inrush determination section of FIG.
  • FIG. 11; 4 is a block diagram illustrating a specific configuration example of an inrush determination section included in the A-phase calculation section of FIG. 3 in the transformer protection relay of Embodiment 4.
  • FIG. FIG. 15 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 14;
  • FIG. 15 is a block diagram showing a modification of the inrush determination section of FIG. 14;
  • 4 is a block diagram showing a specific configuration example of an inrush determination section included in the A-phase calculation section of FIG. 3 in the transformer protection relay of Embodiment 5.
  • FIG. FIG. 18 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 17;
  • FIG. 12 is a block diagram showing an example of a functional configuration of an A-phase calculation unit in the calculation processing unit in the transformer protection relay of Embodiment 6.
  • FIG. 7 is a diagram showing calculation results of an A-phase inrush current waveform when the voltage application phase is 0°.
  • FIG. 20A is an enlarged view of a portion from 0.089 seconds to 0.091 seconds in FIG. 20A.
  • FIG. 7 is a diagram showing calculation results of an A-phase inrush current waveform when the voltage application phase is 30°.
  • FIG. 21A is an enlarged view of a portion from 0.0875 seconds to 0.0895 seconds in FIG. 21A.
  • FIG. 7 is a diagram showing calculation results of an A-phase inrush current waveform when the voltage application phase is 60°.
  • FIG. 7 is a diagram showing calculation results of an A-phase inrush current waveform when the voltage application phase is 120°.
  • FIG. 23A is an enlarged view of a portion from 0.084 seconds to 0.086 seconds in FIG. 23A.
  • FIG. 1 is a diagram for explaining the connection between a transformer and its protection relay.
  • a three-phase transformer 1 shown in FIG. 1 is a Y ⁇ transformer including a Y-connected primary winding 2 and a ⁇ -connected secondary winding 3. Note that the three-phase transformer 1 is not limited to the Y ⁇ transformer, but may be other types of transformers such as a YY transformer or a ⁇ transformer.
  • the three-phase lines 5A, 5B, and 5C on the primary side connected to the primary winding 2 of the three-phase transformer 1 are provided with current transformers CT1A, CT1B, and CT1C, respectively (hereinafter collectively referred to as current transformer CT1).
  • Current transformer CT1A detects current I1A flowing through A-phase line 5A
  • current transformer CT1B detects current I1B flowing through B-phase line 5B
  • current transformer CT1C detects current I1C flowing through C-phase line 5C. Detect.
  • the first end of each current transformer CT1 is connected to a common ground pole GND, and the second end of each current transformer CT1 is connected to the input transformer (11 in FIG. 2) of the corresponding channel of the transformer protection relay 4. connected to the primary side of the That is, current transformers CT1A, CT1B, and CT1C are Y-connected.
  • three-phase lines 6A, 6B, and 6C on the secondary side connected to the secondary winding 3 of the three-phase transformer 1 are connected to current transformers CT2A, CT2B, and CT2C (current transformers CT2A, CT2B, and CT2C, respectively).
  • CT2A current transformers CT2A, CT2B, and CT2C
  • CT2C current transformers CT2A, CT2B, and CT2C, respectively.
  • CT2C current transformers CT2A flowing through A-phase line 6A
  • current transformer CT2B detects current I2B flowing through B-phase line 6B
  • current transformer CT2C detects current I2C flowing through C-phase line 6C. Detect.
  • the first end of each current transformer CT2 is connected to a common ground pole GND, and the second end of each current transformer CT2 is connected to the input transformer (11 in FIG. 2) of the corresponding channel of the transformer protection relay 4. connected to the primary side of the That is, current transformers CT2A, CT2B, and CT
  • FIG. 2 is a block diagram showing an example of the hardware configuration of the transformer protection relay 4 of FIG. 1.
  • transformer protection relay 4 has a configuration similar to that of a so-called digital relay.
  • the transformer protection relay 4 includes an input conversion section 10, an A/D conversion section 20, an arithmetic processing section 30, and an I/O (Input and Output) section 40.
  • the input conversion unit 10 includes auxiliary transformers 11_1, 11_2, . . . for each input channel.
  • the input conversion unit 10 receives signals representing primary side currents I1A, I1B, and I1C output from current transformers CT1A, CT1B, and CT1C, respectively, and secondary side currents output from current transformers CT2A, CT2B, and CT2C, respectively.
  • Signals representing currents I2A, I2B, and I2C are individually taken in through six auxiliary transformers 11.
  • Each auxiliary transformer 11 converts these input signals into signals at a voltage level suitable for signal processing in the A/D conversion section 20 and the arithmetic processing section 30.
  • the A/D conversion unit 20 includes analog filters (AF) 21_1, 21_2, ..., sample hold circuits (S/H) 22_1, 22_2, ..., and a multiplexer (MPX) 23. , and an A/D converter 24. Analog filter 21 and sample hold circuit 22 are provided for each channel of input conversion section 10.
  • Each analog filter 21 is a low-pass filter or a band-pass filter provided to remove aliasing errors during A/D conversion.
  • Each sample and hold circuit 22 samples and holds the signal that has passed through the corresponding analog filter 21 at a specified sampling frequency.
  • the multiplexer 23 sequentially selects the voltage signals held in the sample and hold circuits 22_1, 22_2, .
  • A/D converter 24 converts the signal selected by multiplexer 23 into a digital value.
  • the arithmetic processing unit 30 includes a CPU (Central Processing Unit) 31, a RAM (Random Access Memory) 32, a ROM (Read Only Memory) 33, and a bus 34 connecting these.
  • the CPU 31 controls the overall operation of the transformer protection relay 4 by operating according to a program.
  • RAM32 and ROM33 are used as main memory of CPU31.
  • an electrically rewritable non-volatile memory such as an EEPROM (Electrically Erasable Programmable ROM) and a flash memory as a storage medium of the ROM 33, programs, setting values for signal processing, etc. can be stored.
  • the I/O section 40 includes a digital input (D/I) circuit 41 and a digital output (D/O) circuit 42.
  • the digital input circuit 41 and the digital output circuit 42 are interface circuits for inputting and outputting digital signals between the CPU 31 and an external device.
  • the digital output circuit 42 outputs a trip signal to a related circuit breaker according to a command from the CPU 31.
  • the arithmetic processing unit 30 may be realized as an electronic circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array), or one of the CPU, ASIC, and FPGA. It may be realized by combining two or more.
  • ASIC Application Specific Integrated Circuit
  • FPGA Field Programmable Gate Array
  • FIG. 3 is a block diagram for explaining signal processing in the arithmetic processing section.
  • the calculation processing unit 30 functionally includes Y/ ⁇ conversion units 50 and 51, gain adjustment units 52 and 53, an A phase calculation unit 54, a B phase calculation unit 55, and a C and a phase calculation section 56.
  • the Y/ ⁇ converters 50 and 51 convert the line current of the Y connection into the line current of the ⁇ connection.
  • the primary winding 2 is a Y winding
  • the secondary winding 3 is a ⁇ winding.
  • the phases of the line currents I2A, I2B, and I2C detected by the current transformer CT2 on the secondary side are delayed by 30° (corresponding to the 1 o'clock direction).
  • the phases of the two are matched.
  • Y/ ⁇ conversion is performed on both the primary and secondary sides in order to cancel the zero-sequence current in the case of an external ground fault.
  • no Y/ ⁇ conversion is performed on either the primary or secondary side.
  • the primary side current transformers CT1A, CT1B, CT1C may be connected in a ⁇ manner so that the primary and secondary sides of the transformer 1 are in phase. . Thereby, the phase of the current detected by the primary-side current transformer CT1 and the phase of the detected current by the secondary-side current transformer CT2 can be aligned.
  • the gain adjustment unit 52 calculates the final primary currents I'1A, I'1B, and I'1C by multiplying the Y/ ⁇ -converted primary current by a constant M1. Similarly, the gain adjustment unit 53 calculates the final secondary currents I'2A, I'2B, and I'2C by multiplying the secondary current by a constant M2. Constants M1 and M2 are determined by adjusting the transformation ratio of the three-phase transformer 1 and the primary and secondary sides so that the fundamental wave component of the primary current and the fundamental wave component of the secondary current cancel in the case of an external fault. It is determined in advance according to the CT ratio of current transformers CT1 and CT2.
  • the A-phase calculation unit 54 uses the A-phase primary current I'1A and the A-phase secondary current I'2A to perform current differential relay calculation using the ratio differential method and inrush current for the A-phase. The presence/absence is determined.
  • the B-phase calculation unit 55 performs a current differential relay calculation using the ratio differential method for the B-phase using the B-phase primary current I'1B and the B-phase secondary current I'2B. The presence or absence of rush current is determined.
  • the C-phase calculation unit 56 uses the C-phase primary current I'1C and the C-phase secondary current I'2C to perform current differential relay calculation using the ratio differential method and inrush current for the C-phase. The presence/absence is determined. Since the A-phase calculation unit 54, the B-phase calculation unit 55, and the C-phase calculation unit 56 have similar configurations, the configuration of the A-phase calculation unit 54 will be described below as a representative.
  • FIG. 4 is a block diagram showing an example of the functional configuration of the A-phase calculation section 54 in FIG. 3.
  • A-phase calculation unit 54 includes filters 60, 61, 66, 67, 68, differential current calculation unit 62, suppression current calculation unit 63, ratio differential relay calculation unit 64, and harmonic It includes a wave difference current calculation unit 65, effective value calculation units 69, 70, 71, content rate calculation units 72, 73, 74, an inrush determination unit 75, and an AND calculation unit 76.
  • the filter 60 receives input of time series data of the A-phase primary current I'1A, passes the fundamental wave component (1f) of the power system, and filters out the DC component, the second harmonic component (2f), and the third harmonic component. It is configured as a bandpass filter that suppresses other components such as a wave component (3f) and a fourth harmonic component (4f). Similarly, the filter 61 is configured as a bandpass filter that receives the A-phase secondary current I'2A, passes the fundamental wave component (1f) of the power system, and suppresses other components.
  • the difference current calculation unit 62 calculates the time series data of the fundamental wave component I'1A 1f of the A-phase primary current that has passed through the filter 60 and the fundamental wave component I'2A 1f of the A-phase secondary current that has passed through the filter 61. calculate the effective value of the sum (i.e., vector sum) with the time series data.
  • the difference current calculation unit 62 can calculate the difference between the fundamental wave component of the primary current and the secondary current.
  • the effective value of the difference from the fundamental wave component is calculated as the difference current IdA 1f .
  • the suppression current calculation unit 63 calculates the effective value of the fundamental wave component I'1A 1f of the A-phase primary current that has passed through the filter 60 and the fundamental wave component I'2A 1f of the A-phase secondary current that has passed through the filter 61.
  • the ratio differential relay calculation unit 64 uses the difference current IdA 1f and the suppression current IrA 1f to determine whether an internal failure has occurred in the A-phase winding of the three-phase transformer 1. Specifically, the ratio differential relay calculation unit 64 sets ratio setting values as C1 and C1', and sets minimum setting values as C2 and C2'. IdA 1f ⁇ C1 ⁇ Ird 1f +C2...(4A) IdA 1f ⁇ C1' ⁇ Ird 1f +C2'...(4B) If both are satisfied, it is determined that there is an internal failure. The ratio differential relay calculation unit 64 outputs a relay operation signal for opening an external circuit breaker or the like when it is determined that there is an internal failure.
  • the filter 66 receives input of time series data of the difference current IdA, passes the second harmonic component (2f), and passes through the DC component, fundamental wave component (1f), third harmonic component (3f), and fourth harmonic component. It is configured as a bandpass filter that suppresses other components such as the wave component (4f).
  • the filter 67 receives input of time-series data of the difference current IdA, passes the third harmonic component (3f), and passes the DC component, fundamental component (1f), second harmonic component (2f), It is configured as a bandpass filter that suppresses other components such as the fourth harmonic component (4f).
  • the filter 68 receives input of time series data of the difference current IdA, passes the fourth harmonic component (4f), direct current component, fundamental wave component (1f), second harmonic component (2f), and the fourth harmonic component (4f). It is configured as a bandpass filter that suppresses other components such as the third harmonic component (3f).
  • the filter calculations by the filters 66 to 68 are first performed on the time series data of the A-phase primary current I'1A and the time series data of the A-phase secondary current I'2A, and then the harmonic components are The vector sum of the A-phase primary current and the A-phase secondary current may be calculated by the difference current calculation unit 65 for each time.
  • the effective value calculation unit 69 calculates the effective value IdA 2f of the second harmonic component of the difference current that has passed through the filter 66. Similarly, the effective value calculation unit 70 calculates the effective value IdA 3f of the third harmonic component of the difference current that has passed through the filter 67. The effective value calculation section 71 calculates the effective value IdA 4f of the fourth harmonic component of the difference current that has passed through the filter 68.
  • the content calculation unit 72 calculates the effective value IdA 1f of the fundamental wave component of the A-phase difference current calculated by the difference current calculation unit 62 and the effective value IdA 1f of the second harmonic component of the A-phase difference current calculated by the effective value calculation unit 69. Receives input of value IdA 2f . Then, the content calculation unit 72 calculates the ratio IdA 2f /IdA 1f of the effective value IdA 2f of the second harmonic component of the A phase difference current to the effective value IdA 1f of the fundamental wave component of the A phase difference current. Calculate as a percentage.
  • the content calculation unit 73 calculates the effective value IdA 1f of the fundamental wave component of the A phase difference current calculated by the difference current calculation unit 62 and the third harmonic of the A phase difference current calculated by the effective value calculation unit 70. An input of the effective value IdA 3f of the component is received. Then, the content calculation unit 73 calculates the ratio IdA 3f /IdA 1f of the effective value IdA 3f of the third harmonic component of the A phase difference current to the effective value IdA 1f of the fundamental wave component of the A phase difference current. Calculate as a percentage.
  • the content calculation unit 74 calculates the effective value IdA 1f of the fundamental wave component of the A-phase difference current calculated by the difference current calculation unit 62 and the effective value IdA 1f of the fourth harmonic component of the A-phase difference current calculated by the effective value calculation unit 71. Receives input of value IdA 4f . Then, the content calculation unit 74 calculates the ratio IdA 4f /IdA 1f of the effective value IdA 4f of the fourth harmonic component of the A phase difference current to the effective value IdA 1f of the fundamental wave component of the A phase difference current, Calculate as a percentage.
  • the inrush determination unit 75 determines at least the second harmonic content rate of the harmonic content rate of the A phase, which is the own phase, calculated by the content rate calculation units 72 to 74, and the second harmonic content rate of the other two phases. It is determined whether or not an inrush current is occurring in the A phase, which is the own phase. When the inrush determination unit 75 determines that an inrush current is generated, it activates a lock signal for locking the relay output. A specific method for determining whether an inrush current is generated will be described later with reference to FIGS. 5 to 18.
  • the AND operator 76 calculates the logical product of the relay operation signal output from the ratio differential relay operation unit 64 and the inverted signal of the lock signal output from the inrush determination unit 75. Therefore, when the lock signal is in the active state, the output of the AND operator 76 becomes inactive, and the relay output is locked.
  • the A phase may be changed to the B phase in the above description, and in the case of the C phase calculation section 56, the A phase may be changed to the C phase in the above description. good. Therefore, detailed explanation will not be repeated.
  • FIG. 5 is a diagram summarizing the characteristics of individual determination conditions for inrush current generation used in the present disclosure in a table format. The characteristics of the determination conditions A to F will be explained below with reference to FIG.
  • Judgment condition A is the condition that the second harmonic content included in the difference current between the primary side and the secondary side is larger than the set value K1 in one of the three phases (i.e., the second harmonic three-phase OR judgment method). ).
  • the second harmonic content of any one of the three phases becomes considerably large when an inrush current is generated, according to determination condition A, the occurrence of an inrush current can be reliably detected. Further, if a one-phase failure occurs inside the transformer while an inrush current is generated, the second harmonic is not detected in the failure phase because the failure current has a small amount of second harmonic. However, since inrush current is included in phases that are not faulty phases, there is a possibility that detection of inrush current will continue.
  • Judgment condition B is an individual judgment condition for each phase of the transformer, and is a condition that the second harmonic content included in the difference current between the primary side and the secondary side of the own phase is greater than the set value K2 (i.e. , second harmonic phase determination method).
  • the set value K2 is set to a value smaller than when the content rate of the second harmonic included in the inrush current is the minimum, so the occurrence of the inrush current can be reliably detected.
  • the second harmonic content rate may temporarily become less than the set value K2. In this case, in-rush current temporarily becomes undetectable for a phase in which the second harmonic content rate temporarily decreases.
  • Judgment condition C is an individual judgment condition for each phase of the transformer, and is a judgment condition for the second harmonic, third harmonic, and fourth harmonic included in the difference current between the primary side and the secondary side of the own phase.
  • the condition is that the sum of each content rate is greater than the set value K3.
  • the set value K3 is set to a value smaller than the sum of the content rates of each of the second harmonic, third harmonic, and fourth harmonic included in the inrush current.
  • the occurrence of inrush current can be detected reliably.
  • the temporary drop in the second harmonic can be compensated for by the third harmonic and the fourth harmonic.
  • the fault current contains harmonics and that these harmonics are detected. However, this resonance decays within a few cycles and the harmonics become undetectable. If the fault current contains almost no harmonics because the transformer is connected to an overhead line, the harmonics will go undetected immediately after the fault occurs.
  • Judgment condition D is the condition that the second harmonic content included in the difference current between the primary side and the secondary side in any two of the three phases is both greater than the set value K1 (that is, the second harmonic content rate of the second harmonic 2 (phase AND judgment method).
  • the set value K1 is set to the same value as in the case of determination condition A, for example, 15%.
  • determination condition D there may be a case where the second harmonic content rate is larger than the above set value K1 in only one of the three phases. Therefore, although it is possible to detect the occurrence of inrush current in most cases, it cannot be said that it can be detected reliably.
  • the detected value of the three-phase CT is converted to the line current when it is ⁇ -connected, so even in the case of a one-phase failure of the transformer, the fault current is transferred to the transformer. Detected on two phases of the device. Therefore, if a one-phase failure occurs inside the transformer while an inrush current is being generated, the inrush current will definitely not be detected.
  • Judgment condition E is an individual judgment condition for each phase of the transformer, and is the sum of the contents of the second harmonic and fourth harmonic included in the difference current between the primary side and the secondary side of the own phase. is larger than the set value K4.
  • the set value K4 is set to a value smaller than the sum of the respective content rates of the second harmonic and the fourth harmonic included in the inrush current, so that the generation of the inrush current is prevented. Can be detected reliably. There is an advantage that the temporary drop in the second harmonic can be compensated for by the fourth harmonic.
  • the transformer is connected to a power transmission line with a large ground capacitance, such as a relatively long power cable, The ground capacitance component of the power transmission line and the inductive component of the transformer winding may cause a resonance phenomenon with a resonant frequency close to the second harmonic.
  • Judgment condition F is obtained by changing the setting value K1 of judgment condition D to K2. That is, the determination condition F is a condition that the second harmonic content included in the difference current between the primary side and the secondary side in any two of the three phases is both larger than the set value K2.
  • the set value K2 is set to a value smaller than that when the content rate of the second harmonic included in the inrush current is the minimum, so the occurrence of the inrush current can be reliably detected.
  • the second harmonic content rate may temporarily become less than the set value K2.
  • the detected value of the three-phase CT is converted to the line current when it is ⁇ -connected, so even if the transformer has a one-phase failure, the fault current is transferred to the transformer. Detected on two phases of the device. Therefore, if a one-phase failure occurs inside the transformer while an in-rush current is being generated, the in-rush current will definitely not be detected under the determination condition F.
  • FIG. 6 is a block diagram showing a specific example of the configuration of the inrush determining section 75 included in the A-phase calculating section 54 of FIG. 3.
  • the determination conditions of the in-rush determination section 75 in FIG. 6 are a combination of the aforementioned determination conditions A and B.
  • the second harmonic content rate IdA 2f /IdA 1f of the A phase is also expressed as (2f/1f)A.
  • the third harmonic content rate IdA 3f /IdA 1f of the A phase is also expressed as (3f/1f)A.
  • the fourth harmonic content rate IdA 4f /IdA 1f of the A phase is also expressed as (4f/1f)A. The same applies to the B phase and C phase.
  • the in-rush determination unit 75 includes determination units 80, 81, 82, and 83, an OR operator 84, and an AND operator 85.
  • the determining unit 80 determines whether the second harmonic content rate (2f/1f) A of the A phase is larger than the set value K1.
  • the determination unit 81 determines whether the second harmonic content rate (2f/1f)B of the B phase is larger than the set value K1.
  • the determination unit 82 determines whether the second harmonic content rate (2f/1f) C of the C phase is larger than the set value K1.
  • the set value K1 is, for example, 15%, which is a relatively large value.
  • the OR calculator 84 performs an OR operation on the determination results of the determination units 80, 81, and 82. Therefore, the output of the OR calculator 84 indicates that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the A, B, and C phases is lower than the set value K1. This indicates whether or not the determination condition A that the value is large is satisfied.
  • the determination unit 83 determines whether the second harmonic content (2f/1f)A of the A-phase, which is the own phase, is greater than the set value K2.
  • the set value K2 is, for example, 5%, which is significantly smaller than the set value K1.
  • the inrush determination unit 75 included in the B-phase calculation unit 55 in FIG. It is determined whether it is larger than K2.
  • the inrush determination unit 75 included in the C-phase calculation unit 56 in FIG. Determine whether or not. Therefore, for each phase of the three-phase transformer 1, it is determined whether or not the determination condition B that the content rate of the second harmonic included in the difference current between the primary side and the secondary side is greater than the set value K2 is met. That will happen.
  • the AND operator 85 performs an AND operation between the output of the OR operator 84 and the output of the determination unit 83.
  • the lock signal output from the AND operator 85 is in the active state, the relay output of the corresponding phase (A phase in the case of FIG. 6) is locked, and when the lock signal is inactive, the relay output of the corresponding phase ( A phase) relay output is not locked.
  • the B-phase and C-phase so if there is a phase for which the determination condition A is satisfied and the determination condition B is also satisfied, the protection relay output of that phase will be locked.
  • the second harmonic content rate of one phase among the three phases is always greater than the set value K1, and the second harmonic content rate of the remaining phases is always greater than the set value K1. Since the harmonic content rate is normally greater than the set value K2, the occurrence of inrush current can be detected. Further, when an internal failure occurs in the three-phase transformer 1, the second harmonic content rate decreases in the phase where the detected current value includes the fault current, since the fault current is mainly composed of the fundamental wave component. Therefore, even if the set value K2 is set to a value considerably lower than the set value K1, the occurrence of inrush current will not be detected in a phase where the detected current value includes a fault current.
  • FIG. 7 is a timing diagram illustrating the operation of the in-rush determination unit 75 of FIG. 6. The portion indicated by the thick line in FIG. 7 indicates that the determination condition is satisfied and the output signal is in the active state.
  • the phase with the smallest second harmonic content is the C phase.
  • the second harmonic content rate (2f/1f) C of the C phase exceeds the set value K2 at time t2, but does not exceed the set value K1.
  • the phase with the next lowest second harmonic content is the A phase.
  • the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t4, but does not exceed the set value K1 continuously and returns temporarily on the way.
  • the broken line indicates that the set value K1 is not continuously exceeded.
  • the transformer protection relay (4) of the first embodiment includes a first relay calculation section (64 of the A-phase calculation section 54), a second relay calculation section (64 of the B-phase calculation section 55), and a third relay calculation section (64 of the C-phase calculation section 56), a first judgment section (75 of the A-phase calculation section 54), a second judgment section (75 of the B-phase calculation section 55), and a third relay calculation section (64 of the C-phase calculation section 56).
  • 3 determination units 75 of the C phase calculation unit 56).
  • the first relay calculation section, the second relay calculation section, and the third relay calculation section (64) are connected to the first phase (A phase), the second phase (B phase), and the second phase (B phase) of the transformer (1). It is provided corresponding to each of the three phases (C phase), and performs current differential relay calculation based on the fundamental wave component included in the difference current between the primary side and the secondary side of the transformer of the corresponding phase.
  • the first determining section, the second determining section, and the third determining section (75) determine the first phase (A phase), the second phase (B phase), and the third phase ( C phase), and performs judgment to detect the occurrence of inrush current.
  • each of the first determining section, the second determining section, and the third determining section (75) is connected to the primary side of any one of the first phase, the second phase, and the third phase.
  • the first condition (condition A) that the content rate of the second harmonic included in the differential current with the secondary side is greater than the first set value (K1), and the difference between the primary side and the secondary side of the corresponding phase. It is determined whether the second condition (condition B) that the content rate of the second harmonic included in the difference current is greater than the second set value (K2) is satisfied.
  • the second set value (K2) is smaller than the first set value (K1).
  • Each of the first determining section, the second determining section, and the third determining section (75) determines whether the first condition (condition A) and the second condition (condition B) are both satisfied. Based on this, the output of the relay calculation unit (64) of the corresponding phase is locked.
  • the second harmonic content rate of one phase among the three phases is always larger than the first set value (K1), and the second harmonic content rate of the other phases is always higher than the first set value (K1). Since the wave content rate becomes larger than the second set value (K2), the occurrence of inrush current can be detected. Furthermore, when an internal failure occurs in the transformer (1) during the generation of inrush current, the second harmonic content rate decreases in the phase where the fault current is included in the detected current value, so the second set value ( Even if K2) is set to a low value, the generation of inrush current will not be detected.
  • the judgment conditions of the inrush judgment section 75 are the combination of judgment conditions A and judgment conditions B in the case of the first embodiment as the operating condition (set condition), and the judgment conditions B It is changed so that the return condition (reset condition) is when the condition is not satisfied for a certain period of time or more. Furthermore, the case where the above-mentioned determination condition D is no longer satisfied may be combined with the return condition.
  • FIG. 8 is a block diagram showing a specific configuration example of the inrush determination section 75 included in the A-phase calculation section 54 of FIG. 3 in the transformer protection relay 4 of the second embodiment.
  • the inrush determination unit 75 in FIG. 8 further includes a return timer 91 and a flip-flop 90 in addition to the configuration in FIG. 6 .
  • the same or corresponding parts as those in FIG. 6 are given the same reference numerals, and the description will not be repeated.
  • the configuration described with reference to FIGS. 1 to 4 is also common to the second embodiment.
  • the return timer 91 when the output of the determination unit 83 changes from the inactive state to the active state, the return timer 91 immediately changes its own output to the active state. On the other hand, the return timer 91 changes its own output to an inactive state when the output of the determination unit 83 changes from an active state to an inactive state and the inactive state continues for a set time T1 or more.
  • the determination condition B that the second harmonic content rate (2f/1f) A of the A phase determined by the determination unit 83 is larger than the set value K2 may not be satisfied temporarily for approximately one cycle.
  • a recovery timer 91 is provided to cover such a temporary decrease in the second harmonic content rate.
  • the set time T1 of the recovery timer 91 is set to approximately 2 cycles.
  • the flip-flop 90 receives the output signal SG1 of the AND operator 85 at its set terminal, and receives the inverted signal SG2 of the recovery timer 91 at its reset terminal.
  • the flip-flop 90 activates a lock signal for locking the relay output of the current phase when in a set state, and deactivates the above-mentioned lock signal when in a reset state.
  • the flip-flop 90 locks the relay output of its own phase by entering the set state when both the determination condition A and the determination condition B are satisfied. Further, the flip-flop 90 enters a reset state when the state in which the determination condition B is not satisfied continues for a set time T1, thereby releasing the locked state of the relay output of the own phase. In other words, if there is a phase in which the determination condition A is satisfied and the determination condition B is also satisfied, the relay output of that phase is locked. Further, when a state in which the determination condition B is not satisfied continues for a set time T1 in a phase in which the relay output is locked, the lock of the relay output in that phase is released.
  • the second harmonic content rate of one of the three phases is always set to the set value K1. Since the second harmonic content of the remaining phases becomes larger than the set value K2, the generation of inrush current can be reliably detected. Further, when an internal failure occurs in the three-phase transformer 1, the second harmonic content rate decreases in the phase where the detected current value includes the fault current, since the fault current is mainly composed of the fundamental wave component. Therefore, even if the set value K2 is set to a value considerably lower than the set value K1, the occurrence of inrush current will not be detected in the phase where the detected current value includes the fault current.
  • the set value K2 used in judgment condition B is set to a value smaller than the normal content rate of the phase where the second harmonic content rate of the inrush current is the minimum, but transiently the second harmonic content rate of this phase It is possible that the wave content rate becomes less than the set value K2.
  • a recovery timer 91 is provided to cover this period of transient decrease in the second harmonic content.
  • the ground capacitance component of the transmission line and the induced components of the transformer windings may cause a resonance phenomenon with a resonant frequency close to the second harmonic. If a second harmonic is detected in the fault current due to this resonance phenomenon, the relay output will continue to be locked. However, this resonance does not pose a major problem because it attenuates within a few cycles, the harmonics become undetectable, and the relay output is unlocked.
  • FIG. 9 is a timing diagram illustrating the operation of the in-rush determination unit 75 of FIG. 8. The portion indicated by the thick line in FIG. 9 indicates that the determination condition is satisfied and the output signal is in the active state.
  • the second harmonic content rate (2f/1f)B of the B phase exceeds the set value K1, so the determination condition A is satisfied.
  • the signal SG1 input to the set terminal of the flip-flop 90 becomes active, so the flip-flop 90 becomes set and the lock signal for locking the relay output becomes active.
  • the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t4, but does not continuously exceed the set value K1. Further, the second harmonic content rate (2f/1f) C of the C phase does not exceed the set value K1.
  • the second harmonic content rate (2f/1f) A of the A phase temporarily becomes less than or equal to the set value K2.
  • the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive.
  • the output signal SG2 of the return timer 91 is maintained in an active state, and the input to the reset terminal of the flip-flop 90 is maintained in an inactive state.
  • FIG. 10 is a block diagram showing a modification of the inrush determining section 75 of FIG. 8.
  • the in-rush determination unit 75 in FIG. 10 differs from the in-rush determination unit 75 in FIG. 8 in that it further includes AND calculation units 86, 87, and 88 and OR calculation units 89 and 92.
  • the AND operation unit 86 performs an AND operation on the determination results of the determination units 80 and 82.
  • the AND operation unit 87 performs an AND operation on the determination results of the determination units 81 and 82.
  • the AND operator 88 performs an AND operation on the determination results of the determination units 80 and 81.
  • the OR operator 89 performs an OR operation on the AND operation results of the AND operators 86, 87, and 88. Therefore, the output of the OR operator 89 is based on the judgment condition D that the content of the second harmonic included in the difference current between the primary side and the secondary side of any two of the three phases is both greater than the set value K1. It shows whether or not it holds true.
  • the OR operator 92 performs an OR operation between the output of the OR operator 89 indicating the determination result of condition D and the output of the recovery timer 91.
  • Flip-flop 90 receives a signal obtained by inverting output signal SG2 of OR operator 92 at its reset terminal. Since the other points in FIG. 10 are the same as in FIG. 8, the same or corresponding parts are given the same reference numerals and the description will not be repeated.
  • the flip-flop 90 locks the relay output of its own phase by entering the set state when both the determination condition A and the determination condition B are satisfied, which is similar to the case of FIG. be. That is, if there is a phase in which the determination condition A is satisfied and the determination condition B is also satisfied, the relay output of that phase is locked.
  • the flip-flop 90 enters a reset state when a state in which the judgment condition D is not satisfied and the judgment condition B is not satisfied continues for a set time T1, so that the relay output of the own phase is locked. Release. In other words, if the condition D is not satisfied and the condition B is not satisfied in the phase where the relay output is locked continues for the set time T1, the relay output of the phase is unlocked. be done.
  • the determination condition D is combined with the reset condition of the flip-flop 90.
  • Judgment condition D is provided to more reliably lock the relay output when an inrush current occurs.
  • the judgment condition D even if the period of transient decrease in the second harmonic content rate under the above-mentioned judgment condition B exceeds the set time T1 of the recovery timer 91, the relay output can be prevented from being unlocked.
  • the transformer protection relay 4 can be improved.
  • the calculation units (64 of the C-phase calculation unit 56) are provided corresponding to the first phase (A phase), second phase (B phase), and third phase (C phase) of the transformer (1), respectively.
  • current differential relay calculation is performed based on the fundamental wave component included in the difference current between the primary side and the secondary side of the transformer (1) of the corresponding phase.
  • the first determination section (75 of the A-phase calculation section 54), the second determination section (75 of the B-phase calculation section 55), and the third determination section (75 of the C-phase calculation section 56) are connected to the transformer ( They are provided corresponding to the first phase (A phase), second phase (B phase), and third phase (C phase) of 1), respectively, and perform determination to detect the occurrence of inrush current.
  • each of the first determining section, the second determining section, and the third determining section (75) is configured to detect the first phase, the second phase, and the third phase.
  • the first condition (condition A) is that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one phase is greater than the first set value (K1), and the corresponding phase It is determined whether a second condition (condition B) that the content rate of the second harmonic included in the difference current between the primary side and the secondary side is greater than the second set value (K2) is satisfied.
  • Each of the first determining section, the second determining section, and the third determining section (75) is set to a set state when both the first condition (condition A) and the second condition (condition B) are satisfied.
  • a flip-flop (90) that enters a reset state when a state in which the second condition (condition B) is not satisfied continues for a first set time (T1).
  • the flip-flop (90) locks the output of the relay calculation section of the corresponding phase when in the set state, and unlocks the output of the relay calculation section of the corresponding phase when it is in the reset state.
  • the second harmonic content of one of the three phases is always greater than the first set value (K1), and the second harmonic content of the remaining phases is always higher than the first set value (K1). Since the wave content rate is larger than the second set value (K2), the occurrence of inrush current can be reliably detected.
  • the second harmonic content rate will decrease in the phase where the fault current is included, so the second set value (K2) should be set to a lower value. In-rush current will not be detected even if the value is set to this value.
  • the transformer protection relay detects the occurrence of inrush current and reliably locks the relay output, and also releases the lock and operates the relay if a transformer failure occurs while inrush current is occurring. can be provided.
  • each of the first determining section, the second determining section, and the third determining section (75), in addition to the first condition (condition A) and the second condition (condition B), The content rate of the second harmonic included in the difference current between the primary side and the secondary side of any two phases among the first phase, second phase, and third phase is less than the first setting value (K1). It may be further determined whether the additional condition (condition D) that the value is large is met.
  • the additional condition (condition D) is combined with the reset condition of the flip-flop (90). That is, the flip-flop (90) enters the reset state when the additional condition (condition D) is not satisfied.
  • the relay output can be more reliably locked while an inrush current is occurring, and if an internal failure of the three-phase transformer 1 occurs while an inrush current is occurring, the relay output can be more reliably locked. Can be canceled.
  • Embodiment 3 The transformer protection relay 4 of the third embodiment is similar to the second embodiment in that among the determination conditions of the inrush determination section 75, determination conditions A and B are operating conditions (set conditions). be. On the other hand, as the return condition (reset condition), a combination of determination condition B and determination condition C described above is used. Further, as in the case of the second embodiment, the case where the above-mentioned determination condition D is no longer satisfied may be further combined as a return condition. A detailed description will be given below with reference to the drawings.
  • FIG. 11 is a block diagram showing a specific configuration example of the inrush determination section 75 included in the A-phase calculation section 54 of FIG. 3 in the transformer protection relay 4 of the third embodiment.
  • the in-rush determination unit 75 in FIG. 11 differs from the in-rush determination unit 75 in FIG. 8 in that it further includes a determination unit 93 and an OR calculator 92, and is not provided with a return timer 91.
  • the same reference numerals are attached to the same or corresponding parts as in FIGS. 6 and 8, and the description thereof will not be repeated. Further, the configuration described with reference to FIGS. 1 to 4 is also common to the third embodiment.
  • the determination section 93 determines the second harmonic content rate (2f/1f) A of the A phase, which is the own phase, and the A It is determined whether the sum of the third harmonic content rate (3f/1f) A of the phase and the fourth harmonic content rate (4f/1f) A of the A phase is larger than a set value K3.
  • the inrush determination unit 75 included in the B-phase calculation unit 55 in FIG. It is determined whether the sum of the third harmonic content rate (3f/1f) B of the B phase and the fourth harmonic content rate (4f/1f) B of the B phase is larger than a set value K3.
  • the inrush determination unit 75 included in the C phase calculation unit 56 in FIG. It is determined whether the sum of the third harmonic content rate (3f/1f) C of the phase and the fourth harmonic content rate (4f/1f) C of the C phase is larger than a set value K3. Therefore, for each phase of the three-phase transformer 1, the sum of the contents of the second harmonic, third harmonic, and fourth harmonic included in the difference current between the primary side and the secondary side is the set value. It is determined whether or not the determination condition C, which is greater than K3, is met.
  • the OR operator 92 performs an OR operation between the output of the determination section 93 indicating the determination result of condition C and the output of the determination section 83 indicating the determination result of condition B.
  • Flip-flop 90 receives output signal SG1 from AND operator 85 at its set terminal, and receives an inverted signal of output signal SG3 from OR operator 92 at its reset terminal. When flip-flop 90 is in the set state, it activates a lock signal for locking the relay output of its own phase, and when flip-flop 90 is in the reset state, it activates the lock signal.
  • the flip-flop 90 locks the relay output of its own phase by entering the set state when both the determination condition A and the determination condition B are satisfied.
  • the flip-flop 90 enters a reset state when neither the determination condition B nor the determination condition C is satisfied, thereby releasing the lock of the relay output of the own phase. In other words, when neither determination condition B nor determination condition C is satisfied in a phase in which the relay output is locked, the relay output of that phase is unlocked.
  • the determination unit 93 may determine whether the above-mentioned condition E is satisfied instead of the condition C. That is, in the case of the A-phase calculation unit 54, the determination unit 93 determines the second harmonic content rate (2f/1f) A of the A phase, which is the own phase, and the fourth harmonic content rate (4f/1f) A of the A phase, which is the own phase. It is determined whether the sum is greater than a set value K4. The same applies to the B-phase calculation section 55 and the C-phase calculation section 56. When a large fault current flows and the current transformer CT is saturated, the current signal is distorted and a third harmonic is generated. By using condition E, which does not use the third harmonic, in place of condition C, it is possible to avoid the influence of the third harmonic. Therefore, unnecessary locking of the relay output can be prevented from continuing when the current transformer CT is saturated.
  • the inrush determination unit 75 According to the configuration of the inrush determination unit 75 described above, even if the second harmonic content rate of the A phase temporarily becomes lower than the set value K2 and the condition B is no longer satisfied, the condition C (or the condition By establishing E), it is possible to prevent the relay output from becoming unlocked. Therefore, the recovery timer 91 that was necessary in the second embodiment is no longer necessary, so faster operation can be expected than in the second embodiment.
  • the ground capacitance of the transmission line increases.
  • the capacitive component and the transformer winding-induced component may cause a resonance phenomenon with a resonant frequency close to the second harmonic. Therefore, if the second harmonic is detected in the fault current due to this resonance phenomenon, the relay output will continue to be locked.
  • this resonance does not pose a major problem because it attenuates within a few cycles, the harmonics become undetectable, and the relay output is unlocked.
  • FIG. 12 is a timing diagram illustrating the operation of the in-rush determining section 75 in FIG. 11. The portion indicated by the thick line in FIG. 12 indicates that the determination condition is satisfied and the output signal is in the active state.
  • the second harmonic content rate (2f/1f)B of the B phase exceeds the set value K1, so the determination condition A is satisfied.
  • the signal SG1 input to the set terminal of the flip-flop 90 becomes active, so the flip-flop 90 becomes set, and the lock signal for locking the A-phase relay output becomes active.
  • the second harmonic content rate (2f/1f) B of the B phase is the largest, and the second harmonic content rate (2f/1f) B of the A phase is the highest.
  • a case is shown in which the content rate (2f/1f) A and the second harmonic content rate (2f/1f) C of the C phase are close to each other and relatively small.
  • the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t4, but does not continuously exceed the set value K1.
  • the second harmonic content rate (2f/1f) C of the C phase also exceeds the set value K1 after that, but does not continuously exceed the set value K1.
  • the second harmonic content rate (2f/1f) A of the A phase may transiently decrease below the set value K2.
  • the second harmonic content rate (2f/1f) A of the A phase temporarily becomes less than or equal to the set value K1.
  • the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive.
  • the second harmonic content (2f/1f) A, the third harmonic content (3f/1f) A, and the fourth harmonic content (4f/1f) A of phase A are Since the state in which the sum is greater than the set value K3 (condition C is satisfied) is maintained, the output signal SG3 of the OR operator 92 is maintained in the active state. As a result, the input to the reset terminal of flip-flop 90 is maintained in an inactive state.
  • the sum of the second harmonic content rate (2f/1f) A, the third harmonic content rate (3f/1f) A, and the fourth harmonic content rate (4f/1f) A of the A phase. becomes below the set value K3.
  • the output signal SG3 of the OR operator 92 becomes inactive, so that the input of the reset terminal of the flip-flop 90 becomes active.
  • the flip-flop 90 enters the reset state, the lock signal output from the flip-flop 90 becomes inactive, and the relay output is unlocked.
  • FIG. 13 is a block diagram showing a modification of the inrush determination section 75 of FIG. 11.
  • the in-rush determination unit 75 in FIG. 13 differs from the in-rush determination unit 75 in FIG. 11 in that it further includes AND calculation units 86, 87, and 88 and an OR calculation unit 89.
  • AND operators 86, 87, 88 and OR operator 89 are connected in the same manner as in FIG. Therefore, the output of the OR operator 89 is based on the judgment condition D that the content of the second harmonic included in the difference current between the primary side and the secondary side of any two of the three phases is both greater than the set value K1. It shows whether or not it holds true.
  • the OR operator 92 performs an OR operation on the output of the OR operator 89 indicating the determination result of condition D, the output of the determination unit 93 indicating the determination result of condition C, and the output of the determination unit 83 indicating the determination result of condition B. Perform calculations.
  • Flip-flop 90 receives a signal obtained by inverting output signal SG2 of OR operator 92 at its reset terminal. Other points in FIG. 13 are the same as those in FIG. 11, so the same or corresponding parts are given the same reference numerals and the description will not be repeated.
  • the point that the flip-flop 90 locks the relay output of its own phase by entering the set state when both the determination condition A and the determination condition B are satisfied is the same as in the case of FIG. be. That is, if there is a phase in which the determination condition A is satisfied and the determination condition B is also satisfied, the relay output of that phase is locked.
  • the flip-flop 90 enters the reset state and releases the locked state of the relay output of its own phase.
  • judgment condition D is not satisfied and neither judgment condition B nor judgment condition C is satisfied in the phase in which the relay output is locked, the relay output of that phase is unlocked. Ru.
  • the determination condition E may be used instead of the determination condition C.
  • determination condition D is provided to more reliably lock the relay output when an inrush current occurs. Although it is rare that the second harmonic content of only one of the three phases exceeds the set value K1, in most cases the second harmonic content of two of the three phases exceeds the set value K1. Therefore, by using judgment condition D, even if both judgment condition B and judgment condition C described above may not be satisfied transiently when an inrush current occurs, it is possible to supplement the relay output so that it does not become unlocked. .
  • the first relay calculation section (64 of the A phase calculation section 54), the second relay calculation section (64 of the B phase calculation section 55), and the third relay calculation section (64 of the C phase calculation unit 56) is provided corresponding to the first phase (A phase), second phase (B phase), and third phase (C phase) of the transformer (1), and Current differential relay calculation is performed based on the fundamental wave component included in the difference current between the primary and secondary sides of the transformer of the phase.
  • the first determination section (75 of the A-phase calculation section 54), the second determination section (75 of the B-phase calculation section 55), and the third determination section (75 of the C-phase calculation section 56) are connected to the transformer ( They are provided corresponding to the first phase (A phase), second phase (B phase), and third phase (C phase) of 1), respectively, and perform determination to detect the occurrence of inrush current.
  • each of the first determination section, the second determination section, and the third determination section (75) satisfies the first condition (condition A) in the case of Embodiment 2.
  • the second condition (condition B) the content rate of each of the second harmonic, third harmonic, and fourth harmonic included in the difference current between the primary side and the secondary side of the corresponding phase. It is determined whether the third condition (condition C) that the sum of the values is greater than the third set value (K3) is satisfied.
  • Each of the first determining section, the second determining section, and the third determining section (75) is set to a set state when both the first condition (condition A) and the second condition (condition B) are satisfied.
  • a flip-flop (90) that enters a reset state when neither the second condition (condition B) nor the third condition (condition C) is satisfied.
  • the flip-flop (90) locks the output of the relay calculation unit (64) of the corresponding phase when in the set state, and unlocks the output of the relay calculation unit (64) of the corresponding phase when it is in the reset state.
  • the second harmonic content rate of one of the three phases is always set to the first set value (K1 ), and the second harmonic content of the other phase becomes larger than the second set value (K2), so the occurrence of an inrush current can be detected. Furthermore, when an internal failure occurs in the transformer (1) during the generation of inrush current, the second harmonic content rate decreases in the phase where the fault current is included in the detected current value, so the second set value ( Even if K2) is set to a low value, the generation of inrush current will not be detected.
  • the transformer protection relay detects the occurrence of inrush current and reliably locks the relay output, and also releases the lock and operates the relay if a transformer failure occurs while inrush current is occurring. can be provided.
  • condition E that the value is larger than the value (K4) may be used.
  • each of the first determining section, the second determining section, and the third determining section (75) satisfies the first condition (condition A), the second condition (condition B), and In addition to the third condition (condition C or condition E), the second harmonic contained in the difference current between the primary side and the secondary side of any two phases among the first phase, second phase, and third phase. It may be further determined whether or not the additional condition (condition D) that the content rates of are both greater than the first set value (K1) is satisfied.
  • the additional condition (condition D) is combined with the reset condition of the flip-flop (90). That is, the flip-flop (90) enters the reset state when the additional condition (condition D) is not satisfied.
  • the relay output can be more reliably locked while an inrush current is occurring, and if an internal failure of the three-phase transformer 1 occurs while an inrush current is occurring, the relay output can be more reliably locked. Can be canceled.
  • Embodiment 4 In the transformer protection relay 4 of the fourth embodiment, the condition for setting the flip-flop 90 to the reset state in the case of the third embodiment is changed to that only the determination condition C is not satisfied. A detailed description will be given below with reference to the drawings.
  • FIG. 14 is a block diagram showing a specific configuration example of the inrush determination section 75 included in the A-phase calculation section 54 of FIG. 3 in the transformer protection relay 4 of the fourth embodiment.
  • the in-rush determination unit 75 in FIG. 14 is not provided with the OR operator 92, and a signal obtained by inverting the logic of the output signal (SG3) of the determination unit 93 indicating the determination result of condition C is used to reset the flip-flop 90.
  • the output of the determining unit 83 indicating the determination result of condition B is different from the in-rush determining unit 75 of FIG. Therefore, the flip-flop 90 enters the reset state when the determination condition C is not satisfied, thereby unlocking the relay output of the own phase. In other words, when the determination condition C is not satisfied in a phase in which the relay output is locked, the relay output in that phase is unlocked.
  • FIG. 14 The other points in FIG. 14 are the same as in FIGS. 6, 8, and 11, so the same or corresponding parts are given the same reference numerals and the description will not be repeated. Further, the configuration described with reference to FIGS. 1 to 4 is also common to the fourth embodiment.
  • FIG. 15 is a timing diagram illustrating the operation of the in-rush determining section 75 in FIG. 14. The portion indicated by the thick line in FIG. 15 indicates that the determination condition is satisfied and the output signal is in the active state.
  • the sum of the second harmonic content rate (2f/1f) A, the third harmonic content rate (3f/1f) A, and the fourth harmonic content rate (4f/1f) A of the A phase is set. Exceeds the value K3. As a result, the output signal SG4 of the OR operator 92 becomes active, and the input of the reset terminal of the flip-flop 90 becomes inactive.
  • the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t5, but does not continuously exceed the set value K1. Further, the second harmonic content rate (2f/1f) C of the C phase does not exceed the set value K1.
  • the second harmonic content rate (2f/1f) A of the A phase temporarily becomes less than or equal to the set value K1.
  • the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive.
  • the failure of the determination condition B is not related to the reset of the flip-flop 90.
  • the sum of the second harmonic content rate (2f/1f) A, the third harmonic content rate (3f/1f) A, and the fourth harmonic content rate (4f/1f) A of the A phase. becomes below the set value K3.
  • the output signal SG4 of the OR operator 92 becomes inactive, so that the input of the reset terminal of the flip-flop 90 becomes active.
  • the flip-flop 90 enters the reset state, the lock signal output from the flip-flop 90 becomes inactive, and the relay output is unlocked.
  • FIG. 16 is a block diagram showing a modification of the inrush determining section 75 of FIG. 14.
  • the in-rush determination section 75 in FIG. 16 can be seen as a modification of the in-rush determination section 75 in FIG. 13. That is, in the inrush determination unit 75 of FIG. 16, the output of the OR operator 89 indicating the determination result of condition D and the output of the determination unit 93 indicating the determination result of condition C are input to the OR operator 92. This differs from the in-rush determination unit 75 of FIG. 13 in that the output of the determination unit 83 indicating the determination result of condition B is not input to the OR operator 92.
  • the flip-flop 90 enters the reset state when neither the determination condition C nor the determination condition D is satisfied, thereby releasing the lock of the relay output of the own phase. In other words, when the determination condition D is not satisfied and the determination condition C is not satisfied in the phase in which the relay output is locked, the relay output of the phase is unlocked.
  • determination condition D is provided to more reliably lock the relay output when an inrush current occurs. Although it is rare that the second harmonic content of only one of the three phases exceeds the set value K1, in most cases the second harmonic content of two of the three phases exceeds the set value K1. Therefore, by using the determination condition D, even if the above-mentioned determination condition C is not satisfied transiently when an inrush current occurs, it can be complemented so that the relay output is not unlocked.
  • the determination condition D may be combined with the reset condition of the flip-flop 90. That is, the flip-flop 90 enters the reset state when the determination condition C and the determination condition D are not satisfied.
  • the relay output can be more reliably locked while an inrush current is occurring, and if an internal failure of the three-phase transformer 1 occurs while an inrush current is occurring, the relay output can be more reliably locked. Can be canceled.
  • Embodiment 5 In the transformer protection relay 4 of Embodiment 5, a case will be described in which the occurrence of an inrush current is detected by a combination of the above-mentioned judgment condition A and judgment condition F. By detecting only the second harmonic of each phase, there is an advantage that locking and releasing of the relay output can be controlled with high reliability.
  • FIG. 17 is a block diagram showing a specific configuration example of the inrush determination section 75 included in the A-phase calculation section 54 of FIG. 3 in the transformer protection relay 4 of the fifth embodiment. Note that in the case of the B-phase calculation section 55 and the C-phase calculation section 56 in FIG. 3, an inrush determination section 75 having the same configuration as in the case of FIG. 17 is used.
  • in-rush determination section 75 includes determination sections 80, 81, 82, determination sections 83, 94, 95, OR operation units 84, 89, and AND operation units 85, 86, 87, 88. and a return timer 91.
  • the determining unit 80 determines whether the second harmonic content rate (2f/1f) A of the A phase is larger than the set value K1.
  • the determination unit 81 determines whether the second harmonic content rate (2f/1f)B of the B phase is larger than the set value K1.
  • the determination unit 82 determines whether the second harmonic content rate (2f/1f) C of the C phase is larger than the set value K1.
  • the set value K1 is set to a relatively large value (for example, 15%).
  • the OR calculator 84 performs an OR operation on the determination results of the determination units 80, 81, and 82. Therefore, the output of the OR calculator 84 indicates that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the A, B, and C phases is lower than the set value K1. This indicates whether or not the determination condition A that the value is large is satisfied.
  • the determination unit 83 determines whether the second harmonic content rate (2f/1f) A of the A phase is larger than the set value K2.
  • the determination unit 94 determines whether the second harmonic content rate (2f/1f)B of the B phase is larger than the set value K2.
  • the determination unit 95 determines whether the second harmonic content rate (2f/1f) C of the C phase is larger than the set value K2.
  • the set value K2 is set to a smaller value (for example, 5%) than the set value K1.
  • the AND operation unit 86 performs an AND operation on the determination results of the determination units 83 and 94.
  • the AND operation unit 87 performs an AND operation on the determination results of the determination units 94 and 95.
  • the AND operator 88 performs an AND operation on the determination results of the determination units 83 and 95.
  • the OR operator 89 performs an OR operation on the AND operation results of the AND operators 86, 87, and 88. Therefore, the output of the OR operator 89 is based on the judgment condition F that the content of the second harmonic included in the difference current between the primary side and the secondary side of any two of the three phases is both greater than the set value K2. It shows whether or not it holds true.
  • the return timer 91 When the output of the OR operator 89 changes from an inactive state to an active state, the return timer 91 immediately sets its own output to an active state. On the other hand, the return timer 91 changes its output to an inactive state when the OR calculator 89 changes from an active state to an inactive state and the inactive state continues for a set time T1 or more.
  • the AND operator 85 combines the output signal of the OR operator 84 indicating the determination result of condition A and the signal obtained by performing delay processing by the recovery timer 91 on the output of the OR operator 89 indicating the determination result of condition F. Perform an AND operation. When the lock signal output from the AND operator 85 becomes active, the relay output is locked, and when the lock signal output from the AND operator 85 becomes inactive, the relay output is unlocked. Ru.
  • the second harmonic content rate of one of the three phases is always larger than the set value K1, so the determination condition A is satisfied. Furthermore, at least immediately after the inrush current is generated, the second harmonic content of two of the three phases is always greater than the set value K2, so the determination condition F is satisfied. Therefore, according to the above configuration, the occurrence of inrush current can be detected reliably.
  • the fault current is always detected in two phases by applying Y/ ⁇ conversion to the current detected by the current transformer CT. be done.
  • the determination condition F no longer holds, and as a result, the relay output is reliably unlocked.
  • FIG. 18 is a timing diagram illustrating the operation of the in-rush determining section 75 of FIG. 17. The portion indicated by the bold line in FIG. 18 indicates that the determination condition is satisfied and the output signal is in the active state.
  • the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K2, so the determination condition F is satisfied. Furthermore, at time t3, the second harmonic content rate (2f/1f)B of the B phase exceeds the set value K1, so the determination condition A is satisfied. As a result, the lock signal output from the AND operator 85 becomes active, and the relay output is locked.
  • the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t4, but does not continuously exceed the set value K1.
  • the second harmonic content rate (2f/1f) C of the C phase exceeds the set value K2 at time t4, but does not exceed the set value K1.
  • the transformer protection relay (4) of Embodiment 5 applies to each of the first phase (A phase), second phase (B phase), and third phase (C phase) of the transformer (1).
  • a relay calculation unit (64) performs current differential relay calculation based on the fundamental wave component included in the difference current between the primary side and the secondary side of the transformer (1), and an inrush
  • the determination unit 75 includes a determination unit (75) that performs determination for detecting generation of current. The determination unit (75) determines whether the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the first phase, second phase, and third phase is set to a first setting.
  • the first condition (condition A) is that the value is larger than the value (K1), and the second condition included in the difference current between the primary side and the secondary side of any two phases among the first phase, second phase, and third phase. It is determined whether or not the second condition (condition F) that both harmonic content rates are larger than the second set value (K2) is satisfied. The second set value (K2) is smaller than the first set value (K1).
  • the determination unit (75) locks the output of the relay calculation unit (64) when the first condition (condition A) and the second condition (condition F) are both satisfied, and the first condition (condition A) is satisfied. When the second condition (condition F) is no longer satisfied or when the state in which the second condition (condition F) is no longer satisfied continues for the first set time (T1), the output of the relay calculation section is unlocked.
  • the second harmonic content rate of one of the three phases is always equal to or higher than the first set value (K1). ) holds true. Furthermore, at least immediately after the inrush current is generated, the second harmonic content of two of the three phases is always equal to or higher than the second set value (K2), so the second condition (condition F) is satisfied. Therefore, according to the above configuration, the occurrence of inrush current can be detected reliably.
  • condition F the second condition
  • condition F the state in which the second condition (condition F) no longer holds continues for the first set time (T1). Since the relay output is unlocked when this occurs, it is possible to prevent the relay output from being unlocked unnecessarily. Thereby, malfunction of the transformer protection relay (4) due to inrush current can be prevented.
  • Embodiment 6 It is known that when the iron core of a transformer deteriorates, the magnitude of the inrush current changes (see, for example, Japanese Patent No. 6840306 (Patent Document 2)). Therefore, it is necessary to appropriately change the set values K1 to K4 described in the first to fifth embodiments depending on the degree of deterioration of the transformer core. However, since the magnitude of the inrush current also changes depending on the voltage application phase and the residual magnetic flux, it is difficult to estimate the degree of deterioration of the transformer based on the magnitude of the inrush current.
  • dwell time the amount of change in the length of the low current flat portion that appears in the inrush current waveform
  • FIG. 19 is a block diagram showing an example of the functional configuration of the A-phase calculation unit 54 in the calculation processing unit 30 in the transformer protection relay 4 of the sixth embodiment.
  • the A-phase calculation unit 54 in FIG. 19 differs from the A-phase calculation unit 54 in FIG. 4 in that it further includes a dwell time measurement unit 96.
  • the dwell time measurement unit 96 measures the dwell time based on the current waveforms of the A-phase current I'1A on the primary side and the A-phase current I'2A on the secondary side of the three-phase transformer 1.
  • the dwell time measuring section 96 may measure the dwell time based on the difference current waveform (i.e., vector sum) between the A-phase current I'1A on the primary side and the A-phase current I'2A on the secondary side.
  • the dwell time measurement unit 96 measures the dwell time based on the difference current IdA output from the harmonic difference current calculation unit 65.
  • the duel time measuring section 96 changes the aforementioned set values K1 to K4 according to the amount of decrease in the measured duel time.
  • the dwell time decreases depending on the degree of deterioration of the transformer core. Furthermore, the amount of decrease in dwell time is constant regardless of the phase of voltage application to the transformer. Therefore, by increasing the aforementioned set values K1 to K4 in accordance with the amount of decrease in the dwell time, it is possible to accurately determine the occurrence of inrush current.
  • the amount of change in the actual set values K1 to K4 can be determined in advance by experiment or simulation.
  • the duel time measurement section 96 may be provided in the B-phase calculation section 55 or the C-phase calculation section 56.
  • the dwell time measuring section 96 may measure the dwell time based on a composite current of the difference current between the primary side and the secondary side of each of the A phase, B phase, and C phase.
  • the dwell time measuring section 96 may determine the final amount of change in the dwell time by averaging the amount of change in the dwell time of each phase.
  • the configuration of the A-phase calculation unit 54 other than the above, for example, the configuration of the inrush determination unit 75, is the same as in Embodiments 1 to 5, so detailed description will not be repeated. Further, the configurations shown in FIGS. 1 to 3 are also common to the sixth embodiment.
  • FIG. 20A is a diagram showing the calculation result of the A-phase inrush current waveform when the voltage application phase is 0°.
  • FIG. 20B is an enlarged view of the portion from 0.089 seconds to 0.091 seconds in FIG. 20A.
  • the current waveform before deterioration is shown by a solid line
  • the current waveform after deterioration is shown by a broken line.
  • the dwell time decreased from 11.6 ms (milliseconds) to 11.0 ms. Therefore, the amount of change is approximately 0.6 ms.
  • FIG. 21A is a diagram showing the calculation result of the A-phase inrush current waveform when the voltage application phase is 30°.
  • FIG. 21B is an enlarged view of a portion from 0.0875 seconds to 0.0895 seconds in FIG. 21A.
  • the current waveform before deterioration is shown by a solid line, and the current waveform after deterioration is shown by a broken line.
  • the dwell time decreased from 12.4 ms to 11.9 ms. Therefore, the amount of change is approximately 0.5 ms.
  • FIG. 22A is a diagram showing the calculation result of the A-phase inrush current waveform when the voltage application phase is 60°.
  • FIG. 22B is an enlarged view of the portion from 0.082 seconds to 0.084 seconds in FIG. 22A.
  • the current waveform before deterioration is shown by a solid line, and the current waveform after deterioration is shown by a broken line.
  • the dwell time decreased from 15.0 ms to 14.4 ms. Therefore, the amount of change is approximately 0.6 ms.
  • FIG. 23A is a diagram showing the calculation result of the A-phase inrush current waveform when the voltage application phase is 120°.
  • FIG. 23B is an enlarged view of the portion from 0.084 seconds to 0.086 seconds in FIG. 23A.
  • the current waveform before deterioration is shown by a solid line, and the current waveform after deterioration is shown by a broken line.
  • the dwell time decreased from 15.1 ms to 14.5 ms. Therefore, the amount of change is approximately 0.6 ms.
  • each set value K1 to K4 which is compared with the harmonic content, is changed based on the amount of change in the dwell time.
  • the set values K1 to K4 can be appropriately changed in response to changes in the inrush current waveform depending on the degree of deterioration of the transformer core, thereby increasing the accuracy of determining whether an inrush current is generated.

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Abstract

In a transformer protection relay (4), on the basis of whether or not both of a first condition (condition A) that second higher harmonic content percentage contained in a difference current between a primary side and a secondary side of one of phases is greater than a first set value (K1), and a second condition (condition B) that second higher harmonic content percentage contained in a difference current between a primary side and a secondary side of a corresponding phase is greater than a second set value (K2), are satisfied, a determining unit (75) for each phase locks output of a relay computing unit (64) of the corresponding phase. Here, the second set value (K2) is smaller than the first set value (K1).

Description

変圧器保護リレーおよび変圧器保護方法Transformer protection relay and transformer protection method
 本開示は、変圧器保護リレーおよび変圧器保護方法に関する。 The present disclosure relates to a transformer protection relay and a transformer protection method.
 2巻変圧器用の変圧器保護リレーでは、1次巻線および2次巻線に接続された電流変成器(CT:Current Transformer)によって1次および2次の巻線電流が検出される。変圧器保護リレーは、検出した1次および2次の巻線電流を用いて比率差動原理により内部故障の有無を判定する。 In a transformer protection relay for a two-turn transformer, primary and secondary winding currents are detected by a current transformer (CT) connected to the primary and secondary windings. The transformer protection relay uses the detected primary and secondary winding currents to determine whether there is an internal failure based on the ratio differential principle.
 変圧器への電圧投入時には励磁突入電流(インラッシュ電流とも称する)が生じる場合がある。インラッシュ電流が生じると1次巻線電流と2次巻線電流とに差が生じるために、変圧器保護リレーの誤動作の原因となる。 When voltage is applied to a transformer, excitation inrush current (also referred to as inrush current) may occur. When an inrush current occurs, a difference occurs between the primary winding current and the secondary winding current, which causes malfunction of the transformer protection relay.
 上記の誤動作の対策として、励磁突入電流には、高調波、特に第2高調波が発電機の基本波(定格周波数)成分に対して一定以上の割合で含まれることが利用される。具体的には、1次巻線電流と2次巻線電流との差電流に含まれる第2高調波成分の基本波成分に対する比率が第2高調波含有率として計算され、第2高調波含有率が一定以上の場合に差動リレー動作がロックされるかまたは抑制される。 As a countermeasure against the above-mentioned malfunction, it is utilized that the excitation inrush current contains harmonics, especially second harmonics, in a proportion higher than a certain level with respect to the fundamental wave (rated frequency) component of the generator. Specifically, the ratio of the second harmonic component to the fundamental wave component included in the difference current between the primary winding current and the secondary winding current is calculated as the second harmonic content rate, and the second harmonic content is calculated as the second harmonic content rate. Differential relay operation is locked or inhibited when the rate is above a certain level.
 しかしながら、インラッシュ電流は、変圧器の鉄心のヒステリシス特性、残留磁束、電圧投入位相などに依存して大きく変化するので、3相の励磁電流の中で、第2高調波含有率が大きくなる相や小さくなる相が生じる。このため、第2高調波含有率が設定値より大きい相だけ、その相の比率差動リレー動作をロックする方式(以下、第2高調波各相判定方式と称する)では、第2高調波含有率が他相に比べて小さい相では、変圧器保護リレーが誤動作する場合がある。 However, the inrush current varies greatly depending on the hysteresis characteristics of the transformer core, residual magnetic flux, voltage application phase, etc. A phase that becomes smaller and smaller occurs. For this reason, in the method (hereinafter referred to as the second harmonic each phase determination method) that locks the ratio differential relay operation of only the phase whose second harmonic content is larger than the set value, the second harmonic content The transformer protection relay may malfunction in a phase where the ratio is smaller than that of other phases.
 そこで、第2高調波含有率が設定値より大きい相が1相でもあれば、3相共に比率差動リレー動作をロックする方式(以下、第2高調波3相OR判定方式と称する)が用いられる場合がある。この方式によれば、高信頼度にインラッシュ電流の発生を検出できる。 Therefore, a method (hereinafter referred to as the second harmonic three-phase OR determination method) is used that locks the ratio differential relay operation for all three phases if there is even one phase with a second harmonic content rate higher than the set value. There may be cases where According to this method, the occurrence of inrush current can be detected with high reliability.
 また、特開平01-259720号公報(特許文献1)は、3相のうちのいずれか2相で第2高調波含有率が設定値より大きくなった場合に、3相共に比率差動リレー動作をロックする方式(以下、第2高調波2相AND判定方式と称する)を開示する。この文献において、第2高調波2相AND判定方式は、従来の第2高調波各相判定方式を補完するものとして提案されている。 In addition, Japanese Patent Application Laid-open No. 01-259720 (Patent Document 1) discloses that when the second harmonic content rate in any two of the three phases becomes larger than the set value, a ratio differential relay is activated for all three phases. (hereinafter referred to as the second harmonic two-phase AND determination method) is disclosed. In this document, a second harmonic two-phase AND determination method is proposed as a complement to the conventional second harmonic each phase determination method.
 なお、特許6840306号公報(特許文献2)は、インラッシュ電流の発生を判定する場合において第2高調波含有率と比較するための設定値を、変圧器特性の経時変化に応じて更新することを開示する。 Note that Japanese Patent No. 6840306 (Patent Document 2) discloses that when determining the occurrence of inrush current, a set value for comparison with the second harmonic content rate is updated in accordance with changes in transformer characteristics over time. Disclose.
特開平01-259720号公報Japanese Patent Application Publication No. 01-259720 特許6840306号公報Patent No. 6840306
 上記の第2高調波3相OR判定方式の変圧器保護リレーでは、インラッシュ電流の発生中に変圧器故障が生じた場合にリレー動作できないという問題がある。通常、変圧器がY結線の場合には三相CTの検出値はΔ結線の場合の線電流に変換される。したがって、変圧器の1相故障の場合には、変換後の2相分の線電流に故障電流が含まれる。故障電流は基本波成分がほとんどであるので、故障電流が検出される2相については第2高調波成分がほとんど検出されなくなるが、故障電流が検出されない1相については第2高調波成分の検出が継続する。この結果、第2高調波3相OR判定方式の変圧器保護リレーでは、励磁突入電流の発生中に変圧器の1相故障が生じた場合でもリレー動作のロックが継続してしまう。 The transformer protection relay using the second harmonic three-phase OR determination method described above has a problem in that the relay cannot operate if a transformer failure occurs while an inrush current is being generated. Normally, when the transformer is Y-connected, the detected value of the three-phase CT is converted into a line current when the transformer is Δ-connected. Therefore, in the case of a one-phase fault in a transformer, the fault current is included in the line current for two phases after conversion. Since most of the fault current is the fundamental wave component, the second harmonic component is hardly detected for the two phases where the fault current is detected, but the second harmonic component is not detected for the one phase where the fault current is not detected. continues. As a result, in the transformer protection relay using the second harmonic three-phase OR determination method, the relay operation continues to be locked even if a one-phase failure of the transformer occurs while the magnetizing inrush current is being generated.
 一方、上記の第2高調波2相AND判定方式の変圧器保護リレーにおいて、インラッシュ電流の発生中に変圧器故障が生じた場合には、いずれか2相の第2高調波含有率が低下する。したがって、確実にロックが外れて比率差動リレーが動作できるというメリットがある。 On the other hand, in the above-mentioned transformer protection relay using the second harmonic two-phase AND judgment method, if a transformer failure occurs while an inrush current is generated, the second harmonic content rate of any two phases decreases. do. Therefore, there is an advantage that the lock is reliably released and the ratio differential relay can operate.
 しかしながら、第2高調波2相AND判定方式の変圧器保護リレーでは、インラッシュ電流の発生を検出できない場合があり得る。一般に、インラッシュ電流の第2高調波含有率は1相については比較的大きいが、他の2相については比較的小さくなる。通常の場合には、一般的な設定値である15%をいずれか2相の第2高調波含有率は超えているので、インラッシュ電流の検出は可能である。しかしながら、変圧器の飽和電圧や残留磁束の影響によって場合によっては、いずれか1相の第2高調波含有率が15%を上回るが、他の2相の第2高調波含有率が15%を下回る場合がある。その場合には、第2高調波2相AND判定方式の変圧器保護リレーでは、励磁突入電流による誤動作を防止できない。 However, the transformer protection relay using the second harmonic two-phase AND determination method may not be able to detect the occurrence of inrush current. Generally, the second harmonic content of the inrush current is relatively large for one phase, but relatively small for the other two phases. In a normal case, since the second harmonic content of any two phases exceeds the general setting value of 15%, inrush current can be detected. However, in some cases, due to the effects of the transformer's saturation voltage and residual magnetic flux, the second harmonic content of any one phase exceeds 15%, but the second harmonic content of the other two phases exceeds 15%. It may be lower than that. In that case, the transformer protection relay using the second harmonic two-phase AND determination method cannot prevent malfunctions caused by the magnetizing inrush current.
 また、上記の設定値を10%未満に設定することは困難である。変圧器が設置されている電力系統に電力ケーブルのように静電容量成分が大きい送電線が用いられている場合には、故障時に変圧器の巻線のリアクトル成分と送電線の対地静電容量成分とが共振するために高調波が生じる。この場合において、電力ケーブルの長さが比較的長い場合には、共振周波数が第2高調波に近づくために第2高調波含有率が10%近くまで上昇するからである。このため、上記の設定値を10%未満にすることは難しく、一般的には10%から15%の範囲内で設定され、その中でも15%に設定する場合が多い。 Furthermore, it is difficult to set the above setting value to less than 10%. If the power system in which the transformer is installed uses transmission lines with large capacitance components, such as power cables, in the event of a failure, the reactor component of the transformer winding and the ground capacitance of the transmission line Harmonics are generated because the components resonate. In this case, if the length of the power cable is relatively long, the resonance frequency approaches the second harmonic, and the second harmonic content increases to nearly 10%. For this reason, it is difficult to set the above setting value to less than 10%, and it is generally set within the range of 10% to 15%, and among these, it is often set to 15%.
 本開示は、上記の問題点を考慮してなされたものであり、その目的の1つは、インラッシュ電流の発生を確実に検出してリレー出力をロックするとともに、インラッシュ電流の発生中に変圧器故障が発生した場合にロックを解除してリレー動作を行う変圧器保護リレーを提供することである。本開示のその他の目的および特徴は、以下の実施の形態において説明する。 The present disclosure has been made in consideration of the above problems, and one of its purposes is to reliably detect the occurrence of inrush current and lock the relay output, and to To provide a transformer protection relay that releases the lock and performs relay operation when a transformer failure occurs. Other objects and features of the present disclosure will be described in the embodiments below.
 一実施形態の変圧器保護リレーは、第1のリレー演算部、第2のリレー演算部、および第3のリレー演算部と、第1の判定部、第2の判定部、および第3の判定部とを備える。第1のリレー演算部、第2のリレー演算部、および第3のリレー演算部は、変圧器の第1相、第2相、および第3相にそれぞれ対応して設けられ、対応する相の変圧器の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行う。第1の判定部、第2の判定部、および第3の判定部は、変圧器の第1相、第2相、および第3相にそれぞれ対応して設けられ、インラッシュ電流の発生を検出するための判定を行う。第1の判定部、第2の判定部、および第3の判定部の各々は、第1相、第2相、および第3相のいずれか1相の一次側と二次側との差電流に含まれる第2高調波の含有率が第1の設定値より大きいという第1条件と、対応する相の一次側と二次側との差電流に含まれる第2高調波の含有率が第2の設定値より大きいという第2条件との成立の有無を判定する。第2設定値は第1の設定値よりも小さい。第1の判定部、第2の判定部、および第3の判定部の各々は、第1条件および第2条件が共に成立しているか否かに基づいて、対応する相のリレー演算部の出力をロックする。 The transformer protection relay of one embodiment includes a first relay calculation section, a second relay calculation section, a third relay calculation section, a first determination section, a second determination section, and a third determination section. It is equipped with a section. The first relay calculation section, the second relay calculation section, and the third relay calculation section are provided corresponding to the first phase, second phase, and third phase of the transformer, respectively, and are Current differential relay calculation is performed based on the fundamental wave component included in the difference current between the primary and secondary sides of the transformer. The first determination section, the second determination section, and the third determination section are provided corresponding to the first phase, second phase, and third phase of the transformer, respectively, and detect the occurrence of inrush current. Make a judgment to Each of the first determining section, the second determining section, and the third determining section has a difference current between the primary side and the secondary side of any one of the first phase, the second phase, and the third phase. The first condition is that the content rate of the second harmonic included in is larger than the first set value, and the content rate of the second harmonic included in the difference current between the primary side and the secondary side of the corresponding phase is the first condition. It is determined whether or not the second condition, which is greater than the set value of 2, is met. The second set value is smaller than the first set value. Each of the first determining section, the second determining section, and the third determining section determines the output of the relay calculating section of the corresponding phase based on whether the first condition and the second condition are both satisfied. lock.
 上記の実施形態によれば、変圧器保護リレーの各相の判定部は、いずれか1相の一次側と二次側との差電流に含まれる第2高調波の含有率が第1の設定値より大きいという第1条件と、対応する相の一次側と二次側との差電流に含まれる第2高調波の含有率が第2の設定値より大きいという第2条件とが共に成立していか否かに基づいて、対応するリレー演算部の出力をロックする。これにより、インラッシュ電流の発生を確実に検出してリレー出力をロックするとともに、インラッシュ電流の発生中に変圧器故障が発生した場合にロックを解除してリレー動作を行う変圧器保護リレーを提供できる。 According to the above embodiment, the determination unit for each phase of the transformer protection relay has a first setting that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one phase is The first condition that the value is larger than the second set value and the second condition that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of the corresponding phase are larger than the second set value are both satisfied. The output of the corresponding relay calculation section is locked based on whether or not the relay is activated. This enables a transformer protection relay to reliably detect the occurrence of inrush current and lock the relay output, as well as to release the lock and operate the relay in the event of a transformer failure while inrush current is occurring. Can be provided.
変圧器とその保護リレーとの接続を説明するための図である。FIG. 3 is a diagram for explaining the connection between a transformer and its protection relay. 図1の変圧器保護リレーのハードウェア構成例を示すブロック図である。FIG. 2 is a block diagram showing an example of the hardware configuration of the transformer protection relay in FIG. 1. FIG. 演算処理部における信号処理を説明するためのブロック図である。FIG. 2 is a block diagram for explaining signal processing in an arithmetic processing section. 図3のA相演算部の機能的構成例を示すブロック図である。FIG. 4 is a block diagram showing an example of the functional configuration of the A-phase calculation section in FIG. 3. FIG. インラッシュ電流発生の個々の判定条件の特徴を表形式でまとめた図である。FIG. 3 is a diagram summarizing the characteristics of individual determination conditions for inrush current generation in a table format. 図3のA相演算部に含まれるインラッシュ判定部の具体的構成例を示すブロック図である。FIG. 4 is a block diagram showing a specific example of the configuration of an inrush determination section included in the A-phase calculation section of FIG. 3. FIG. 図6のインラッシュ判定部の動作を説明するタイミング図である。FIG. 7 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 6. FIG. 実施の形態2の変圧器保護リレーにおいて、図3のA相演算部に含まれるインラッシュ判定部の具体的構成例を示すブロック図である。4 is a block diagram illustrating a specific configuration example of an inrush determination section included in the A-phase calculation section of FIG. 3 in the transformer protection relay of Embodiment 2. FIG. 図8のインラッシュ判定部の動作を説明するタイミング図である。FIG. 9 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 8; 図8のインラッシュ判定部の変形例を示すブロック図である。FIG. 9 is a block diagram showing a modification of the inrush determination section of FIG. 8; 実施の形態3の変圧器保護リレーにおいて、図3のA相演算部に含まれるインラッシュ判定部の具体的構成例を示すブロック図である。4 is a block diagram illustrating a specific configuration example of an inrush determination section included in the A-phase calculation section of FIG. 3 in the transformer protection relay of Embodiment 3. FIG. 図11のインラッシュ判定部の動作を説明するタイミング図である。FIG. 12 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 11. FIG. 図11のインラッシュ判定部の変形例を示すブロック図である。FIG. 12 is a block diagram showing a modification of the inrush determination section of FIG. 11; 実施の形態4の変圧器保護リレーにおいて、図3のA相演算部に含まれるインラッシュ判定部の具体的構成例を示すブロック図である。4 is a block diagram illustrating a specific configuration example of an inrush determination section included in the A-phase calculation section of FIG. 3 in the transformer protection relay of Embodiment 4. FIG. 図14のインラッシュ判定部の動作を説明するタイミング図である。FIG. 15 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 14; 図14のインラッシュ判定部の変形例を示すブロック図である。FIG. 15 is a block diagram showing a modification of the inrush determination section of FIG. 14; 実施の形態5の変圧器保護リレーにおいて、図3のA相演算部に含まれるインラッシュ判定部の具体的構成例を示すブロック図である。4 is a block diagram showing a specific configuration example of an inrush determination section included in the A-phase calculation section of FIG. 3 in the transformer protection relay of Embodiment 5. FIG. 図17のインラッシュ判定部の動作を説明するタイミング図である。FIG. 18 is a timing diagram illustrating the operation of the in-rush determination section of FIG. 17; 実施の形態6の変圧器保護リレーにおいて、演算処理部におけるA相演算部の機能的構成例を示すブロック図である。FIG. 12 is a block diagram showing an example of a functional configuration of an A-phase calculation unit in the calculation processing unit in the transformer protection relay of Embodiment 6. 電圧投入位相が0°の場合のA相のインラッシュ電流波形の計算結果を示す図である。FIG. 7 is a diagram showing calculation results of an A-phase inrush current waveform when the voltage application phase is 0°. 図20Aの0.089秒から0.091秒の部分の拡大図である。FIG. 20A is an enlarged view of a portion from 0.089 seconds to 0.091 seconds in FIG. 20A. 電圧投入位相が30°の場合のA相のインラッシュ電流波形の計算結果を示す図である。FIG. 7 is a diagram showing calculation results of an A-phase inrush current waveform when the voltage application phase is 30°. 図21Aの0.0875秒から0.0895秒の部分の拡大図である。FIG. 21A is an enlarged view of a portion from 0.0875 seconds to 0.0895 seconds in FIG. 21A. 電圧投入位相が60°の場合のA相のインラッシュ電流波形の計算結果を示す図である。FIG. 7 is a diagram showing calculation results of an A-phase inrush current waveform when the voltage application phase is 60°. 図22Aの0.082秒から0.084秒の部分の拡大図である。It is an enlarged view of the part from 0.082 seconds to 0.084 seconds of FIG. 22A. 電圧投入位相が120°の場合のA相のインラッシュ電流波形の計算結果を示す図である。FIG. 7 is a diagram showing calculation results of an A-phase inrush current waveform when the voltage application phase is 120°. 図23Aの0.084秒から0.086秒の部分の拡大図である。FIG. 23A is an enlarged view of a portion from 0.084 seconds to 0.086 seconds in FIG. 23A.
 以下、各実施の形態について図面を参照して詳しく説明する。なお、同一または相当する部分には同一の参照符号を付して、その説明を繰り返さない。 Hereinafter, each embodiment will be described in detail with reference to the drawings. In addition, the same reference numerals are given to the same or corresponding parts, and the description thereof will not be repeated.
 実施の形態1.
 [変圧器と保護リレーとの接続]
 図1は、変圧器とその保護リレーとの接続を説明するための図である。図1に示す三相変圧器1は、Y結線の一次巻線2とΔ結線の二次巻線3とを含むYΔ変圧器である。なお、三相変圧器1は、YΔ変圧器に限らず、YY変圧器、ΔΔ変圧器など他の種類の変圧器であってもよい。
Embodiment 1.
[Connection between transformer and protective relay]
FIG. 1 is a diagram for explaining the connection between a transformer and its protection relay. A three-phase transformer 1 shown in FIG. 1 is a YΔ transformer including a Y-connected primary winding 2 and a Δ-connected secondary winding 3. Note that the three-phase transformer 1 is not limited to the YΔ transformer, but may be other types of transformers such as a YY transformer or a ΔΔ transformer.
 三相変圧器1の一次巻線2に接続された一次側の三相線路5A,5B,5Cには、それぞれ電流変成器CT1A,CT1B,CT1C(総称する場合に電流変成器CT1と記載する)が設けられている。電流変成器CT1AはA相の線路5Aを流れる電流I1Aを検出し、電流変成器CT1BはB相の線路5Bを流れる電流I1Bを検出し、電流変成器CT1CはC相の線路5Cを流れる電流I1Cを検出する。各電流変成器CT1の第1端は、共通の接地極GNDに接続され、各電流変成器CT1の第2端は、変圧器保護リレー4の対応するチャンネルの入力変成器(図2の11)の一次側に接続される。すなわち、電流変成器CT1A,CT1B,CT1CはY結線されている。 The three- phase lines 5A, 5B, and 5C on the primary side connected to the primary winding 2 of the three-phase transformer 1 are provided with current transformers CT1A, CT1B, and CT1C, respectively (hereinafter collectively referred to as current transformer CT1). is provided. Current transformer CT1A detects current I1A flowing through A-phase line 5A, current transformer CT1B detects current I1B flowing through B-phase line 5B, and current transformer CT1C detects current I1C flowing through C-phase line 5C. Detect. The first end of each current transformer CT1 is connected to a common ground pole GND, and the second end of each current transformer CT1 is connected to the input transformer (11 in FIG. 2) of the corresponding channel of the transformer protection relay 4. connected to the primary side of the That is, current transformers CT1A, CT1B, and CT1C are Y-connected.
 同様に、三相変圧器1の二次巻線3に接続された二次側の三相線路6A,6B,6Cには、それぞれ電流変成器CT2A,CT2B,CT2C(総称する場合に電流変成器CT2と記載する)が設けられている。電流変成器CT2AはA相の線路6Aを流れる電流I2Aを検出し、電流変成器CT2BはB相の線路6Bを流れる電流I2Bを検出し、電流変成器CT2CはC相の線路6Cを流れる電流I2Cを検出する。各電流変成器CT2の第1端は、共通の接地極GNDに接続され、各電流変成器CT2の第2端は、変圧器保護リレー4の対応するチャンネルの入力変成器(図2の11)の一次側に接続される。すなわち、電流変成器CT2A,CT2B,CT2CはY結線されている。 Similarly, three- phase lines 6A, 6B, and 6C on the secondary side connected to the secondary winding 3 of the three-phase transformer 1 are connected to current transformers CT2A, CT2B, and CT2C (current transformers CT2A, CT2B, and CT2C, respectively). CT2) is provided. Current transformer CT2A detects current I2A flowing through A-phase line 6A, current transformer CT2B detects current I2B flowing through B-phase line 6B, and current transformer CT2C detects current I2C flowing through C-phase line 6C. Detect. The first end of each current transformer CT2 is connected to a common ground pole GND, and the second end of each current transformer CT2 is connected to the input transformer (11 in FIG. 2) of the corresponding channel of the transformer protection relay 4. connected to the primary side of the That is, current transformers CT2A, CT2B, and CT2C are Y-connected.
 [変圧器保護リレーのハードウェア構成例]
 図2は、図1の変圧器保護リレー4のハードウェア構成例を示すブロック図である。図2を参照して、変圧器保護リレー4は、いわゆるデジタルリレーと同様の構成を有している。具体的に、変圧器保護リレー4は、入力変換部10と、A/D変換部20と、演算処理部30と、I/O(Input and Output)部40とを備える。
[Hardware configuration example of transformer protection relay]
FIG. 2 is a block diagram showing an example of the hardware configuration of the transformer protection relay 4 of FIG. 1. As shown in FIG. Referring to FIG. 2, transformer protection relay 4 has a configuration similar to that of a so-called digital relay. Specifically, the transformer protection relay 4 includes an input conversion section 10, an A/D conversion section 20, an arithmetic processing section 30, and an I/O (Input and Output) section 40.
 入力変換部10は、各入力チャンネルごとに補助変成器11_1,11_2,…を備える。入力変換部10は、図1の電流変成器CT1A,CT1B,CT1Cからそれぞれ出力された一次側電流I1A,I1B,I1Cを表す信号および電流変成器CT2A,CT2B,CT2Cからそれぞれ出力された二次側電流I2A,I2B,I2Cを表す信号を、6個の補助変成器11を介して個別に取り込む。各補助変成器11は、これらの入力信号をA/D変換部20および演算処理部30での信号処理に適した電圧レベルの信号に変換する。 The input conversion unit 10 includes auxiliary transformers 11_1, 11_2, . . . for each input channel. The input conversion unit 10 receives signals representing primary side currents I1A, I1B, and I1C output from current transformers CT1A, CT1B, and CT1C, respectively, and secondary side currents output from current transformers CT2A, CT2B, and CT2C, respectively. Signals representing currents I2A, I2B, and I2C are individually taken in through six auxiliary transformers 11. Each auxiliary transformer 11 converts these input signals into signals at a voltage level suitable for signal processing in the A/D conversion section 20 and the arithmetic processing section 30.
 A/D変換部20は、アナログフィルタ(AF:Analog Filter)21_1,21_2,…と、サンプルホールド回路(S/H:Sample Hold Circuit)22_1,22_2,…と、マルチプレクサ(MPX:Multiplexer)23と、A/D変換器24とを含む。アナログフィルタ21およびサンプルホールド回路22は、入力変換部10のチャンネルごとに設けられる。 The A/D conversion unit 20 includes analog filters (AF) 21_1, 21_2, ..., sample hold circuits (S/H) 22_1, 22_2, ..., and a multiplexer (MPX) 23. , and an A/D converter 24. Analog filter 21 and sample hold circuit 22 are provided for each channel of input conversion section 10.
 各アナログフィルタ21は、A/D変換の際の折返し誤差を除去するために設けられたローパスフィルタまたはバンドパスフィルタである。各サンプルホールド回路22は、対応のアナログフィルタ21を通過した信号を規定のサンプリング周波数でサンプリングして保持する。マルチプレクサ23は、サンプルホールド回路22_1,22_2,…に保持された電圧信号を順次選択する。A/D変換器24は、マルチプレクサ23によって選択された信号をデジタル値に変換する。 Each analog filter 21 is a low-pass filter or a band-pass filter provided to remove aliasing errors during A/D conversion. Each sample and hold circuit 22 samples and holds the signal that has passed through the corresponding analog filter 21 at a specified sampling frequency. The multiplexer 23 sequentially selects the voltage signals held in the sample and hold circuits 22_1, 22_2, . A/D converter 24 converts the signal selected by multiplexer 23 into a digital value.
 演算処理部30は、CPU(Central Processing Unit)31と、RAM(Random Access Memory)32と、ROM(Read Only Memory)33と、これらを接続するバス34とを含む。CPU31は、プログラムに従って動作することにより、変圧器保護リレー4の全体の動作を制御する。RAM32およびROM33は、CPU31の主記憶として用いられる。ROM33の記憶媒体として、EEPROM(Electrically Erasable Programmable ROM)およびフラッシュメモリなどの電気的に書き換え可能な不揮発性メモリを用いることにより、プログラムおよび信号処理用の設定値などを収納できる。 The arithmetic processing unit 30 includes a CPU (Central Processing Unit) 31, a RAM (Random Access Memory) 32, a ROM (Read Only Memory) 33, and a bus 34 connecting these. The CPU 31 controls the overall operation of the transformer protection relay 4 by operating according to a program. RAM32 and ROM33 are used as main memory of CPU31. By using an electrically rewritable non-volatile memory such as an EEPROM (Electrically Erasable Programmable ROM) and a flash memory as a storage medium of the ROM 33, programs, setting values for signal processing, etc. can be stored.
 I/O部40は、デジタル入力(D/I:Digital Input)回路41と、デジタル出力(D/O:Digital Output)回路42とを含む。デジタル入力回路41およびデジタル出力回路42は、CPU31と外部装置との間でデジタル信号の入出力を行う際のインターフェース回路である。たとえば、デジタル出力回路42は、CPU31の指令に従ってトリップ信号を、関係する遮断器に出力する。 The I/O section 40 includes a digital input (D/I) circuit 41 and a digital output (D/O) circuit 42. The digital input circuit 41 and the digital output circuit 42 are interface circuits for inputting and outputting digital signals between the CPU 31 and an external device. For example, the digital output circuit 42 outputs a trip signal to a related circuit breaker according to a command from the CPU 31.
 なお、演算処理部30の機能の少なくとも一部は、ASIC(Application Specific Integrated Circuit)またはFPGA(Field Programmable Gate Array)などの電子回路として実現されていてもよいし、CPU、ASIC、およびFPGAのうち2つ以上を組み合わせて実現されてもよい。 Note that at least a part of the functions of the arithmetic processing unit 30 may be realized as an electronic circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array), or one of the CPU, ASIC, and FPGA. It may be realized by combining two or more.
 [演算処理部における信号処理]
 図3は、演算処理部における信号処理を説明するためのブロック図である。図3を参照して、演算処理部30は、機能的に、Y/Δ変換部50,51と、ゲイン調整部52,53と、A相演算部54と、B相演算部55と、C相演算部56とを含む。
[Signal processing in the arithmetic processing unit]
FIG. 3 is a block diagram for explaining signal processing in the arithmetic processing section. Referring to FIG. 3, the calculation processing unit 30 functionally includes Y/ Δ conversion units 50 and 51, gain adjustment units 52 and 53, an A phase calculation unit 54, a B phase calculation unit 55, and a C and a phase calculation section 56.
 Y/Δ変換部50,51は、Y結線の線電流をΔ結線の線電流に変換する。以下、図1のようなYΔ変圧器の結線方法がYd1の場合について説明する。この場合、一次巻線2はY巻線であり、二次巻線3はΔ巻線であり、一次側の電流変成器CT1で検出された線電流I1A,I1B,I1Cの位相に対して、二次側の電流変成器CT2で検出された線電流I2A,I2B,I2Cの位相は、30°遅れている(時計の1時の方向に対応する)。したがって、一次側のY結線の線電流I1A,I1B,I1CをΔ結線の場合の線電流I’1A,I’1B,I’1Cに変換することにより、両者の位相を合わせる。具体的に、変換後の一次側の線電流I’1A,I’1B,I’1Cは、
 I’1A=1IA-I1C  …(1A)
 I’1B=I1B-I1A  …(1B)
 I’1C=I1C-I1B  …(1C)
で表される。
The Y/ Δ converters 50 and 51 convert the line current of the Y connection into the line current of the Δ connection. Hereinafter, the case where the Yd1 wiring method of the YΔ transformer as shown in FIG. 1 will be explained. In this case, the primary winding 2 is a Y winding, and the secondary winding 3 is a Δ winding. The phases of the line currents I2A, I2B, and I2C detected by the current transformer CT2 on the secondary side are delayed by 30° (corresponding to the 1 o'clock direction). Therefore, by converting the line currents I1A, I1B, and I1C of the Y connection on the primary side into the line currents I'1A, I'1B, and I'1C of the Δ connection, the phases of the two are matched. Specifically, the primary side line currents I'1A, I'1B, and I'1C after conversion are as follows:
I'1A=1IA-I1C...(1A)
I'1B=I1B-I1A...(1B)
I'1C=I1C-I1B...(1C)
It is expressed as
 図1の場合の変圧器1の二次巻線3はΔ巻線であるので、Y/Δ変換部51は実装されているが、Y/Δ変換処理は行われない。したがって、I’2A=I2A、I’2B=I2B、I’2C=I2Cである。図3では、Y/Δ変換処理が行われないことを示すために、Y/Δ変換部51が破線で示されている。 Since the secondary winding 3 of the transformer 1 in the case of FIG. 1 is a Δ winding, the Y/Δ conversion unit 51 is mounted, but no Y/Δ conversion processing is performed. Therefore, I'2A=I2A, I'2B=I2B, and I'2C=I2C. In FIG. 3, the Y/Δ conversion unit 51 is shown with a broken line to indicate that Y/Δ conversion processing is not performed.
 なお、YY変圧器の場合には、外部地絡故障の場合の零相電流をキャンセルするために、一次側および二次側の両方においてY/Δ変換が行われる。ΔΔ変圧器の場合には、一次側および二次側のいずれにおいてもY/Δ変換は行われない。 Note that in the case of a YY transformer, Y/Δ conversion is performed on both the primary and secondary sides in order to cancel the zero-sequence current in the case of an external ground fault. In the case of a ΔΔ transformer, no Y/Δ conversion is performed on either the primary or secondary side.
 また、上記の計算によるY/Δ変換に代えて、一次側の電流変成器CT1A,CT1B,CT1Cを、変圧器1の一次側と二次側とで位相が合うようにΔ結線してもよい。これにより、一次側の電流変成器CT1による検出電流の位相と二次側の電流変成器CT2による検出電流の位相とを揃えることができる。 Also, instead of the Y/Δ conversion according to the above calculation, the primary side current transformers CT1A, CT1B, CT1C may be connected in a Δ manner so that the primary and secondary sides of the transformer 1 are in phase. . Thereby, the phase of the current detected by the primary-side current transformer CT1 and the phase of the detected current by the secondary-side current transformer CT2 can be aligned.
 ゲイン調整部52は、Y/Δ変換後の一次側電流を定数M1倍することにより最終的な一次側電流I’1A,I’1B,I’1Cを計算する。同様に、ゲイン調整部53は、二次側電流を定数M2倍することにより、最終的な二次側電流I’2A,I’2B,I’2Cを計算する。定数M1,M2は、外部故障の場合の一次側電流の基本波成分と二次側電流の基本波成分とがキャンセルするように、三相変圧器1の変圧比ならびに一次側および二次側の電流変成器CT1,CT2のCT比に応じて予め決定される。 The gain adjustment unit 52 calculates the final primary currents I'1A, I'1B, and I'1C by multiplying the Y/Δ-converted primary current by a constant M1. Similarly, the gain adjustment unit 53 calculates the final secondary currents I'2A, I'2B, and I'2C by multiplying the secondary current by a constant M2. Constants M1 and M2 are determined by adjusting the transformation ratio of the three-phase transformer 1 and the primary and secondary sides so that the fundamental wave component of the primary current and the fundamental wave component of the secondary current cancel in the case of an external fault. It is determined in advance according to the CT ratio of current transformers CT1 and CT2.
 A相演算部54は、A相の一次側電流I’1AとA相の二次側電流I’2Aとを用いて、A相について比率差動方式による電流差動リレー演算とインラッシュ電流の有無の判定とを行う。同様に、B相演算部55は、B相の一次側電流I’1BとB相の二次側電流I’2Bとを用いて、B相について比率差動方式による電流差動リレー演算とインラッシュ電流の有無の判定とを行う。C相演算部56は、C相の一次側電流I’1CとC相の二次側電流I’2Cとを用いて、C相について比率差動方式による電流差動リレー演算とインラッシュ電流の有無の判定とを行う。A相演算部54、B相演算部55、およびC相演算部56は、同様の構成を有しているので、以下では、A相演算部54の構成を代表として説明する。 The A-phase calculation unit 54 uses the A-phase primary current I'1A and the A-phase secondary current I'2A to perform current differential relay calculation using the ratio differential method and inrush current for the A-phase. The presence/absence is determined. Similarly, the B-phase calculation unit 55 performs a current differential relay calculation using the ratio differential method for the B-phase using the B-phase primary current I'1B and the B-phase secondary current I'2B. The presence or absence of rush current is determined. The C-phase calculation unit 56 uses the C-phase primary current I'1C and the C-phase secondary current I'2C to perform current differential relay calculation using the ratio differential method and inrush current for the C-phase. The presence/absence is determined. Since the A-phase calculation unit 54, the B-phase calculation unit 55, and the C-phase calculation unit 56 have similar configurations, the configuration of the A-phase calculation unit 54 will be described below as a representative.
 図4は、図3のA相演算部54の機能的構成例を示すブロック図である。図4を参照して、A相演算部54は、フィルタ60,61,66,67,68と、差電流演算部62と、抑制電流演算部63と、比率差動リレー演算部64と、高調波用差電流演算部65と、実効値演算部69,70,71と、含有率演算部72,73,74と、インラッシュ判定部75と、AND演算器76とを含む。 FIG. 4 is a block diagram showing an example of the functional configuration of the A-phase calculation section 54 in FIG. 3. Referring to FIG. 4, A-phase calculation unit 54 includes filters 60, 61, 66, 67, 68, differential current calculation unit 62, suppression current calculation unit 63, ratio differential relay calculation unit 64, and harmonic It includes a wave difference current calculation unit 65, effective value calculation units 69, 70, 71, content rate calculation units 72, 73, 74, an inrush determination unit 75, and an AND calculation unit 76.
 フィルタ60は、A相の一次側電流I’1Aの時系列データの入力を受け、電力系統の基本波成分(1f)を通過させ、直流成分、第2高調波成分(2f)、第3高調波成分(3f)、第4高調波成分(4f)などのその他の成分を抑制するバンドパスフィルタとして構成される。同様にフィルタ61は、A相の2次側電流I’2Aの入力を受け、電力系統の基本波成分(1f)を通過させ、その他の成分を抑制するバンドパスフィルタとして構成される。 The filter 60 receives input of time series data of the A-phase primary current I'1A, passes the fundamental wave component (1f) of the power system, and filters out the DC component, the second harmonic component (2f), and the third harmonic component. It is configured as a bandpass filter that suppresses other components such as a wave component (3f) and a fourth harmonic component (4f). Similarly, the filter 61 is configured as a bandpass filter that receives the A-phase secondary current I'2A, passes the fundamental wave component (1f) of the power system, and suppresses other components.
 差電流演算部62は、フィルタ60を通過したA相一次側電流の基本波成分I’1A1fの時系列データと、フィルタ61を通過したA相二次側電流の基本波成分I’2A1fの時系列データとの和(すなわち、ベクトル和)の実効値を演算する。ここで、一次側の電流変成器CT1と二次側の電流変成器CT2との極性を逆向きにすることにより、差電流演算部62は、一次側電流の基本波成分と二次側電流の基本波成分との差分の実効値を、差電流IdA1fとして計算していることになる。すなわち、|E|で電気量Eの実効値を表すものとすれば、差電流IdA1fは、
 IdA1f=|I’1A1f+I’2A1f|  …(2)
で表される。なお、本開示では、実効値を用いて説明するが、実効値を全て振幅値に変更してもよい。この場合には、|E|は電気量Eの振幅値を表すことになる。
The difference current calculation unit 62 calculates the time series data of the fundamental wave component I'1A 1f of the A-phase primary current that has passed through the filter 60 and the fundamental wave component I'2A 1f of the A-phase secondary current that has passed through the filter 61. calculate the effective value of the sum (i.e., vector sum) with the time series data. Here, by reversing the polarity of the primary current transformer CT1 and the secondary current transformer CT2, the difference current calculation unit 62 can calculate the difference between the fundamental wave component of the primary current and the secondary current. The effective value of the difference from the fundamental wave component is calculated as the difference current IdA 1f . That is, if |E| represents the effective value of the quantity of electricity E, the difference current IdA 1f is
IdA 1f = | I'1A 1f + I'2A 1f | ...(2)
It is expressed as Note that although the present disclosure will be described using effective values, all effective values may be changed to amplitude values. In this case, |E| represents the amplitude value of the electrical quantity E.
 抑制電流演算部63は、フィルタ60を通過したA相一次側電流の基本波成分I’1A1fの実効値と、フィルタ61と通過したA相二次側電流の基本波成分I’2A1fの実効値とのスカラー和を、抑制電流IrA1fとして計算する。すなわち、抑制電流IrA1fは、
 IrA1f=|I’1A1f|+|I’2A1f|  …(3)
で表される。
The suppression current calculation unit 63 calculates the effective value of the fundamental wave component I'1A 1f of the A-phase primary current that has passed through the filter 60 and the fundamental wave component I'2A 1f of the A-phase secondary current that has passed through the filter 61. The scalar sum with the effective value is calculated as the suppression current IrA 1f . That is, the suppression current IrA 1f is
IrA 1f = | I'1A 1f | + | I'2A 1f | ...(3)
It is expressed as
 比率差動リレー演算部64は、差電流IdA1fと抑制電流IrA1fとを用いて、三相変圧器1のA相巻線において内部故障が生じているか否かを判定する。具体的に、比率差動リレー演算部64は、比率設定値をC1およびC1’とし、最小設定値をC2およびC2’として、
 IdA1f≧C1×Ird1f+C2  …(4A)
 IdA1f≧C1’×Ird1f+C2’  …(4B)
が両方とも満たされている場合に内部故障と判定する。比率差動リレー演算部64は、内部故障と判定した場合に、外部の遮断器などを開放するためのリレー動作信号を出力する。
The ratio differential relay calculation unit 64 uses the difference current IdA 1f and the suppression current IrA 1f to determine whether an internal failure has occurred in the A-phase winding of the three-phase transformer 1. Specifically, the ratio differential relay calculation unit 64 sets ratio setting values as C1 and C1', and sets minimum setting values as C2 and C2'.
IdA 1f ≧C1×Ird 1f +C2…(4A)
IdA 1f ≧C1'×Ird 1f +C2'...(4B)
If both are satisfied, it is determined that there is an internal failure. The ratio differential relay calculation unit 64 outputs a relay operation signal for opening an external circuit breaker or the like when it is determined that there is an internal failure.
 高調波用差電流演算部65は、A相一次側電流I’1Aの時系列データとA相二次側電流の時系列データとの和(すなわち、ベクトル和)を、高調波成分の抽出用の差電流IdAとして計算する。すなわち、差電流IdAは、
 IdA=I’1A+I’2A  …(5)
と表される。
The harmonic difference current calculation unit 65 calculates the sum (i.e., vector sum) of the time series data of the A-phase primary current I'1A and the time series data of the A-phase secondary current for extraction of harmonic components. It is calculated as the difference current IdA. That is, the difference current IdA is
IdA=I'1A+I'2A...(5)
It is expressed as
 フィルタ66は、差電流IdAの時系列データの入力を受け、第2高調波成分(2f)を通過させ、直流成分、基本波成分(1f)、第3高調波成分(3f)、第4高調波成分(4f)などのその他の成分を抑制するバンドパスフィルタとして構成される。 The filter 66 receives input of time series data of the difference current IdA, passes the second harmonic component (2f), and passes through the DC component, fundamental wave component (1f), third harmonic component (3f), and fourth harmonic component. It is configured as a bandpass filter that suppresses other components such as the wave component (4f).
 同様に、フィルタ67は、差電流IdAの時系列データの入力を受け、第3高調波成分(3f)を通過させ、直流成分、基本波成分(1f)、第2高調波成分(2f)、第4高調波成分(4f)などのその他の成分を抑制するバンドパスフィルタとして構成される。 Similarly, the filter 67 receives input of time-series data of the difference current IdA, passes the third harmonic component (3f), and passes the DC component, fundamental component (1f), second harmonic component (2f), It is configured as a bandpass filter that suppresses other components such as the fourth harmonic component (4f).
 また、フィルタ68は、差電流IdAの時系列データの入力を受け、第4高調波成分(4f)を通過させ、直流成分、基本波成分(1f)、第2高調波成分(2f)、第3高調波成分(3f)などのその他の成分を抑制するバンドパスフィルタとして構成される。 Further, the filter 68 receives input of time series data of the difference current IdA, passes the fourth harmonic component (4f), direct current component, fundamental wave component (1f), second harmonic component (2f), and the fourth harmonic component (4f). It is configured as a bandpass filter that suppresses other components such as the third harmonic component (3f).
 なお、A相一次側電流I’1Aの時系列データおよびA相二次側電流I’2Aの時系列データに対して、フィルタ66~68によるフィルタ演算を先に実行し、その後に高調波成分ごとに差電流演算部65によってA相一次側電流とA相二次側電流とのベクトル和を計算するようにしてもよい。 Note that the filter calculations by the filters 66 to 68 are first performed on the time series data of the A-phase primary current I'1A and the time series data of the A-phase secondary current I'2A, and then the harmonic components are The vector sum of the A-phase primary current and the A-phase secondary current may be calculated by the difference current calculation unit 65 for each time.
 実効値演算部69は、フィルタ66を通過した差電流の第2高調波成分の実効値IdA2fを演算する。同様に、実効値演算部70は、フィルタ67を通過した差電流の第3高調波成分の実効値IdA3fを演算する。実効値演算部71は、フィルタ68を通過した差電流の第4高調波成分の実効値IdA4fを演算する。 The effective value calculation unit 69 calculates the effective value IdA 2f of the second harmonic component of the difference current that has passed through the filter 66. Similarly, the effective value calculation unit 70 calculates the effective value IdA 3f of the third harmonic component of the difference current that has passed through the filter 67. The effective value calculation section 71 calculates the effective value IdA 4f of the fourth harmonic component of the difference current that has passed through the filter 68.
 含有率演算部72は、差電流演算部62によって演算されたA相差電流の基本波成分の実効値IdA1fと、実効値演算部69によって演算されたA相差電流の第2高調波成分の実効値IdA2fとの入力を受ける。そして、含有率演算部72は、A相差電流の基本波成分の実効値IdA1fに対するA相差電流の第2高調波成分の実効値IdA2fの比率IdA2f/IdA1fを、第2高調波含有率として計算する。 The content calculation unit 72 calculates the effective value IdA 1f of the fundamental wave component of the A-phase difference current calculated by the difference current calculation unit 62 and the effective value IdA 1f of the second harmonic component of the A-phase difference current calculated by the effective value calculation unit 69. Receives input of value IdA 2f . Then, the content calculation unit 72 calculates the ratio IdA 2f /IdA 1f of the effective value IdA 2f of the second harmonic component of the A phase difference current to the effective value IdA 1f of the fundamental wave component of the A phase difference current. Calculate as a percentage.
 同様に、含有率演算部73は、差電流演算部62によって演算されたA相差電流の基本波成分の実効値IdA1fと、実効値演算部70によって演算されたA相差電流の第3高調波成分の実効値IdA3fとの入力を受ける。そして、含有率演算部73は、A相差電流の基本波成分の実効値IdA1fに対するA相差電流の第3高調波成分の実効値IdA3fの比率IdA3f/IdA1fを、第3高調波含有率として計算する。 Similarly, the content calculation unit 73 calculates the effective value IdA 1f of the fundamental wave component of the A phase difference current calculated by the difference current calculation unit 62 and the third harmonic of the A phase difference current calculated by the effective value calculation unit 70. An input of the effective value IdA 3f of the component is received. Then, the content calculation unit 73 calculates the ratio IdA 3f /IdA 1f of the effective value IdA 3f of the third harmonic component of the A phase difference current to the effective value IdA 1f of the fundamental wave component of the A phase difference current. Calculate as a percentage.
 含有率演算部74は、差電流演算部62によって演算されたA相差電流の基本波成分の実効値IdA1fと、実効値演算部71によって演算されたA相差電流の第4高調波成分の実効値IdA4fとの入力を受ける。そして、含有率演算部74は、A相差電流の基本波成分の実効値IdA1fに対するA相差電流の第4高調波成分の実効値IdA4fの比率IdA4f/IdA1fを、第4高調波含有率として計算する。 The content calculation unit 74 calculates the effective value IdA 1f of the fundamental wave component of the A-phase difference current calculated by the difference current calculation unit 62 and the effective value IdA 1f of the fourth harmonic component of the A-phase difference current calculated by the effective value calculation unit 71. Receives input of value IdA 4f . Then, the content calculation unit 74 calculates the ratio IdA 4f /IdA 1f of the effective value IdA 4f of the fourth harmonic component of the A phase difference current to the effective value IdA 1f of the fundamental wave component of the A phase difference current, Calculate as a percentage.
 インラッシュ判定部75は、含有率演算部72~74によって計算された自相であるA相の高調波含有率のうち少なくとも第2高調波含有率と、他の2相の第2高調波含有率とを用いて、自相であるA相にインラッシュ電流が発生しているか否かを判定する。インラッシュ判定部75は、インラッシュ電流が発生していると判定した場合に、リレー出力をロックするためのロック信号をアクティブ状態にする。インラッシュ電流の発生の有無を判定する具体的方法については、図5~図18を参照して後述する。 The inrush determination unit 75 determines at least the second harmonic content rate of the harmonic content rate of the A phase, which is the own phase, calculated by the content rate calculation units 72 to 74, and the second harmonic content rate of the other two phases. It is determined whether or not an inrush current is occurring in the A phase, which is the own phase. When the inrush determination unit 75 determines that an inrush current is generated, it activates a lock signal for locking the relay output. A specific method for determining whether an inrush current is generated will be described later with reference to FIGS. 5 to 18.
 AND演算器76は、比率差動リレー演算部64から出力されたリレー動作信号と、インラッシュ判定部75から出力されたロック信号を反転させた信号との論理積を演算する。したがって、ロック信号がアクティブ状態の場合には、AND演算器76の出力はインアクティブ状態となり、リレー出力がロックされる。 The AND operator 76 calculates the logical product of the relay operation signal output from the ratio differential relay operation unit 64 and the inverted signal of the lock signal output from the inrush determination unit 75. Therefore, when the lock signal is in the active state, the output of the AND operator 76 becomes inactive, and the relay output is locked.
 なお、B相演算部55の場合には、上記の説明においてA相をB相に変更すればよく、C相演算部56の場合には、上記の説明においてA相をC相に変更すればよい。したがって、詳しい説明を繰り返さない。 In the case of the B-phase calculation section 55, the A phase may be changed to the B phase in the above description, and in the case of the C phase calculation section 56, the A phase may be changed to the C phase in the above description. good. Therefore, detailed explanation will not be repeated.
 [インラッシュ電流発生の判定条件]
 次にインラッシュ電流の発生の判定条件について説明する。本開示では、複数の判定条件を組み合わせることによって、インラッシュ電流の発生の判定の信頼度を向上させるとともに、変圧器内部故障が生じた場合にはインラッシュ電流発生を検出しないようにする。
[Judgment conditions for inrush current generation]
Next, conditions for determining the occurrence of inrush current will be explained. In the present disclosure, by combining a plurality of determination conditions, the reliability of determining the occurrence of inrush current is improved, and the occurrence of inrush current is not detected when an internal failure of the transformer occurs.
 図5は、本開示で利用するインラッシュ電流発生の個々の判定条件の特徴を表形式でまとめた図である。以下、図5を参照して判定条件A~Fの特徴について説明する。 FIG. 5 is a diagram summarizing the characteristics of individual determination conditions for inrush current generation used in the present disclosure in a table format. The characteristics of the determination conditions A to F will be explained below with reference to FIG.
 判定条件Aは、3相中1相でも一次側と二次側との差電流に含まれる第2高調波含有率が設定値K1より大きいという条件(すなわち、第2高調波3相OR判定方式)である。設定値K1は、変圧器の内部故障で生じる第2高調波含有率の最大値よりも大きい値に設定される。たとえば、K1=15%である。 Judgment condition A is the condition that the second harmonic content included in the difference current between the primary side and the secondary side is larger than the set value K1 in one of the three phases (i.e., the second harmonic three-phase OR judgment method). ). The set value K1 is set to a value larger than the maximum value of the second harmonic content rate that occurs due to an internal failure of the transformer. For example, K1=15%.
 インラッシュ電流の発生時には3相中のいずれか1相の第2高調波含有率はかなり大きくなるので、判定条件Aによれば、インラッシュ電流の発生を確実に検出できる。また、インラッシュ電流の発生中に変圧器内部で1相故障が生じた場合には、故障電流には第2高調波が少ないので故障相では非検出になる。しかし、故障相でない相にはインラッシュ電流が含まれるので、インラッシュ電流の検出が継続される可能性がある。 Since the second harmonic content of any one of the three phases becomes considerably large when an inrush current is generated, according to determination condition A, the occurrence of an inrush current can be reliably detected. Further, if a one-phase failure occurs inside the transformer while an inrush current is generated, the second harmonic is not detected in the failure phase because the failure current has a small amount of second harmonic. However, since inrush current is included in phases that are not faulty phases, there is a possibility that detection of inrush current will continue.
 判定条件Bは、変圧器の相ごとの個別の判定条件であり、自相の一次側と二次側との差電流に含まれる第2高調波含有率が設定値K2より大きいという条件(すなわち、第2高調波各相判定方式)である。設定値K2は、インラッシュ電流に含まれる第2高調波の含有率が最小の場合でも検出できる値に設定される。たとえば、K2=5%である。 Judgment condition B is an individual judgment condition for each phase of the transformer, and is a condition that the second harmonic content included in the difference current between the primary side and the secondary side of the own phase is greater than the set value K2 (i.e. , second harmonic phase determination method). The set value K2 is set to a value that can be detected even when the content rate of the second harmonic included in the inrush current is the minimum. For example, K2=5%.
 判定条件Bによれば、設定値K2は、インラッシュ電流に含まれる第2高調波の含有率が最小の場合よりも小さい値に設定されるので、インラッシュ電流の発生を確実に検出できる。ただし、3相中2相については、一時的に第2高調波含有率が設定値K2未満になる可能性がある。この場合、第2高調波含有率が一時的に低下する相については、インラッシュ電流が一時的に非検出になる。また、インラッシュ電流の発生中に変圧器内部で1相故障が生じた場合において、比較的長い電力ケーブルのように対地静電容量の大きい送電線に変圧器が接続されている場合には、送電線の対地容量成分と変圧器の巻線の誘導成分とによって、第2高調波に近い共振周波数を有する共振現象が生じる可能性がある。このため、事故電流に、この共振現象による第2高調波が検出される可能性がある。しかし、この共振は数サイクル以内に減衰するので、しばらくすると第2高調波は非検出になる。変圧器が対地静電容量の小さい送電線に接続されている場合には、事故電流に高調波がほとんど含まれないので、故障発生後に直ちに第2高調波は非検出になる。 According to determination condition B, the set value K2 is set to a value smaller than when the content rate of the second harmonic included in the inrush current is the minimum, so the occurrence of the inrush current can be reliably detected. However, for two of the three phases, the second harmonic content rate may temporarily become less than the set value K2. In this case, in-rush current temporarily becomes undetectable for a phase in which the second harmonic content rate temporarily decreases. In addition, if a one-phase failure occurs inside the transformer during the generation of inrush current, if the transformer is connected to a power transmission line with a large ground capacitance, such as a relatively long power cable, The ground capacitance component of the power transmission line and the inductive component of the transformer winding may cause a resonance phenomenon with a resonant frequency close to the second harmonic. Therefore, there is a possibility that a second harmonic due to this resonance phenomenon will be detected in the fault current. However, this resonance decays within a few cycles, so the second harmonic becomes undetectable after a while. When the transformer is connected to a power transmission line with a small ground capacitance, the fault current contains almost no harmonics, so the second harmonic becomes undetectable immediately after the fault occurs.
 判定条件Cは、変圧器の相ごとの個別の判定条件であり、自相の一次側と二次側との差電流に含まれる第2高調波、第3高調波、および第4高調波の各々の含有率の和が設定値K3より大きいという条件である。設定値K3は、インラッシュ電流に含まれる第2高調波、第3高調波、および第4高調波の各々の含有率の和よりも小さい値に設定される。たとえば、K3=15%である。 Judgment condition C is an individual judgment condition for each phase of the transformer, and is a judgment condition for the second harmonic, third harmonic, and fourth harmonic included in the difference current between the primary side and the secondary side of the own phase. The condition is that the sum of each content rate is greater than the set value K3. The set value K3 is set to a value smaller than the sum of the respective content rates of the second harmonic, the third harmonic, and the fourth harmonic included in the inrush current. For example, K3=15%.
 判定条件Cによれば、設定値K3は、インラッシュ電流に含まれる第2高調波、第3高調波、および第4高調波の各々の含有率の和よりも小さい値に設定されるので、インラッシュ電流の発生を確実に検出できる。第2高調波の一時的な低下を、第3高調波および第4高調波で補えるメリットがある。また、インラッシュ電流の発生中に変圧器内部で1相故障が生じた場合において、変圧器が電力ケーブルに接続されている場合には、電力ケーブルの容量成分と変圧器の誘導成分とによって共振が生じるために事故電流が高調波を含有し、この高調波を検出する可能性がある。しかし、この共振は数サイクル以内に減衰するので高調波は非検出になる。変圧器が架空線に接続されているために事故電流に高調波がほとんど含まれない場合には、故障発生後に直ちに高調波は非検出になる。 According to determination condition C, the set value K3 is set to a value smaller than the sum of the content rates of each of the second harmonic, third harmonic, and fourth harmonic included in the inrush current. The occurrence of inrush current can be detected reliably. There is an advantage that the temporary drop in the second harmonic can be compensated for by the third harmonic and the fourth harmonic. In addition, if a one-phase failure occurs inside a transformer during the generation of inrush current, and the transformer is connected to a power cable, resonance will occur due to the capacitance component of the power cable and the inductive component of the transformer. Because of this, there is a possibility that the fault current contains harmonics and that these harmonics are detected. However, this resonance decays within a few cycles and the harmonics become undetectable. If the fault current contains almost no harmonics because the transformer is connected to an overhead line, the harmonics will go undetected immediately after the fault occurs.
 判定条件Dは、3相中のいずれか2相において一次側と二次側との差電流に含まれる第2高調波含有率が共に設定値K1より大きいという条件(すなわち、第2高調波2相AND判定方式)である。設定値K1は、判定条件Aの場合と同じ値、例えば15%に設定される。 Judgment condition D is the condition that the second harmonic content included in the difference current between the primary side and the secondary side in any two of the three phases is both greater than the set value K1 (that is, the second harmonic content rate of the second harmonic 2 (phase AND judgment method). The set value K1 is set to the same value as in the case of determination condition A, for example, 15%.
 判定条件Dの場合、第2高調波含有率が上記の設定値K1より大きくなるのが、3相中1相だけの場合があり得る。このため、ほとんどの場合においてインラッシュ電流の発生を検出可能であるが、確実に検出できるとまでは言えない。また、通常、変圧器がY結線の場合には三相CTの検出値はΔ結線の場合の線電流に変換されるので、変圧器の1相故障の場合であっても、故障電流は変圧器の2相で検出される。このため、インラッシュ電流の発生中に変圧器内部で1相故障が生じた場合には、インラッシュ電流は確実に非検出になる。 In the case of determination condition D, there may be a case where the second harmonic content rate is larger than the above set value K1 in only one of the three phases. Therefore, although it is possible to detect the occurrence of inrush current in most cases, it cannot be said that it can be detected reliably. In addition, normally, when the transformer is Y-connected, the detected value of the three-phase CT is converted to the line current when it is Δ-connected, so even in the case of a one-phase failure of the transformer, the fault current is transferred to the transformer. Detected on two phases of the device. Therefore, if a one-phase failure occurs inside the transformer while an inrush current is being generated, the inrush current will definitely not be detected.
 判定条件Eは、変圧器の相ごとの個別の判定条件であり、自相の一次側と二次側との差電流に含まれる第2高調波および第4高調波の各々の含有率の和が設定値K4より大きいという条件である。設定値K4は、インラッシュ電流に含まれる第2高調波および第4の高調波の各々の含有率が最小の場合でも検出できる値に設定される。たとえば、K4=6%である。 Judgment condition E is an individual judgment condition for each phase of the transformer, and is the sum of the contents of the second harmonic and fourth harmonic included in the difference current between the primary side and the secondary side of the own phase. is larger than the set value K4. The set value K4 is set to a value that can be detected even when the content rate of each of the second harmonic and the fourth harmonic included in the inrush current is the minimum. For example, K4=6%.
 判定条件Eによれば、設定値K4は、インラッシュ電流に含まれる第2高調波および第4高調波の各々の含有率の和よりも小さい値に設定されるので、インラッシュ電流の発生を確実に検出できる。第2高調波の一時的な低下を第4高調波で補えるメリットがある。また、インラッシュ電流の発生中に変圧器内部で1相故障が生じた場合において、比較的長い電力ケーブルのように対地静電容量の大きい送電線に変圧器が接続されている場合には、送電線の対地容量成分と変圧器の巻線の誘導成分とによって、第2高調波に近い共振周波数を有する共振現象が生じる可能性がある。このため、事故電流に、この共振現象による第2高調波が検出される可能性がある。しかし、この共振は数サイクル以内に減衰するので高調波は非検出になる。変圧器が対地静電容量の小さい送電線に接続されている場合には、事故電流に高調波がほとんど含まれないので、故障発生後に直ちに高調波は非検出になる。 According to the determination condition E, the set value K4 is set to a value smaller than the sum of the respective content rates of the second harmonic and the fourth harmonic included in the inrush current, so that the generation of the inrush current is prevented. Can be detected reliably. There is an advantage that the temporary drop in the second harmonic can be compensated for by the fourth harmonic. In addition, if a one-phase failure occurs inside the transformer during the generation of inrush current, if the transformer is connected to a power transmission line with a large ground capacitance, such as a relatively long power cable, The ground capacitance component of the power transmission line and the inductive component of the transformer winding may cause a resonance phenomenon with a resonant frequency close to the second harmonic. Therefore, there is a possibility that a second harmonic due to this resonance phenomenon will be detected in the fault current. However, this resonance decays within a few cycles and the harmonics become undetectable. If the transformer is connected to a power transmission line with low ground capacitance, the fault current will contain almost no harmonics, so harmonics will go undetected immediately after a fault occurs.
 判定条件Fは、判定条件Dの設定値K1をK2に変更したものである。すなわち、判定条件Fは、3相中のいずれか2相において一次側と二次側との差電流に含まれる第2高調波含有率が共に設定値K2より大きいという条件である。設定値K2は、インラッシュ電流に含まれる第2高調波の含有率が最小の場合でも検出できる値に設定される。たとえば、K2=5%である。 Judgment condition F is obtained by changing the setting value K1 of judgment condition D to K2. That is, the determination condition F is a condition that the second harmonic content included in the difference current between the primary side and the secondary side in any two of the three phases is both larger than the set value K2. The set value K2 is set to a value that can be detected even when the content rate of the second harmonic included in the inrush current is the minimum. For example, K2=5%.
 判定条件Fによれば、設定値K2は、インラッシュ電流に含まれる第2高調波の含有率が最小の場合よりも小さい値に設定されるので、インラッシュ電流の発生を確実に検出できる。ただし、3相中2相については、一時的に第2高調波含有率が設定値K2未満になる可能性がある。また、通常、変圧器がY結線の場合には三相CTの検出値はΔ結線の場合の線電流に変換されるので、変圧器が1相故障の場合であっても、故障電流は変圧器の2相で検出される。このため、インラッシュ電流の発生中に変圧器内部で1相故障が生じた場合には、判定条件Fではインラッシュ電流が確実に非検出になる。 According to the determination condition F, the set value K2 is set to a value smaller than that when the content rate of the second harmonic included in the inrush current is the minimum, so the occurrence of the inrush current can be reliably detected. However, for two of the three phases, the second harmonic content rate may temporarily become less than the set value K2. In addition, normally, when the transformer is Y-connected, the detected value of the three-phase CT is converted to the line current when it is Δ-connected, so even if the transformer has a one-phase failure, the fault current is transferred to the transformer. Detected on two phases of the device. Therefore, if a one-phase failure occurs inside the transformer while an in-rush current is being generated, the in-rush current will definitely not be detected under the determination condition F.
 [インラッシュ判定部の具体的構成]
 図6は、図3のA相演算部54に含まれるインラッシュ判定部75の具体的構成例を示すブロック図である。図6のインラッシュ判定部75の判定条件は、前述の判定条件Aと判定条件Bとを組み合わせたものである。
[Specific configuration of in-rush determination section]
FIG. 6 is a block diagram showing a specific example of the configuration of the inrush determining section 75 included in the A-phase calculating section 54 of FIG. 3. In FIG. The determination conditions of the in-rush determination section 75 in FIG. 6 are a combination of the aforementioned determination conditions A and B.
 なお、以下の説明では、A相の第2高調波含有率IdA2f/IdA1fを(2f/1f)Aのようにも表記する。A相の第3高調波含有率IdA3f/IdA1fを(3f/1f)Aのようにも表記する。A相の第4高調波含有率IdA4f/IdA1fを(4f/1f)Aのようにも表記する。B相およびC相についても同様である。 In addition, in the following description, the second harmonic content rate IdA 2f /IdA 1f of the A phase is also expressed as (2f/1f)A. The third harmonic content rate IdA 3f /IdA 1f of the A phase is also expressed as (3f/1f)A. The fourth harmonic content rate IdA 4f /IdA 1f of the A phase is also expressed as (4f/1f)A. The same applies to the B phase and C phase.
 図6に示すように、インラッシュ判定部75は、判定部80,81,82,83と、OR演算器84と、AND演算器85とを備える。 As shown in FIG. 6, the in-rush determination unit 75 includes determination units 80, 81, 82, and 83, an OR operator 84, and an AND operator 85.
 判定部80は、A相の第2高調波含有率(2f/1f)Aが設定値K1よりも大きいか否かを判定する。判定部81は、B相の第2高調波含有率(2f/1f)Bが設定値K1よりも大きいか否かを判定する。判定部82は、C相の第2高調波含有率(2f/1f)Cが設定値K1よりも大きいか否かを判定する。前述のように、設定値K1は、たとえば15%であり、比較的大きい値である。 The determining unit 80 determines whether the second harmonic content rate (2f/1f) A of the A phase is larger than the set value K1. The determination unit 81 determines whether the second harmonic content rate (2f/1f)B of the B phase is larger than the set value K1. The determination unit 82 determines whether the second harmonic content rate (2f/1f) C of the C phase is larger than the set value K1. As mentioned above, the set value K1 is, for example, 15%, which is a relatively large value.
 OR演算器84は、判定部80,81,82の判定結果のOR演算を行う。したがって、OR演算器84の出力は、A相、B相、C相のうちいずれか1相の一次側と二次側との差電流に含まれる第2高調波の含有率が設定値K1より大きいという判定条件Aが成立するか否かを示している。 The OR calculator 84 performs an OR operation on the determination results of the determination units 80, 81, and 82. Therefore, the output of the OR calculator 84 indicates that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the A, B, and C phases is lower than the set value K1. This indicates whether or not the determination condition A that the value is large is satisfied.
 判定部83は、A相演算部54の場合において、自相であるA相の第2高調波含有率(2f/1f)Aが設定値K2よりも大きいか否かを判定する。前述のように、設定値K2は、たとえば5%であり、設定値K1よりもかなり小さい。 In the case of the A-phase calculation unit 54, the determination unit 83 determines whether the second harmonic content (2f/1f)A of the A-phase, which is the own phase, is greater than the set value K2. As mentioned above, the set value K2 is, for example, 5%, which is significantly smaller than the set value K1.
 なお、図3のB相演算部55に含まれるインラッシュ判定部75の場合には、判定部83は、自相であるB相の第2高調波含有率(2f/1f)Bが設定値K2よりも大きいか否かを判定する。また、図3のC相演算部56に含まれるインラッシュ判定部75の場合には、自相であるC相の第2高調波含有率(2f/1f)Cが設定値K2よりも大きいか否かを判定する。したがって、三相変圧器1の相ごとに、一次側と二次側との差電流に含まれる第2高調波の含有率が設定値K2よりも大きいという判定条件Bの成立の有無が判定されることになる。 Note that in the case of the inrush determination unit 75 included in the B-phase calculation unit 55 in FIG. It is determined whether it is larger than K2. In addition, in the case of the inrush determination unit 75 included in the C-phase calculation unit 56 in FIG. Determine whether or not. Therefore, for each phase of the three-phase transformer 1, it is determined whether or not the determination condition B that the content rate of the second harmonic included in the difference current between the primary side and the secondary side is greater than the set value K2 is met. That will happen.
 AND演算器85は、OR演算器84の出力と判定部83の出力とのAND演算を実行する。AND演算器85から出力されるロック信号がアクティブ状態の場合に、対応する相(図6の場合、A相)のリレー出力がロックされ、ロック信号がインアクティブ状態の場合に、対応する相(A相)のリレー出力はロックされない。B相およびC相の場合も同様であるので、判定条件Aが成立するとともに、判定条件Bが成立する相がある場合に、当該相の保護リレー出力がロックされることになる。 The AND operator 85 performs an AND operation between the output of the OR operator 84 and the output of the determination unit 83. When the lock signal output from the AND operator 85 is in the active state, the relay output of the corresponding phase (A phase in the case of FIG. 6) is locked, and when the lock signal is inactive, the relay output of the corresponding phase ( A phase) relay output is not locked. The same applies to the B-phase and C-phase, so if there is a phase for which the determination condition A is satisfied and the determination condition B is also satisfied, the protection relay output of that phase will be locked.
 上記のインラッシュ判定部75の構成によれば、インラッシュ電流が発生した場合には、3相中1相の第2高調波含有率は必ず設定値K1より大きくなり、残りの相の第2高調波含有率は設定値K2より大きくなるのが通常であるので、インラッシュ電流の発生を検出できる。さらに、三相変圧器1の内部故障が発生したときには、電流検出値に故障電流が含まれる相では、故障電流は基本波成分が主体であるので、第2高調波含有率は低下する。したがって、設定値K2を設定値K1よりもかなり低い値に設定しても、電流検出値に故障電流が含まれる相では、インラッシュ電流の発生は検出されなくなる。 According to the configuration of the inrush determination section 75 described above, when an inrush current occurs, the second harmonic content rate of one phase among the three phases is always greater than the set value K1, and the second harmonic content rate of the remaining phases is always greater than the set value K1. Since the harmonic content rate is normally greater than the set value K2, the occurrence of inrush current can be detected. Further, when an internal failure occurs in the three-phase transformer 1, the second harmonic content rate decreases in the phase where the detected current value includes the fault current, since the fault current is mainly composed of the fundamental wave component. Therefore, even if the set value K2 is set to a value considerably lower than the set value K1, the occurrence of inrush current will not be detected in a phase where the detected current value includes a fault current.
 図7は、図6のインラッシュ判定部75の動作を説明するタイミング図である。図7の太線で示されている部分において、判定条件が満たされており、出力信号がアクティブ状態になっていること示す。 FIG. 7 is a timing diagram illustrating the operation of the in-rush determination unit 75 of FIG. 6. The portion indicated by the thick line in FIG. 7 indicates that the determination condition is satisfied and the output signal is in the active state.
 図7を参照して、時刻t1において三相変圧器1に加電される。インラッシュ電流の発生により、時刻t2においてA相の第2高調波含有率(2f/1f)AおよびC相の第2高調波含有率(2f/1f)Cがいずれも設定値K2を超えるので、A相およびC相について判定条件Bが満たされる。さらに、時刻t3においてB相の第2高調波含有率(2f/1f)Bが設定値K1を超えるので判定条件Aが満たされる。なお、図7には図示していないが、時刻t3よりも前の時点で、B相の第2高調波含有率(2f/1f)Bは当然に設定値K2を超えている。したがって、時刻t3において、A相、B相およびC相の各相においてリレー出力をロックするためのロック信号がアクティブ状態になる。 Referring to FIG. 7, power is applied to three-phase transformer 1 at time t1. Due to the generation of inrush current, the second harmonic content rate (2f/1f) A of the A phase and the second harmonic content rate (2f/1f) C of the C phase both exceed the set value K2 at time t2. , the determination condition B is satisfied for the A phase and the C phase. Further, at time t3, the second harmonic content rate (2f/1f)B of the B phase exceeds the set value K1, so the determination condition A is satisfied. Although not shown in FIG. 7, the second harmonic content rate (2f/1f) B of the B phase naturally exceeds the set value K2 at a time point before time t3. Therefore, at time t3, lock signals for locking the relay outputs in each of the A, B, and C phases become active.
 図7の例では、インラッシュ電流が流れるA相、B相、およびC相の各相の差電流のうち、第2高調波含有率が最も小さい相がC相である。C相の第2高調波含有率(2f/1f)Cは、時刻t2において設定値K2を超えるが、設定値K1を超えることはない。次に第2高調波含有率が小さい相はA相である。A相の第2高調波含有率(2f/1f)Aは、時刻t4において設定値K1を超えるが、連続して設定値K1を超えることはなく、途中で一時復帰する。図7では、このように連続して設定値K1を超えていないことを破線で示している。 In the example of FIG. 7, among the difference currents of the A phase, B phase, and C phase through which inrush current flows, the phase with the smallest second harmonic content is the C phase. The second harmonic content rate (2f/1f) C of the C phase exceeds the set value K2 at time t2, but does not exceed the set value K1. The phase with the next lowest second harmonic content is the A phase. The second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t4, but does not exceed the set value K1 continuously and returns temporarily on the way. In FIG. 7, the broken line indicates that the set value K1 is not continuously exceeded.
 時刻t8において、変圧器内部のA相で故障が発生する。これにより、A相に故障電流が流れるので、A相の第2高調波含有率(2f/1f)Aが低下し、時刻t9において設定値K2以下になる。これにより、A相のロック信号がインアクティブとなり、A相のリレー出力のロックが解除される。 At time t8, a failure occurs in the A phase inside the transformer. As a result, a fault current flows through the A phase, so that the second harmonic content rate (2f/1f) A of the A phase decreases and becomes equal to or less than the set value K2 at time t9. As a result, the A-phase lock signal becomes inactive, and the A-phase relay output is unlocked.
 [実施の形態1の効果]
 上記のとおり、実施の形態1の変圧器保護リレー(4)は、第1のリレー演算部(A相演算部54の64)、第2のリレー演算部(B相演算部55の64)、および第3のリレー演算部(C相演算部56の64)と、第1の判定部(A相演算部54の75)、第2の判定部(B相演算部55の75)、および第3の判定部(C相演算部56の75)とを備える。
[Effects of Embodiment 1]
As described above, the transformer protection relay (4) of the first embodiment includes a first relay calculation section (64 of the A-phase calculation section 54), a second relay calculation section (64 of the B-phase calculation section 55), and a third relay calculation section (64 of the C-phase calculation section 56), a first judgment section (75 of the A-phase calculation section 54), a second judgment section (75 of the B-phase calculation section 55), and a third relay calculation section (64 of the C-phase calculation section 56). 3 determination units (75 of the C phase calculation unit 56).
 第1のリレー演算部、第2のリレー演算部、および第3のリレー演算部(64)は、変圧器(1)の第1相(A相)、第2相(B相)、および第3相(C相)にそれぞれ対応して設けられ、対応する相の変圧器の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行う。第1の判定部、第2の判定部、および第3の判定部(75)は、変圧器(1)の第1相(A相)、第2相(B相)、および第3相(C相)にそれぞれ対応して設けられ、インラッシュ電流の発生を検出するための判定を行う。 The first relay calculation section, the second relay calculation section, and the third relay calculation section (64) are connected to the first phase (A phase), the second phase (B phase), and the second phase (B phase) of the transformer (1). It is provided corresponding to each of the three phases (C phase), and performs current differential relay calculation based on the fundamental wave component included in the difference current between the primary side and the secondary side of the transformer of the corresponding phase. The first determining section, the second determining section, and the third determining section (75) determine the first phase (A phase), the second phase (B phase), and the third phase ( C phase), and performs judgment to detect the occurrence of inrush current.
 具体的に、第1の判定部、第2の判定部、および第3の判定部の各々(75)は、第1相、第2相、および第3相のいずれか1相の一次側と二次側との差電流に含まれる第2高調波の含有率が第1の設定値(K1)より大きいという第1条件(条件A)と、対応する相の一次側と二次側との差電流に含まれる第2高調波の含有率が第2の設定値(K2)より大きいという第2条件(条件B)との成立の有無を判定する。第2設定値(K2)は第1の設定値(K1)よりも小さい。そして、第1の判定部、第2の判定部、および第3の判定部の各々(75)は、第1条件(条件A)および第2条件(条件B)が共に成立しているか否かに基づいて、対応する相のリレー演算部(64)の出力をロックする。 Specifically, each of the first determining section, the second determining section, and the third determining section (75) is connected to the primary side of any one of the first phase, the second phase, and the third phase. The first condition (condition A) that the content rate of the second harmonic included in the differential current with the secondary side is greater than the first set value (K1), and the difference between the primary side and the secondary side of the corresponding phase. It is determined whether the second condition (condition B) that the content rate of the second harmonic included in the difference current is greater than the second set value (K2) is satisfied. The second set value (K2) is smaller than the first set value (K1). Each of the first determining section, the second determining section, and the third determining section (75) determines whether the first condition (condition A) and the second condition (condition B) are both satisfied. Based on this, the output of the relay calculation unit (64) of the corresponding phase is locked.
 以上の構成によれば、インラッシュ電流が発生した場合には、3相中1相の第2高調波含有率は必ず第1の設定値(K1)より大きくなり、他の相の第2高調波含有率は第2の設定値(K2)より大きくなるので、インラッシュ電流の発生を検出できる。また、インラッシュ電流の発生中に変圧器(1)の内部故障が発生したときには、電流検出値に故障電流が含まれる相では第2高調波含有率は低下するので、第2の設定値(K2)を低い値に設定してもインラッシュ電流の発生は検出されなくなる。 According to the above configuration, when an inrush current occurs, the second harmonic content rate of one phase among the three phases is always larger than the first set value (K1), and the second harmonic content rate of the other phases is always higher than the first set value (K1). Since the wave content rate becomes larger than the second set value (K2), the occurrence of inrush current can be detected. Furthermore, when an internal failure occurs in the transformer (1) during the generation of inrush current, the second harmonic content rate decreases in the phase where the fault current is included in the detected current value, so the second set value ( Even if K2) is set to a low value, the generation of inrush current will not be detected.
 したがって、インラッシュ電流の発生を検出してリレー出力を確実にロックするとともに、インラッシュ電流の発生中に変圧器故障が発生した場合にロックを解除してリレー動作を行う変圧器保護リレーを提供できる。なお、後続する実施の形態2~4では、判定条件Aおよび判定条件Bにさらに他の判定条件を組み合わせることによって、誤動作をより確実に防止した変圧器保護リレーについて説明する。 Therefore, we provide a transformer protection relay that detects the occurrence of inrush current and reliably locks the relay output, and also releases the lock and operates the relay if a transformer failure occurs while inrush current is occurring. can. In the subsequent embodiments 2 to 4, a transformer protection relay that more reliably prevents malfunction by combining determination conditions A and B with other determination conditions will be described.
 実施の形態2.
 実施の形態2の変圧器保護リレー4では、インラッシュ判定部75の判定条件は、実施の形態1の場合の判定条件Aおよび判定条件Bの組合せを動作条件(セット条件)とし、判定条件Bが一定時間以上満たされない場合を復帰条件(リセット条件)とするように変更される。さらに、前述の判定条件Dが満たされなくなった場合を復帰条件に組み合わせてもよい。以下、図面を参照して詳しく説明する。
Embodiment 2.
In the transformer protection relay 4 of the second embodiment, the judgment conditions of the inrush judgment section 75 are the combination of judgment conditions A and judgment conditions B in the case of the first embodiment as the operating condition (set condition), and the judgment conditions B It is changed so that the return condition (reset condition) is when the condition is not satisfied for a certain period of time or more. Furthermore, the case where the above-mentioned determination condition D is no longer satisfied may be combined with the return condition. A detailed description will be given below with reference to the drawings.
 [インラッシュ判定部75の詳細な構成]
 図8は、実施の形態2の変圧器保護リレー4において、図3のA相演算部54に含まれるインラッシュ判定部75の具体的構成例を示すブロック図である。図8のインラッシュ判定部75は、図6の構成に加えて復帰タイマー91と、フリップフロップ90とをさらに備える。なお、図8において図6の場合と同一または相当する部分には、同一の参照符号を付して説明を繰り返さない。また、図1~図4を参照して説明した構成は、実施の形態2の場合にも共通する。
[Detailed configuration of in-rush determination unit 75]
FIG. 8 is a block diagram showing a specific configuration example of the inrush determination section 75 included in the A-phase calculation section 54 of FIG. 3 in the transformer protection relay 4 of the second embodiment. The inrush determination unit 75 in FIG. 8 further includes a return timer 91 and a flip-flop 90 in addition to the configuration in FIG. 6 . In FIG. 8, the same or corresponding parts as those in FIG. 6 are given the same reference numerals, and the description will not be repeated. Further, the configuration described with reference to FIGS. 1 to 4 is also common to the second embodiment.
 図8に示すように、復帰タイマー91は、判定部83の出力がインアクティブ状態からアクティブ状態に変化した場合には、自身の出力を直ちにアクティブ状態にする。一方、復帰タイマー91は、判定部83の出力がアクティブ状態からインアクティブ状態に変化し、インアクティブ状態が設定時間T1以上継続した場合に、自身の出力をインアクティブ状態にする。 As shown in FIG. 8, when the output of the determination unit 83 changes from the inactive state to the active state, the return timer 91 immediately changes its own output to the active state. On the other hand, the return timer 91 changes its own output to an inactive state when the output of the determination unit 83 changes from an active state to an inactive state and the inactive state continues for a set time T1 or more.
 判定部83によって判定されるA相の第2高調波含有率(2f/1f)Aが設定値K2より大きいという判定条件Bは、概ね1サイクル程度、一時的に満たされなく場合があり得る。このような一時的な第2高調波含有率の低下をカバーするために復帰タイマー91が設けられている。復帰タイマー91の設定時間T1は、概ね2サイクル程度に設定される。 The determination condition B that the second harmonic content rate (2f/1f) A of the A phase determined by the determination unit 83 is larger than the set value K2 may not be satisfied temporarily for approximately one cycle. A recovery timer 91 is provided to cover such a temporary decrease in the second harmonic content rate. The set time T1 of the recovery timer 91 is set to approximately 2 cycles.
 フリップフロップ90は、AND演算器85の出力信号SG1をセット端子に受け、復帰タイマー91の出力信号SG2を反転させた信号をリセット端子に受ける。フリップフロップ90は、セット状態の場合に自相のリレー出力をロックするためのロック信号をアクティブ状態にし、リセット状態の場合に上記のロック信号をインアクティブ状態にする。 The flip-flop 90 receives the output signal SG1 of the AND operator 85 at its set terminal, and receives the inverted signal SG2 of the recovery timer 91 at its reset terminal. The flip-flop 90 activates a lock signal for locking the relay output of the current phase when in a set state, and deactivates the above-mentioned lock signal when in a reset state.
 したがって、フリップフロップ90は、判定条件Aおよび判定条件Bが共に満たされている場合にセット状態になることにより自相のリレー出力をロックする。また、フリップフロップ90は、判定条件Bが成立していない状態が設定時間T1継続した場合にリセット状態になることにより、自相のリレー出力のロック状態を解除する。言い替えると、判定条件Aが成立するとともに、判定条件Bが成立する相がある場合に、当該相のリレー出力がロックされる。また、リレー出力がロックされた相において判定条件Bが成立していない状態が設定時間T1継続した場合に、当該相のリレー出力のロックが解除される。 Therefore, the flip-flop 90 locks the relay output of its own phase by entering the set state when both the determination condition A and the determination condition B are satisfied. Further, the flip-flop 90 enters a reset state when the state in which the determination condition B is not satisfied continues for a set time T1, thereby releasing the locked state of the relay output of the own phase. In other words, if there is a phase in which the determination condition A is satisfied and the determination condition B is also satisfied, the relay output of that phase is locked. Further, when a state in which the determination condition B is not satisfied continues for a set time T1 in a phase in which the relay output is locked, the lock of the relay output in that phase is released.
 上記のインラッシュ判定部75の構成によれば、実施の形態1の場合と同様に、インラッシュ電流が発生した場合には、3相中1相の第2高調波含有率は必ず設定値K1より大きくなり、残りの相の第2高調波含有率は設定値K2より大きくなるので、インラッシュ電流の発生を確実に検出できる。さらに、三相変圧器1で内部故障が発生したときには、電流検出値に故障電流が含まれる相では、故障電流は基本波成分が主体であるので、第2高調波含有率は低下する。したがって、設定値K2を設定値K1よりもかなり低い値に設定しても、電流検出値に故障電流が含まれる相ではインラッシュ電流の発生は検出されなくなる。 According to the configuration of the inrush determination section 75, as in the case of the first embodiment, when an inrush current occurs, the second harmonic content rate of one of the three phases is always set to the set value K1. Since the second harmonic content of the remaining phases becomes larger than the set value K2, the generation of inrush current can be reliably detected. Further, when an internal failure occurs in the three-phase transformer 1, the second harmonic content rate decreases in the phase where the detected current value includes the fault current, since the fault current is mainly composed of the fundamental wave component. Therefore, even if the set value K2 is set to a value considerably lower than the set value K1, the occurrence of inrush current will not be detected in the phase where the detected current value includes the fault current.
 判定条件Bで用いられる設定値K2は、インラッシュ電流の第2高調波含有率が最小となる相の通常の含有率よりも小さい値に設定されるが、過渡的にこの相の第2高調波含有率が設定値K2以下になることはあり得る。この過渡的な第2高調波含有率の低下期間をカバーするために復帰タイマー91が設けられている。 The set value K2 used in judgment condition B is set to a value smaller than the normal content rate of the phase where the second harmonic content rate of the inrush current is the minimum, but transiently the second harmonic content rate of this phase It is possible that the wave content rate becomes less than the set value K2. A recovery timer 91 is provided to cover this period of transient decrease in the second harmonic content.
 なお、図5を参照して説明したように、比較的長い電力ケーブルのように対地静電容量の大きい送電線に三相変圧器1が接続されている場合には、送電線の対地容量成分と変圧器の巻線の誘導成分とによって第2高調波に近い共振周波数を有する共振現象が生じる可能性がある。この共振現象によって事故電流に第2高調波が検出される場合には、リレー出力のロックが継続することになる。しかしながら、この共振は数サイクル以内に減衰するので高調波が非検出になってリレー出力のロックが解除されるので、大きな問題とはならない。 As explained with reference to FIG. 5, when the three-phase transformer 1 is connected to a transmission line with a large ground capacitance, such as a relatively long power cable, the ground capacitance component of the transmission line and the induced components of the transformer windings may cause a resonance phenomenon with a resonant frequency close to the second harmonic. If a second harmonic is detected in the fault current due to this resonance phenomenon, the relay output will continue to be locked. However, this resonance does not pose a major problem because it attenuates within a few cycles, the harmonics become undetectable, and the relay output is unlocked.
 図9は、図8のインラッシュ判定部75の動作を説明するタイミング図である。図9の太線で示されている部分において、判定条件が満たされており、出力信号がアクティブ状態になっていることを示す。 FIG. 9 is a timing diagram illustrating the operation of the in-rush determination unit 75 of FIG. 8. The portion indicated by the thick line in FIG. 9 indicates that the determination condition is satisfied and the output signal is in the active state.
 図9を参照して、時刻t1において三相変圧器1に加電される。インラッシュ電流の発生により、時刻t2においてA相の第2高調波含有率(2f/1f)Aが設定値K2を超えるので判定条件Bが満たされる。これにより、復帰タイマー91の出力信号SG2がアクティブ状態になり、フリップフロップ90のリセット端子の入力がインアクティブ状態になる。 Referring to FIG. 9, power is applied to three-phase transformer 1 at time t1. Due to the generation of the inrush current, the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K2 at time t2, so that the determination condition B is satisfied. As a result, the output signal SG2 of the recovery timer 91 becomes active, and the input of the reset terminal of the flip-flop 90 becomes inactive.
 時刻t3においてB相の第2高調波含有率(2f/1f)Bが設定値K1を超えるので判定条件Aが満たされる。これにより、フリップフロップ90のセット端子に入力される信号SG1がアクティブ状態になるので、フリップフロップ90がセット状態になり、リレー出力をロックするためのロック信号がアクティブ状態になる。 At time t3, the second harmonic content rate (2f/1f)B of the B phase exceeds the set value K1, so the determination condition A is satisfied. As a result, the signal SG1 input to the set terminal of the flip-flop 90 becomes active, so the flip-flop 90 becomes set and the lock signal for locking the relay output becomes active.
 なお、図9の例では、A相の第2高調波含有率(2f/1f)Aは、時刻t4において設定値K1を超えるが、連続して設定値K1を超えることはない。また、C相の第2高調波含有率(2f/1f)Cは、設定値K1を超えることはない。 Note that in the example of FIG. 9, the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t4, but does not continuously exceed the set value K1. Further, the second harmonic content rate (2f/1f) C of the C phase does not exceed the set value K1.
 時刻t6から時刻t7の間のT2時間の間、一時的に、A相の第2高調波含有率(2f/1f)Aが設定値K2以下になる。これにより、フリップフロップ90のセット端子に入力される信号SG1は、インアクティブ状態になる。しかしながら、T2時間は、復帰タイマー91の設定時間T1より短いので、復帰タイマー91の出力信号SG2はアクティブ状態で維持され、フリップフロップ90のリセット端子の入力はインアクティブ状態で維持される。 During time T2 between time t6 and time t7, the second harmonic content rate (2f/1f) A of the A phase temporarily becomes less than or equal to the set value K2. As a result, the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive. However, since the time T2 is shorter than the set time T1 of the return timer 91, the output signal SG2 of the return timer 91 is maintained in an active state, and the input to the reset terminal of the flip-flop 90 is maintained in an inactive state.
 時刻t8において、変圧器内部のA相で故障が発生する。これにより、A相に故障電流が流れるので、A相の第2高調波含有率(2f/1f)Aが低下し、時刻t9において設定値K2以下になる。これにより、フリップフロップ90のセット端子に入力される信号SG1がインアクティブ状態になる。 At time t8, a failure occurs in the A phase inside the transformer. As a result, a fault current flows through the A phase, so that the second harmonic content rate (2f/1f) A of the A phase decreases and becomes equal to or less than the set value K2 at time t9. As a result, the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive.
 時刻t9から復帰タイマー91の設定時間T1が経過した時刻t10において、復帰タイマー91の出力信号SG2はインアクティブ状態になる。これにより、フリップフロップ90のリセット端子の入力がアクティブ状態になるので、フリップフロップ90がリセット状態となり、フリップフロップ90から出力されるロック信号がインアクティブ状態となる。この結果、A相のリレー出力のロックが解除される。 At time t10, when the set time T1 of the recovery timer 91 has elapsed from time t9, the output signal SG2 of the recovery timer 91 becomes inactive. As a result, the input of the reset terminal of flip-flop 90 becomes active, so flip-flop 90 becomes reset, and the lock signal output from flip-flop 90 becomes inactive. As a result, the A-phase relay output is unlocked.
 [実施の形態2におけるインラッシュ判定部75の変形例]
 図10は、図8のインラッシュ判定部75の変形例を示すブロック図である。図10のインラッシュ判定部75は、AND演算器86,87,88と、OR演算器89,92とをさらに備える点で、図8のインラッシュ判定部75と異なる。
[Modification of in-rush determination unit 75 in Embodiment 2]
FIG. 10 is a block diagram showing a modification of the inrush determining section 75 of FIG. 8. In FIG. The in-rush determination unit 75 in FIG. 10 differs from the in-rush determination unit 75 in FIG. 8 in that it further includes AND calculation units 86, 87, and 88 and OR calculation units 89 and 92.
 図10に示すように、AND演算器86は、判定部80,82の判定結果に対してAND演算を実行する。AND演算器87は、判定部81,82の判定結果に対してAND演算を実行する。AND演算器88は、判定部80,81の判定結果に対してのAND演算結果を実行する。OR演算器89は、AND演算器86,87,88の各々のAND演算結果に対してOR演算を実行する。したがって、OR演算器89の出力は、3相のうちいずれか2相の一次側と二次側との差電流に含まれる第2高調波の含有率が共に設定値K1より大きいという判定条件Dが成立するか否かを示している。 As shown in FIG. 10, the AND operation unit 86 performs an AND operation on the determination results of the determination units 80 and 82. The AND operation unit 87 performs an AND operation on the determination results of the determination units 81 and 82. The AND operator 88 performs an AND operation on the determination results of the determination units 80 and 81. The OR operator 89 performs an OR operation on the AND operation results of the AND operators 86, 87, and 88. Therefore, the output of the OR operator 89 is based on the judgment condition D that the content of the second harmonic included in the difference current between the primary side and the secondary side of any two of the three phases is both greater than the set value K1. It shows whether or not it holds true.
 OR演算器92は、条件Dの判定結果を示すOR演算器89の出力と、復帰タイマー91の出力とのOR演算を実行する。フリップフロップ90は、OR演算器92の出力信号SG2を反転させた信号をリセット端子に受ける。図10のその他の点は図8の場合と同様であるので、同一または相当する部分には同一の参照符号を付して説明を繰り返さない。 The OR operator 92 performs an OR operation between the output of the OR operator 89 indicating the determination result of condition D and the output of the recovery timer 91. Flip-flop 90 receives a signal obtained by inverting output signal SG2 of OR operator 92 at its reset terminal. Since the other points in FIG. 10 are the same as in FIG. 8, the same or corresponding parts are given the same reference numerals and the description will not be repeated.
 上記の構成によれば、フリップフロップ90が判定条件Aおよび判定条件Bが共に満たされている場合にセット状態になることにより自相のリレー出力をロックする点は、図8の場合と同様である。すなわち、判定条件Aが成立するとともに、判定条件Bが成立する相がある場合に、当該相のリレー出力がロックされる。 According to the above configuration, the flip-flop 90 locks the relay output of its own phase by entering the set state when both the determination condition A and the determination condition B are satisfied, which is similar to the case of FIG. be. That is, if there is a phase in which the determination condition A is satisfied and the determination condition B is also satisfied, the relay output of that phase is locked.
 一方、フリップフロップ90は、判定条件Dが成立しておらず、かつ判定条件Bが成立していない状態が設定時間T1継続した場合にリセット状態になることにより、自相のリレー出力のロック状態を解除する。言い替えると、判定条件Dが成立しておらず、かつ、リレー出力がロックされた相において判定条件Bが成立していない状態が設定時間T1継続した場合に、当該相のリレー出力のロックが解除される。 On the other hand, the flip-flop 90 enters a reset state when a state in which the judgment condition D is not satisfied and the judgment condition B is not satisfied continues for a set time T1, so that the relay output of the own phase is locked. Release. In other words, if the condition D is not satisfied and the condition B is not satisfied in the phase where the relay output is locked continues for the set time T1, the relay output of the phase is unlocked. be done.
 上記のように、図10に示す変形例では、フリップフロップ90のリセット条件に、判定条件Dが組み合わされる。判定条件Dは、インラッシュ電流が発生した場合により確実にリレー出力をロックするために設けられている。3相のうち1相しか第2高調波含有率が設定値K1を超えないことが稀にあるが、ほとんどの場合に3相中2相で第2高調波含有率が設定値K1を超える。したがって、判定条件Dを用いることによって、上述した判定条件Bにおける第2高調波含有率の過渡的な低下期間が復帰タイマー91の設定時間T1を超えたとしても、リレー出力のロックがはずれないように補完できる。また、インラッシュ電流の発生中に三相変圧器1の内部故障が発生した場合には、故障電流は変圧器の2相で検出されるので判定条件Dは確実に成立しなくなる。以上により、変圧器保護リレー4の信頼性を向上できる。 As described above, in the modification shown in FIG. 10, the determination condition D is combined with the reset condition of the flip-flop 90. Judgment condition D is provided to more reliably lock the relay output when an inrush current occurs. Although it is rare that the second harmonic content of only one of the three phases exceeds the set value K1, in most cases the second harmonic content of two of the three phases exceeds the set value K1. Therefore, by using the judgment condition D, even if the period of transient decrease in the second harmonic content rate under the above-mentioned judgment condition B exceeds the set time T1 of the recovery timer 91, the relay output can be prevented from being unlocked. can be complemented by Further, if an internal failure occurs in the three-phase transformer 1 while an inrush current is being generated, the failure current is detected in two phases of the transformer, so that the determination condition D is definitely not satisfied. As described above, the reliability of the transformer protection relay 4 can be improved.
 [実施の形態2の効果]
 以上のとおり、変圧器保護リレー(4)において、第1のリレー演算部(A相演算部54の64)、第2のリレー演算部(B相演算部55の64)、および第3のリレー演算部(C相演算部56の64)は、変圧器(1)の第1相(A相)、第2相(B相)、および第3相(C相)にそれぞれ対応して設けられ、対応する相の変圧器(1)の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行う。第1の判定部(A相演算部54の75)、第2の判定部(B相演算部55の75)、および第3の判定部(C相演算部56の75)は、変圧器(1)の第1相(A相)、第2相(B相)、および第3相(C相)にそれぞれ対応して設けられ、インラッシュ電流の発生を検出するための判定を行う。
[Effects of Embodiment 2]
As described above, in the transformer protection relay (4), the first relay calculation section (64 of the A phase calculation section 54), the second relay calculation section (64 of the B phase calculation section 55), and the third relay The calculation units (64 of the C-phase calculation unit 56) are provided corresponding to the first phase (A phase), second phase (B phase), and third phase (C phase) of the transformer (1), respectively. , current differential relay calculation is performed based on the fundamental wave component included in the difference current between the primary side and the secondary side of the transformer (1) of the corresponding phase. The first determination section (75 of the A-phase calculation section 54), the second determination section (75 of the B-phase calculation section 55), and the third determination section (75 of the C-phase calculation section 56) are connected to the transformer ( They are provided corresponding to the first phase (A phase), second phase (B phase), and third phase (C phase) of 1), respectively, and perform determination to detect the occurrence of inrush current.
 ここで、実施の形態2の場合には、第1の判定部、第2の判定部、および第3の判定部の各々(75)は、第1相、第2相、および第3相のいずれか1相の一次側と二次側との差電流に含まれる第2高調波の含有率が第1の設定値(K1)より大きいという第1条件(条件A)と、対応する相の一次側と二次側との差電流に含まれる第2高調波の含有率が第2の設定値(K2)より大きいという第2条件(条件B)との成立の有無を判定する。 Here, in the case of Embodiment 2, each of the first determining section, the second determining section, and the third determining section (75) is configured to detect the first phase, the second phase, and the third phase. The first condition (condition A) is that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one phase is greater than the first set value (K1), and the corresponding phase It is determined whether a second condition (condition B) that the content rate of the second harmonic included in the difference current between the primary side and the secondary side is greater than the second set value (K2) is satisfied.
 そして、第1の判定部、第2の判定部、および第3の判定部の各々(75)は、第1条件(条件A)および第2条件(条件B)が共に成立した場合にセット状態になり、第2条件(条件B)が成立していない状態が第1設定時間(T1)継続した場合にリセット状態になるフリップフロップ(90)を含む。フリップフロップ(90)は、セット状態のときに対応する相のリレー演算部の出力をロックし、リセット状態のときに対応する相のリレー演算部の出力のロックを解除する。 Each of the first determining section, the second determining section, and the third determining section (75) is set to a set state when both the first condition (condition A) and the second condition (condition B) are satisfied. , and includes a flip-flop (90) that enters a reset state when a state in which the second condition (condition B) is not satisfied continues for a first set time (T1). The flip-flop (90) locks the output of the relay calculation section of the corresponding phase when in the set state, and unlocks the output of the relay calculation section of the corresponding phase when it is in the reset state.
 以上の構成によれば、インラッシュ電流が発生した場合には、3相中1相の第2高調波含有率は必ず第1の設定値(K1)より大きくなり、残りの相の第2高調波含有率は第2の設定値(K2)より大きくなるので、インラッシュ電流の発生を確実に検出できる。また、インラッシュ電流の発生中に変圧器(1)の内部故障が発生したときには、故障電流が含まれる相では第2高調波含有率は低下するので、第2の設定値(K2)を低い値に設定してもインラッシュ電流は検出されなくなる。 According to the above configuration, when an inrush current occurs, the second harmonic content of one of the three phases is always greater than the first set value (K1), and the second harmonic content of the remaining phases is always higher than the first set value (K1). Since the wave content rate is larger than the second set value (K2), the occurrence of inrush current can be reliably detected. In addition, when an internal failure occurs in the transformer (1) while an inrush current is generated, the second harmonic content rate will decrease in the phase where the fault current is included, so the second set value (K2) should be set to a lower value. In-rush current will not be detected even if the value is set to this value.
 さらに、第2条件(条件B)が成立していない状態が第1設定時間(T1)継続した場合に、フリップフロップ(90)をリセット状態にすることによって、対応する相の第2高調波含有率が一時的に第2の設定値(K2)以下になったとしても、誤動作を防止できる。このように、インラッシュ電流の発生を検出してリレー出力を確実にロックするとともに、インラッシュ電流の発生中に変圧器故障が発生した場合にロックを解除してリレー動作を行う変圧器保護リレーを提供できる。 Furthermore, when the state in which the second condition (condition B) is not satisfied continues for the first set time (T1), by setting the flip-flop (90) to the reset state, the second harmonic of the corresponding phase is contained. Even if the rate temporarily falls below the second set value (K2), malfunctions can be prevented. In this way, the transformer protection relay detects the occurrence of inrush current and reliably locks the relay output, and also releases the lock and operates the relay if a transformer failure occurs while inrush current is occurring. can be provided.
 上記の変形例として、第1の判定部、第2の判定部、および第3の判定部の各々(75)は、第1条件(条件A)および第2条件(条件B)に加えて、第1相、第2相、および第3相のうちいずれか2相の一次側と二次側との差電流に含まれる第2高調波の含有率が共に第1の設定値(K1)より大きいという付加的条件(条件D)の成立の有無をさらに判定してもよい。 As a modification of the above, each of the first determining section, the second determining section, and the third determining section (75), in addition to the first condition (condition A) and the second condition (condition B), The content rate of the second harmonic included in the difference current between the primary side and the secondary side of any two phases among the first phase, second phase, and third phase is less than the first setting value (K1). It may be further determined whether the additional condition (condition D) that the value is large is met.
 付加的条件(条件D)は、フリップフロップ(90)のリセット条件に組み合わされる。すなわち、フリップフロップ(90)は、さらに付加的条件(条件D)が成立していない場合にリセット状態になる。これにより、インラッシュ電流の発生中には、より確実にリレー出力をロックでき、インラッシュ電流の発生中に三相変圧器1の内部故障が発生した場合には、リレー出力のロックを確実に解除できる。 The additional condition (condition D) is combined with the reset condition of the flip-flop (90). That is, the flip-flop (90) enters the reset state when the additional condition (condition D) is not satisfied. As a result, the relay output can be more reliably locked while an inrush current is occurring, and if an internal failure of the three-phase transformer 1 occurs while an inrush current is occurring, the relay output can be more reliably locked. Can be canceled.
 実施の形態3.
 実施の形態3の変圧器保護リレー4では、インラッシュ判定部75の判定条件のうち、判定条件Aおよび判定条件Bを動作条件(セット条件)とする点は実施の形態2の場合と同様である。一方、復帰条件(リセット条件)には、判定条件Bに前述の判定条件Cを組み合わせたものが用いられる。また、実施の形態2の場合と同様に、前述の判定条件Dが満たされなくなった場合をさらに復帰条件に組み合わせてもよい。以下、図面を参照して詳しく説明する。
Embodiment 3.
The transformer protection relay 4 of the third embodiment is similar to the second embodiment in that among the determination conditions of the inrush determination section 75, determination conditions A and B are operating conditions (set conditions). be. On the other hand, as the return condition (reset condition), a combination of determination condition B and determination condition C described above is used. Further, as in the case of the second embodiment, the case where the above-mentioned determination condition D is no longer satisfied may be further combined as a return condition. A detailed description will be given below with reference to the drawings.
 [インラッシュ判定部75の詳細な構成]
 図11は、実施の形態3の変圧器保護リレー4において、図3のA相演算部54に含まれるインラッシュ判定部75の具体的構成例を示すブロック図である。図11のインラッシュ判定部75は、判定部93およびOR演算器92をさらに備えるとともに、復帰タイマー91が設けられていない点で、図8のインラッシュ判定部75と異なる。なお、図11において、図6および図8の場合と同一または相当する部分には、同一の参照符号を付して説明を繰り返さない。また、図1~図4を参照して説明した構成は、実施の形態3の場合にも共通する。
[Detailed configuration of in-rush determination unit 75]
FIG. 11 is a block diagram showing a specific configuration example of the inrush determination section 75 included in the A-phase calculation section 54 of FIG. 3 in the transformer protection relay 4 of the third embodiment. The in-rush determination unit 75 in FIG. 11 differs from the in-rush determination unit 75 in FIG. 8 in that it further includes a determination unit 93 and an OR calculator 92, and is not provided with a return timer 91. In addition, in FIG. 11, the same reference numerals are attached to the same or corresponding parts as in FIGS. 6 and 8, and the description thereof will not be repeated. Further, the configuration described with reference to FIGS. 1 to 4 is also common to the third embodiment.
 図11を参照して、A相演算部54に含まれるインラッシュ判定部75の場合、判定部93は、自相であるA相の第2高調波含有率(2f/1f)Aと、A相の第3高調波含有率(3f/1f)Aと、A相の第4高調波含有率(4f/1f)Aとの和が設定値K3よりも大きいか否かを判定する。 Referring to FIG. 11, in the case of the inrush determination section 75 included in the A phase calculation section 54, the determination section 93 determines the second harmonic content rate (2f/1f) A of the A phase, which is the own phase, and the A It is determined whether the sum of the third harmonic content rate (3f/1f) A of the phase and the fourth harmonic content rate (4f/1f) A of the A phase is larger than a set value K3.
 ここで、図3のB相演算部55に含まれるインラッシュ判定部75の場合には、判定部93は、自相であるB相の第2高調波含有率(2f/1f)Bと、B相の第3高調波含有率(3f/1f)Bと、B相の第4高調波含有率(4f/1f)Bとの和が設定値K3よりも大きいか否かを判定する。また、図3のC相演算部56に含まれるインラッシュ判定部75の場合には、判定部93は、自相であるC相の第2高調波含有率(2f/1f)Cと、C相の第3高調波含有率(3f/1f)Cと、C相の第4高調波含有率(4f/1f)Cとの和が設定値K3よりも大きいか否かを判定する。したがって、三相変圧器1の相ごとに、一次側と二次側との差電流に含まれる第2高調波、第3高調波、および第4高調波の各々の含有率の和が設定値K3よりも大きいという判定条件Cの成立の有無が判定されることになる。 Here, in the case of the inrush determination unit 75 included in the B-phase calculation unit 55 in FIG. It is determined whether the sum of the third harmonic content rate (3f/1f) B of the B phase and the fourth harmonic content rate (4f/1f) B of the B phase is larger than a set value K3. In addition, in the case of the inrush determination unit 75 included in the C phase calculation unit 56 in FIG. It is determined whether the sum of the third harmonic content rate (3f/1f) C of the phase and the fourth harmonic content rate (4f/1f) C of the C phase is larger than a set value K3. Therefore, for each phase of the three-phase transformer 1, the sum of the contents of the second harmonic, third harmonic, and fourth harmonic included in the difference current between the primary side and the secondary side is the set value. It is determined whether or not the determination condition C, which is greater than K3, is met.
 OR演算器92は、条件Cの判定結果を示す判定部93の出力と、条件Bの判定結果を示す判定部83の出力とのOR演算を実行する。 The OR operator 92 performs an OR operation between the output of the determination section 93 indicating the determination result of condition C and the output of the determination section 83 indicating the determination result of condition B.
 フリップフロップ90は、AND演算器85の出力信号SG1をセット端子に受け、OR演算器92の出力信号SG3を反転させた信号をリセット端子に受ける。フリップフロップ90は、セット状態の場合に自相のリレー出力をロックするためのロック信号をアクティブ状態にし、リセット状態の場合に上記のロック信号をインアクティブ状態にする。 Flip-flop 90 receives output signal SG1 from AND operator 85 at its set terminal, and receives an inverted signal of output signal SG3 from OR operator 92 at its reset terminal. When flip-flop 90 is in the set state, it activates a lock signal for locking the relay output of its own phase, and when flip-flop 90 is in the reset state, it activates the lock signal.
 したがって、フリップフロップ90は、判定条件Aおよび判定条件Bが共に満たされている場合にセット状態になることにより自相のリレー出力をロックする。また、フリップフロップ90は、判定条件Bおよび判定条件Cがいずれも成立していない場合にリセット状態になることにより、自相のリレー出力のロックを解除する。言い換えると、リレー出力がロックされた相において判定条件Bおよび判定条件Cがいずれも成立していない場合に、当該相のリレー出力のロックが解除される。 Therefore, the flip-flop 90 locks the relay output of its own phase by entering the set state when both the determination condition A and the determination condition B are satisfied. In addition, the flip-flop 90 enters a reset state when neither the determination condition B nor the determination condition C is satisfied, thereby releasing the lock of the relay output of the own phase. In other words, when neither determination condition B nor determination condition C is satisfied in a phase in which the relay output is locked, the relay output of that phase is unlocked.
 判定部93は、条件Cに代えて前述の条件Eの成立の有無を判定するようにしてもよい。すなわち、A相演算部54の場合の判定部93は、自相であるA相の第2高調波含有率(2f/1f)AとA相の第4高調波含有率(4f/1f)Aとの和が設定値K4よりも大きいか否かを判定する。B相演算部55およびC相演算部56の場合も同様である。大きな故障電流が流れて電流変成器CTが飽和した場合には、電流信号が歪むことによって第3高調波が発生する。条件Cに代えて第3高調波を利用しない条件Eを用いることによって、第3高調波の影響を受けないようにできる。したがって、電流変成器CTが飽和した際の不要なリレー出力のロックの継続を防止できる。 The determination unit 93 may determine whether the above-mentioned condition E is satisfied instead of the condition C. That is, in the case of the A-phase calculation unit 54, the determination unit 93 determines the second harmonic content rate (2f/1f) A of the A phase, which is the own phase, and the fourth harmonic content rate (4f/1f) A of the A phase, which is the own phase. It is determined whether the sum is greater than a set value K4. The same applies to the B-phase calculation section 55 and the C-phase calculation section 56. When a large fault current flows and the current transformer CT is saturated, the current signal is distorted and a third harmonic is generated. By using condition E, which does not use the third harmonic, in place of condition C, it is possible to avoid the influence of the third harmonic. Therefore, unnecessary locking of the relay output can be prevented from continuing when the current transformer CT is saturated.
 上述したインラッシュ判定部75の構成によれば、過渡的にA相の第2高調波含有率が設定値K2以下になり条件Bが成立しなくなったとしても、この期間において条件C(または条件E)が成立することによって、リレー出力のロックがはずれることを防止できる。したがって、実施の形態2の場合に必要であった復帰タイマー91は不要になるので、実施の形態2の場合よりも高速動作が期待できる。 According to the configuration of the inrush determination unit 75 described above, even if the second harmonic content rate of the A phase temporarily becomes lower than the set value K2 and the condition B is no longer satisfied, the condition C (or the condition By establishing E), it is possible to prevent the relay output from becoming unlocked. Therefore, the recovery timer 91 that was necessary in the second embodiment is no longer necessary, so faster operation can be expected than in the second embodiment.
 また、インラッシュ電流の発生中に変圧器1において内部故障が発生した場合には、故障相の第2高調波含有率は低下するために、条件Bおよび条件C(または条件E)はいずれも成立しなくなる。したがって、リレー出力のロックが確実に解除される。 Furthermore, if an internal failure occurs in the transformer 1 while an inrush current is being generated, the second harmonic content of the failed phase will decrease, so both conditions B and C (or condition E) are not satisfied. It will not be established. Therefore, the relay output is reliably unlocked.
 なお、図5を参照して説明したように、比較的長い電力ケーブルのような対地静電容量の大きい送電線に三相変圧器1が接続されている場合には、送電線の対地静電容量成分と変圧器の巻線誘導成分とによって、第2高調波に近い共振周波数を有する共振現象が生じる可能性がある。このため、この共振現象によって事故電流に第2高調波が検出される場合には、リレー出力のロックが継続してしまう。しかしながら、この共振は数サイクル以内に減衰するので高調波が非検出になってリレー出力のロックが解除されるので、大きな問題とはならない。 As explained with reference to FIG. 5, when the three-phase transformer 1 is connected to a power transmission line with a large ground capacitance, such as a relatively long power cable, the ground capacitance of the transmission line increases. The capacitive component and the transformer winding-induced component may cause a resonance phenomenon with a resonant frequency close to the second harmonic. Therefore, if the second harmonic is detected in the fault current due to this resonance phenomenon, the relay output will continue to be locked. However, this resonance does not pose a major problem because it attenuates within a few cycles, the harmonics become undetectable, and the relay output is unlocked.
 図12は、図11のインラッシュ判定部75の動作を説明するタイミング図である。図12の太線で示されている部分において、判定条件が満たされており、出力信号がアクティブ状態になっていること示す。 FIG. 12 is a timing diagram illustrating the operation of the in-rush determining section 75 in FIG. 11. The portion indicated by the thick line in FIG. 12 indicates that the determination condition is satisfied and the output signal is in the active state.
 図12を参照して、時刻t1において三相変圧器1に加電される。インラッシュ電流の発生により、時刻t2においてA相の第2高調波含有率(2f/1f)Aが設定値K2を超えるので判定条件Bが満たされる。これにより、OR演算器92の出力信号SG3がアクティブ状態になり、フリップフロップ90のリセット端子の入力がインアクティブ状態になる。 Referring to FIG. 12, power is applied to three-phase transformer 1 at time t1. Due to the generation of the inrush current, the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K2 at time t2, so that the determination condition B is satisfied. As a result, the output signal SG3 of the OR operator 92 becomes active, and the input of the reset terminal of the flip-flop 90 becomes inactive.
 時刻t3においてB相の第2高調波含有率(2f/1f)Bが設定値K1を超えるので判定条件Aが満たされる。これにより、フリップフロップ90のセット端子に入力される信号SG1がアクティブ状態になるので、フリップフロップ90がセット状態になり、A相のリレー出力をロックするためのロック信号がアクティブ状態になる。 At time t3, the second harmonic content rate (2f/1f)B of the B phase exceeds the set value K1, so the determination condition A is satisfied. As a result, the signal SG1 input to the set terminal of the flip-flop 90 becomes active, so the flip-flop 90 becomes set, and the lock signal for locking the A-phase relay output becomes active.
 なお、図12の例では、インラッシュ電流の差電流における第2高調波の含有率について、B相の第2高調波含有率(2f/1f)Bが最も大きく、A相の第2高調波含有率(2f/1f)AとC相の第2高調波含有率(2f/1f)Cとが互いに近い値で比較的小さい場合が示されている。A相の第2高調波含有率(2f/1f)Aは、時刻t4において設定値K1を超えるが、連続して設定値K1を超えることはない。また、C相の第2高調波含有率(2f/1f)Cも、その後に設定値K1を超えるが、連続して設定値K1を超えることはない。さらに、A相の第2高調波含有率(2f/1f)Aは、過渡的に設定値K2よりも低下する場合ある。 In addition, in the example of FIG. 12, regarding the content rate of the second harmonic in the difference current of the inrush current, the second harmonic content rate (2f/1f) B of the B phase is the largest, and the second harmonic content rate (2f/1f) B of the A phase is the highest. A case is shown in which the content rate (2f/1f) A and the second harmonic content rate (2f/1f) C of the C phase are close to each other and relatively small. The second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t4, but does not continuously exceed the set value K1. Further, the second harmonic content rate (2f/1f) C of the C phase also exceeds the set value K1 after that, but does not continuously exceed the set value K1. Furthermore, the second harmonic content rate (2f/1f) A of the A phase may transiently decrease below the set value K2.
 具体的に、時刻t6から時刻t7の間のT2時間の間、一時的に、A相の第2高調波含有率(2f/1f)Aが設定値K1以下になる。これにより、フリップフロップ90のセット端子に入力される信号SG1は、インアクティブ状態になる。しかしながら、この期間の間、A相の第2高調波含有率(2f/1f)A、第3高調波含有率(3f/1f)A、および第4高調波含有率(4f/1f)Aの和が設定値K3より大きい状態(条件Cの成立)が維持されるので、OR演算器92の出力信号SG3はアクティブ状態で維持される。この結果、フリップフロップ90のリセット端子の入力はインアクティブ状態で維持される。 Specifically, during time T2 between time t6 and time t7, the second harmonic content rate (2f/1f) A of the A phase temporarily becomes less than or equal to the set value K1. As a result, the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive. However, during this period, the second harmonic content (2f/1f) A, the third harmonic content (3f/1f) A, and the fourth harmonic content (4f/1f) A of phase A are Since the state in which the sum is greater than the set value K3 (condition C is satisfied) is maintained, the output signal SG3 of the OR operator 92 is maintained in the active state. As a result, the input to the reset terminal of flip-flop 90 is maintained in an inactive state.
 時刻t8において、変圧器内部のA相で故障が発生する。これにより、A相に故障電流が流れるので、A相の第2高調波含有率(2f/1f)Aが低下し、時刻t9において設定値K2以下になる。これにより、フリップフロップ90のセット端子に入力される信号SG1がインアクティブ状態になる。 At time t8, a failure occurs in the A phase inside the transformer. As a result, a fault current flows through the A phase, so that the second harmonic content rate (2f/1f) A of the A phase decreases and becomes equal to or less than the set value K2 at time t9. As a result, the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive.
 次の時刻t10において、A相の第2高調波含有率(2f/1f)A、第3高調波含有率(3f/1f)A、および第4高調波含有率(4f/1f)Aの和が設定値K3以下になる。これにより、OR演算器92の出力信号SG3はインアクティブ状態になるので、フリップフロップ90のリセット端子の入力がアクティブ状態になる。この結果、フリップフロップ90がリセット状態となり、フリップフロップ90から出力されるロック信号がインアクティブ状態となってリレー出力のロックが解除される。 At the next time t10, the sum of the second harmonic content rate (2f/1f) A, the third harmonic content rate (3f/1f) A, and the fourth harmonic content rate (4f/1f) A of the A phase. becomes below the set value K3. As a result, the output signal SG3 of the OR operator 92 becomes inactive, so that the input of the reset terminal of the flip-flop 90 becomes active. As a result, the flip-flop 90 enters the reset state, the lock signal output from the flip-flop 90 becomes inactive, and the relay output is unlocked.
 [実施の形態3におけるインラッシュ判定部75の変形例]
 図13は、図11のインラッシュ判定部75の変形例を示すブロック図である。図13のインラッシュ判定部75は、AND演算器86,87,88と、OR演算器89とをさらに備える点で、図11のインラッシュ判定部75と異なる。AND演算器86,87,88およびOR演算器89は、図10の場合と同様に接続される。したがって、OR演算器89の出力は、3相のうちいずれか2相の一次側と二次側との差電流に含まれる第2高調波の含有率が共に設定値K1より大きいという判定条件Dが成立するか否かを示している。
[Modification of inrush determination unit 75 in Embodiment 3]
FIG. 13 is a block diagram showing a modification of the inrush determination section 75 of FIG. 11. The in-rush determination unit 75 in FIG. 13 differs from the in-rush determination unit 75 in FIG. 11 in that it further includes AND calculation units 86, 87, and 88 and an OR calculation unit 89. AND operators 86, 87, 88 and OR operator 89 are connected in the same manner as in FIG. Therefore, the output of the OR operator 89 is based on the judgment condition D that the content of the second harmonic included in the difference current between the primary side and the secondary side of any two of the three phases is both greater than the set value K1. It shows whether or not it holds true.
 OR演算器92は、条件Dの判定結果を示すOR演算器89の出力と、条件Cの判定結果を示す判定部93の出力と、条件Bの判定結果を示す判定部83の出力とのOR演算を実行する。フリップフロップ90は、OR演算器92の出力信号SG2を反転させた信号をリセット端子に受ける。図13のその他の点は図11の場合と同様であるので、同一または相当する部分には同一の参照符号を付して説明を繰り返さない。 The OR operator 92 performs an OR operation on the output of the OR operator 89 indicating the determination result of condition D, the output of the determination unit 93 indicating the determination result of condition C, and the output of the determination unit 83 indicating the determination result of condition B. Perform calculations. Flip-flop 90 receives a signal obtained by inverting output signal SG2 of OR operator 92 at its reset terminal. Other points in FIG. 13 are the same as those in FIG. 11, so the same or corresponding parts are given the same reference numerals and the description will not be repeated.
 上記の構成によれば、フリップフロップ90が判定条件Aおよび判定条件Bが共に満たされている場合にセット状態になることにより自相のリレー出力をロックする点は、図11の場合と同様である。すなわち、判定条件Aが成立するとともに、判定条件Bが成立する相がある場合に、当該相のリレー出力がロックされる。 According to the above configuration, the point that the flip-flop 90 locks the relay output of its own phase by entering the set state when both the determination condition A and the determination condition B are satisfied is the same as in the case of FIG. be. That is, if there is a phase in which the determination condition A is satisfied and the determination condition B is also satisfied, the relay output of that phase is locked.
 一方、フリップフロップ90は、判定条件D、判定条件B、判定条件Cがいずれも成立していない場合に、リセット状態になることにより、自相のリレー出力のロック状態を解除する。言い替えると、判定条件Dが成立しておらず、かつ、リレー出力がロックされた相において判定条件Bおよび判定条件Cがいずれも成立していない場合に、当該相のリレー出力のロックが解除される。なお、判定条件Cに代えて、判定条件Eを用いてもよい。 On the other hand, when none of the determination conditions D, B, and C are satisfied, the flip-flop 90 enters the reset state and releases the locked state of the relay output of its own phase. In other words, if judgment condition D is not satisfied and neither judgment condition B nor judgment condition C is satisfied in the phase in which the relay output is locked, the relay output of that phase is unlocked. Ru. Note that instead of the determination condition C, the determination condition E may be used.
 図10を参照して説明したように、判定条件Dは、インラッシュ電流が発生した場合により確実にリレー出力をロックするために設けられている。3相のうち1相しか第2高調波含有率が設定値K1を超えないことが稀にあるが、ほとんどの場合に3相中2相で第2高調波含有率が設定値K1を超える。したがって、判定条件Dを用いることによって、インラッシュ電流の発生時に上述した判定条件Bおよび判定条件Cの両方とも過渡的に成立しない場合があっても、リレー出力のロックがはずれないように補完できる。 As explained with reference to FIG. 10, determination condition D is provided to more reliably lock the relay output when an inrush current occurs. Although it is rare that the second harmonic content of only one of the three phases exceeds the set value K1, in most cases the second harmonic content of two of the three phases exceeds the set value K1. Therefore, by using judgment condition D, even if both judgment condition B and judgment condition C described above may not be satisfied transiently when an inrush current occurs, it is possible to supplement the relay output so that it does not become unlocked. .
 [実施の形態3の効果]
 以上のとおり、変圧器保護リレー4において、第1のリレー演算部(A相演算部54の64)、第2のリレー演算部(B相演算部55の64)、および第3のリレー演算部(C相演算部56の64)は、変圧器(1)の第1相(A相)、第2相(B相)、および第3相(C相)にそれぞれ対応して設けられ、対応する相の変圧器の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行う。第1の判定部(A相演算部54の75)、第2の判定部(B相演算部55の75)、および第3の判定部(C相演算部56の75)は、変圧器(1)の第1相(A相)、第2相(B相)、および第3相(C相)にそれぞれ対応して設けられ、インラッシュ電流の発生を検出するための判定を行う。
[Effects of Embodiment 3]
As described above, in the transformer protection relay 4, the first relay calculation section (64 of the A phase calculation section 54), the second relay calculation section (64 of the B phase calculation section 55), and the third relay calculation section (64 of the C phase calculation unit 56) is provided corresponding to the first phase (A phase), second phase (B phase), and third phase (C phase) of the transformer (1), and Current differential relay calculation is performed based on the fundamental wave component included in the difference current between the primary and secondary sides of the transformer of the phase. The first determination section (75 of the A-phase calculation section 54), the second determination section (75 of the B-phase calculation section 55), and the third determination section (75 of the C-phase calculation section 56) are connected to the transformer ( They are provided corresponding to the first phase (A phase), second phase (B phase), and third phase (C phase) of 1), respectively, and perform determination to detect the occurrence of inrush current.
 ここで、実施の形態3の場合には、第1の判定部、第2の判定部、および第3の判定部の各々(75)は、実施の形態2の場合の第1条件(条件A)および第2条件(条件B)に加えて、対応する相の一次側と二次側との差電流に含まれる第2高調波、第3高調波、および第4高調波の各々の含有率の和が第3の設定値(K3)より大きいという第3条件(条件C)の成立の有無を判定する。 Here, in the case of Embodiment 3, each of the first determination section, the second determination section, and the third determination section (75) satisfies the first condition (condition A) in the case of Embodiment 2. ) and the second condition (condition B), the content rate of each of the second harmonic, third harmonic, and fourth harmonic included in the difference current between the primary side and the secondary side of the corresponding phase. It is determined whether the third condition (condition C) that the sum of the values is greater than the third set value (K3) is satisfied.
 そして、第1の判定部、第2の判定部、および第3の判定部の各々(75)は、第1条件(条件A)および第2条件(条件B)が共に成立した場合にセット状態になり、第2条件(条件B)および第3条件(条件C)がいずれも成立していない場合にリセット状態になるフリップフロップ(90)を含む。フリップフロップ(90)は、セット状態のときに対応する相のリレー演算部(64)の出力をロックし、リセット状態のときに対応する相のリレー演算部(64)の出力のロックを解除する。 Each of the first determining section, the second determining section, and the third determining section (75) is set to a set state when both the first condition (condition A) and the second condition (condition B) are satisfied. , and includes a flip-flop (90) that enters a reset state when neither the second condition (condition B) nor the third condition (condition C) is satisfied. The flip-flop (90) locks the output of the relay calculation unit (64) of the corresponding phase when in the set state, and unlocks the output of the relay calculation unit (64) of the corresponding phase when it is in the reset state. .
 以上の構成によれば、実施の形態1,2の場合と同様に、インラッシュ電流が発生した場合には、3相中1相の第2高調波含有率は必ず第1の設定値(K1)より大きくなり、他の相の第2高調波含有率は第2の設定値(K2)より大きくなるので、インラッシュ電流の発生を検出できる。また、インラッシュ電流の発生中に変圧器(1)の内部故障が発生したときには、電流検出値に故障電流が含まれる相では第2高調波含有率は低下するので、第2の設定値(K2)を低い値に設定してもインラッシュ電流の発生は検出されなくなる。 According to the above configuration, as in the first and second embodiments, when an inrush current occurs, the second harmonic content rate of one of the three phases is always set to the first set value (K1 ), and the second harmonic content of the other phase becomes larger than the second set value (K2), so the occurrence of an inrush current can be detected. Furthermore, when an internal failure occurs in the transformer (1) during the generation of inrush current, the second harmonic content rate decreases in the phase where the fault current is included in the detected current value, so the second set value ( Even if K2) is set to a low value, the generation of inrush current will not be detected.
 さらに、第2条件(条件B)および第3条件(条件C)がいずれも成立していない場合に、フリップフロップ(90)をリセット状態にすることによって、対応する相の第2高調波含有率が一時的に第2の設定値(K2)以下になったとしても、誤動作を防止できる。このように、インラッシュ電流の発生を検出してリレー出力を確実にロックするとともに、インラッシュ電流の発生中に変圧器故障が発生した場合にロックを解除してリレー動作を行う変圧器保護リレーを提供できる。 Furthermore, when neither the second condition (condition B) nor the third condition (condition C) is satisfied, by setting the flip-flop (90) to a reset state, the second harmonic content of the corresponding phase is Even if the value temporarily falls below the second set value (K2), malfunctions can be prevented. In this way, the transformer protection relay detects the occurrence of inrush current and reliably locks the relay output, and also releases the lock and operates the relay if a transformer failure occurs while inrush current is occurring. can be provided.
 なお、第3条件として、上記に代えて、対応する相の一次側と二次側との差電流に含まれる第2高調波および第4高調波の各々の含有率の和が第3の設定値(K4)より大きいという条件(条件E)を用いてもよい。第3高調波を用いないことによって、電流変成器CTの飽和の際に発生する第3高調波に起因した誤動作を防止できる。 In addition, as a third condition, instead of the above, the sum of the respective content rates of the second harmonic and the fourth harmonic included in the difference current between the primary side and the secondary side of the corresponding phase is the third setting. A condition (condition E) that the value is larger than the value (K4) may be used. By not using the third harmonic, it is possible to prevent malfunctions caused by the third harmonic that occur when the current transformer CT is saturated.
 さらに、上記の変形例として、第1の判定部、第2の判定部、および第3の判定部の各々(75)は、第1条件(条件A)、第2条件(条件B)、および第3条件(条件Cまたは条件E)に加えて、第1相、第2相、および第3相のうちいずれか2相の一次側と二次側との差電流に含まれる第2高調波の含有率が共に第1の設定値(K1)より大きいという付加的条件(条件D)の成立の有無をさらに判定してもよい。 Furthermore, as a modification of the above, each of the first determining section, the second determining section, and the third determining section (75) satisfies the first condition (condition A), the second condition (condition B), and In addition to the third condition (condition C or condition E), the second harmonic contained in the difference current between the primary side and the secondary side of any two phases among the first phase, second phase, and third phase. It may be further determined whether or not the additional condition (condition D) that the content rates of are both greater than the first set value (K1) is satisfied.
 付加的条件(条件D)は、フリップフロップ(90)のリセット条件に組み合わされる。すなわち、フリップフロップ(90)は、さらに付加的条件(条件D)が成立していない場合にリセット状態になる。これにより、インラッシュ電流の発生中には、より確実にリレー出力をロックでき、インラッシュ電流の発生中に三相変圧器1の内部故障が発生した場合には、リレー出力のロックを確実に解除できる。 The additional condition (condition D) is combined with the reset condition of the flip-flop (90). That is, the flip-flop (90) enters the reset state when the additional condition (condition D) is not satisfied. As a result, the relay output can be more reliably locked while an inrush current is occurring, and if an internal failure of the three-phase transformer 1 occurs while an inrush current is occurring, the relay output can be more reliably locked. Can be canceled.
 実施の形態4.
 実施の形態4の変圧器保護リレー4では、実施の形態3の場合において、フリップフロップ90をリセット状態にする条件が、判定条件Cのみが成立していないことに変更される。以下、図面を参照して詳しく説明する。
Embodiment 4.
In the transformer protection relay 4 of the fourth embodiment, the condition for setting the flip-flop 90 to the reset state in the case of the third embodiment is changed to that only the determination condition C is not satisfied. A detailed description will be given below with reference to the drawings.
 [インラッシュ判定部75の詳細な構成]
 図14は、実施の形態4の変圧器保護リレー4において、図3のA相演算部54に含まれるインラッシュ判定部75の具体的構成例を示すブロック図である。
[Detailed configuration of in-rush determination unit 75]
FIG. 14 is a block diagram showing a specific configuration example of the inrush determination section 75 included in the A-phase calculation section 54 of FIG. 3 in the transformer protection relay 4 of the fourth embodiment.
 図14のインラッシュ判定部75は、OR演算器92が設けられておらず、条件Cの判定結果を示す判定部93の出力信号(SG3)の論理を反転させた信号がフリップフロップ90のリセット端子に直接入力されるが、条件Bの判定結果を示す判定部83の出力はフリップフロップ90のリセット条件として用いられない点で、図11のインラッシュ判定部75と異なる。したがって、フリップフロップ90は、判定条件Cが成立していない場合にリセット状態になることにより、自相のリレー出力のロックを解除する。言い換えると、リレー出力がロックされた相において判定条件Cが成立していない場合に、当該相のリレー出力のロックが解除される。 The in-rush determination unit 75 in FIG. 14 is not provided with the OR operator 92, and a signal obtained by inverting the logic of the output signal (SG3) of the determination unit 93 indicating the determination result of condition C is used to reset the flip-flop 90. Although directly input to the terminal, the output of the determining unit 83 indicating the determination result of condition B is different from the in-rush determining unit 75 of FIG. Therefore, the flip-flop 90 enters the reset state when the determination condition C is not satisfied, thereby unlocking the relay output of the own phase. In other words, when the determination condition C is not satisfied in a phase in which the relay output is locked, the relay output in that phase is unlocked.
 図14のその他の点は、図6、図8、および図11の場合と同様であるので、同一または相当する部分には同一の参照符号を付して説明を繰り返さない。また、図1~図4を参照して説明した構成は、実施の形態4の場合にも共通する。 The other points in FIG. 14 are the same as in FIGS. 6, 8, and 11, so the same or corresponding parts are given the same reference numerals and the description will not be repeated. Further, the configuration described with reference to FIGS. 1 to 4 is also common to the fourth embodiment.
 図15は、図14のインラッシュ判定部75の動作を説明するタイミング図である。図15の太線で示されている部分において、判定条件が満たされており、出力信号がアクティブ状態になっていること示す。 FIG. 15 is a timing diagram illustrating the operation of the in-rush determining section 75 in FIG. 14. The portion indicated by the thick line in FIG. 15 indicates that the determination condition is satisfied and the output signal is in the active state.
 図15を参照して、時刻t1において三相変圧器1に加電される。インラッシュ電流の発生により、時刻t2においてA相の第2高調波含有率(2f/1f)Aが設定値K2を超えるので判定条件Bが満たされる。 Referring to FIG. 15, power is applied to three-phase transformer 1 at time t1. Due to the generation of the inrush current, the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K2 at time t2, so that the determination condition B is satisfied.
 時刻t3において、A相の第2高調波含有率(2f/1f)A、第3高調波含有率(3f/1f)A、および第4高調波含有率(4f/1f)Aの和が設定値K3を超える。これにより、OR演算器92の出力信号SG4がアクティブ状態になり、フリップフロップ90のリセット端子の入力がインアクティブ状態になる。 At time t3, the sum of the second harmonic content rate (2f/1f) A, the third harmonic content rate (3f/1f) A, and the fourth harmonic content rate (4f/1f) A of the A phase is set. Exceeds the value K3. As a result, the output signal SG4 of the OR operator 92 becomes active, and the input of the reset terminal of the flip-flop 90 becomes inactive.
 時刻t4においてB相の第2高調波含有率(2f/1f)Bが設定値K1を超えるので判定条件Aが満たされる。これにより、フリップフロップ90のセット端子に入力される信号SG1がアクティブ状態になるので、フリップフロップ90がセット状態になり、A相のリレー出力をロックするためのロック信号がアクティブ状態になる。 At time t4, the second harmonic content (2f/1f)B of phase B exceeds the set value K1, so judgment condition A is satisfied. As a result, the signal SG1 input to the set terminal of flip-flop 90 becomes active, so that flip-flop 90 becomes set and the lock signal for locking the relay output of phase A becomes active.
 なお、図15の例では、A相の第2高調波含有率(2f/1f)Aは、時刻t5において設定値K1を超えるが、連続して設定値K1を超えることはない。また、C相の第2高調波含有率(2f/1f)Cは、設定値K1を超えることはない。 Note that in the example of FIG. 15, the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t5, but does not continuously exceed the set value K1. Further, the second harmonic content rate (2f/1f) C of the C phase does not exceed the set value K1.
 時刻t6から時刻t7の間のT2時間の間、一時的に、A相の第2高調波含有率(2f/1f)Aが設定値K1以下になる。これにより、フリップフロップ90のセット端子に入力される信号SG1は、インアクティブ状態になる。しかしながら、実施の形態3の場合と異なり実施の形態4の場合には、判定条件Bの不成立はフリップフロップ90のリセットに関係しない。 During time T2 between time t6 and time t7, the second harmonic content rate (2f/1f) A of the A phase temporarily becomes less than or equal to the set value K1. As a result, the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive. However, unlike the case of the third embodiment, in the case of the fourth embodiment, the failure of the determination condition B is not related to the reset of the flip-flop 90.
 時刻t8において、変圧器内部のA相で故障が発生する。これにより、A相に故障電流が流れるので、A相の第2高調波含有率(2f/1f)Aが低下し、時刻t9において設定値K2以下になる。これにより、フリップフロップ90のセット端子に入力される信号SG1がインアクティブ状態になる。 At time t8, a failure occurs in the A phase inside the transformer. As a result, a fault current flows through the A phase, so that the second harmonic content rate (2f/1f) A of the A phase decreases and becomes equal to or less than the set value K2 at time t9. As a result, the signal SG1 input to the set terminal of the flip-flop 90 becomes inactive.
 次の時刻t10において、A相の第2高調波含有率(2f/1f)A、第3高調波含有率(3f/1f)A、および第4高調波含有率(4f/1f)Aの和が設定値K3以下になる。これにより、OR演算器92の出力信号SG4はインアクティブ状態になるので、フリップフロップ90のリセット端子の入力がアクティブ状態になる。この結果、フリップフロップ90がリセット状態となり、フリップフロップ90から出力されるロック信号がインアクティブ状態となってリレー出力のロックが解除される。 At the next time t10, the sum of the second harmonic content rate (2f/1f) A, the third harmonic content rate (3f/1f) A, and the fourth harmonic content rate (4f/1f) A of the A phase. becomes below the set value K3. As a result, the output signal SG4 of the OR operator 92 becomes inactive, so that the input of the reset terminal of the flip-flop 90 becomes active. As a result, the flip-flop 90 enters the reset state, the lock signal output from the flip-flop 90 becomes inactive, and the relay output is unlocked.
 [実施の形態4におけるインラッシュ判定部75の変形例]
 図16は、図14のインラッシュ判定部75の変形例を示すブロック図である。図16のインラッシュ判定部75は、図13のインラッシュ判定部75の変形例と見ることができる。すなわち、図16のインラッシュ判定部75は、条件Dの判定結果を示すOR演算器89の出力と、条件Cの判定結果を示す判定部93の出力とがOR演算器92に入力されるが、条件Bの判定結果を示す判定部83の出力がOR演算器92に入力されない点で図13のインラッシュ判定部75と異なる。
[Modification of inrush determination unit 75 in Embodiment 4]
FIG. 16 is a block diagram showing a modification of the inrush determining section 75 of FIG. 14. In FIG. The in-rush determination section 75 in FIG. 16 can be seen as a modification of the in-rush determination section 75 in FIG. 13. That is, in the inrush determination unit 75 of FIG. 16, the output of the OR operator 89 indicating the determination result of condition D and the output of the determination unit 93 indicating the determination result of condition C are input to the OR operator 92. This differs from the in-rush determination unit 75 of FIG. 13 in that the output of the determination unit 83 indicating the determination result of condition B is not input to the OR operator 92.
 したがって、フリップフロップ90は、判定条件Cおよび判定条件Dがいずれも成立していない場合にリセット状態になることにより、自相のリレー出力のロックを解除する。言い換えると、判定条件Dが成立しておらず、かつリレー出力がロックされた相において判定条件Cが成立していない場合に、当該相のリレー出力のロックが解除される。 Therefore, the flip-flop 90 enters the reset state when neither the determination condition C nor the determination condition D is satisfied, thereby releasing the lock of the relay output of the own phase. In other words, when the determination condition D is not satisfied and the determination condition C is not satisfied in the phase in which the relay output is locked, the relay output of the phase is unlocked.
 図10および図13を参照して説明したように、判定条件Dは、インラッシュ電流が発生した場合により確実にリレー出力をロックするために設けられている。3相のうち1相しか第2高調波含有率が設定値K1を超えないことが稀にあるが、ほとんどの場合に3相中2相で第2高調波含有率が設定値K1を超える。したがって、判定条件Dを用いることによって、インラッシュ電流の発生時に上述した判定条件Cが過渡的に成立しない場合があっても、リレー出力のロックがはずれないように補完できる。 As described with reference to FIGS. 10 and 13, determination condition D is provided to more reliably lock the relay output when an inrush current occurs. Although it is rare that the second harmonic content of only one of the three phases exceeds the set value K1, in most cases the second harmonic content of two of the three phases exceeds the set value K1. Therefore, by using the determination condition D, even if the above-mentioned determination condition C is not satisfied transiently when an inrush current occurs, it can be complemented so that the relay output is not unlocked.
 [実施の形態4の効果]
 上記のようにリレー出力のロックが解除される条件を、判定条件Cが成立しないこととして、判定条件Bをはずしても実施の形態3の場合とほぼ同様の効果が得られる。また、設定値K3は設定値K2よりも大きい値であるので、判定条件Cが不成立となるタイミングのほうが、判定条件Bが不成立となるタイミングよりも早くなることが予想される。この結果、より早いタイミングでリレー出力のロックを解除できる。
[Effects of Embodiment 4]
Even if the condition for unlocking the relay output as described above is that the judgment condition C is not satisfied, and the judgment condition B is removed, substantially the same effect as in the third embodiment can be obtained. Further, since the set value K3 is a larger value than the set value K2, it is expected that the timing at which the determination condition C fails is earlier than the timing at which the determination condition B fails. As a result, the relay output can be unlocked at an earlier timing.
 さらに、判定条件Dをフリップフロップ90のリセット条件に組み合わせてもよい。すなわち、フリップフロップ90は、判定条件Cおよび判定条件Dが成立していない場合にリセット状態になる。これにより、インラッシュ電流の発生中には、より確実にリレー出力をロックでき、インラッシュ電流の発生中に三相変圧器1の内部故障が発生した場合には、リレー出力のロックを確実に解除できる。 Furthermore, the determination condition D may be combined with the reset condition of the flip-flop 90. That is, the flip-flop 90 enters the reset state when the determination condition C and the determination condition D are not satisfied. As a result, the relay output can be more reliably locked while an inrush current is occurring, and if an internal failure of the three-phase transformer 1 occurs while an inrush current is occurring, the relay output can be more reliably locked. Can be canceled.
 なお、条件Aの判定結果を表すOR演算器84の出力と、条件Cの判定結果を表す判定部93の出力とをAND演算器85に入力することにより、条件Aと条件Cとが共に満たされる場合に、フリップフロップ90をセット状態にするという変形例が考えられる。この変形例を採用しても、多くの場合に問題は生じない。しかしながら、故障電流が大きい場合には、電流変成器CTの飽和が生じるために、変圧器保護リレー4の入力に第3高調波が重畳する。この結果、リレー出力のロック状態が継続することになるので問題が生じる。したがって、リレー出力をロックする条件は、実施の形態1~3の場合と同様に、条件Aと条件Bとが共に成立する場合のほうが望ましい。 Note that by inputting the output of the OR operator 84 representing the determination result of condition A and the output of the determining unit 93 representing the determination result of condition C to the AND operator 85, both conditions A and C are satisfied. A modification may be considered in which the flip-flop 90 is placed in the set state when the data is stored. Even if this modification is adopted, no problem will occur in many cases. However, when the fault current is large, saturation of the current transformer CT occurs, so that the third harmonic is superimposed on the input of the transformer protection relay 4. As a result, a problem arises because the relay output remains locked. Therefore, as in the case of the first to third embodiments, it is preferable that the condition for locking the relay output is one in which both condition A and condition B are satisfied.
 実施の形態5.
 実施の形態5の変圧器保護リレー4では、前述の判定条件Aと判定条件Fとの組合せによってインラッシュ電流の発生を検出する場合について説明する。各相の第2高調波のみの検出によって、高信頼度でリレー出力のロックとその解除を制御できるというメリットがある。
Embodiment 5.
In the transformer protection relay 4 of Embodiment 5, a case will be described in which the occurrence of an inrush current is detected by a combination of the above-mentioned judgment condition A and judgment condition F. By detecting only the second harmonic of each phase, there is an advantage that locking and releasing of the relay output can be controlled with high reliability.
 [インラッシュ判定部75の詳細な構成]
 図17は、実施の形態5の変圧器保護リレー4において、図3のA相演算部54に含まれるインラッシュ判定部75の具体的構成例を示すブロック図である。なお、図3のB相演算部55およびC相演算部56の場合にも、図17の場合と同様の構成のインラッシュ判定部75が用いられる。
[Detailed configuration of in-rush determination unit 75]
FIG. 17 is a block diagram showing a specific configuration example of the inrush determination section 75 included in the A-phase calculation section 54 of FIG. 3 in the transformer protection relay 4 of the fifth embodiment. Note that in the case of the B-phase calculation section 55 and the C-phase calculation section 56 in FIG. 3, an inrush determination section 75 having the same configuration as in the case of FIG. 17 is used.
 図17を参照して、インラッシュ判定部75は、判定部80,81,82と、判定部83,94,95と、OR演算器84,89と、AND演算器85,86,87,88と、復帰タイマー91とを備える。 Referring to FIG. 17, in-rush determination section 75 includes determination sections 80, 81, 82, determination sections 83, 94, 95, OR operation units 84, 89, and AND operation units 85, 86, 87, 88. and a return timer 91.
 実施の形態1~4の場合と同様に、判定部80は、A相の第2高調波含有率(2f/1f)Aが設定値K1よりも大きいか否かを判定する。判定部81は、B相の第2高調波含有率(2f/1f)Bが設定値K1よりも大きいか否かを判定する。判定部82は、C相の第2高調波含有率(2f/1f)Cが設定値K1よりも大きいか否かを判定する。前述のように、設定値K1は、比較的大きい値(たとえば、15%)に設定される。 As in the first to fourth embodiments, the determining unit 80 determines whether the second harmonic content rate (2f/1f) A of the A phase is larger than the set value K1. The determination unit 81 determines whether the second harmonic content rate (2f/1f)B of the B phase is larger than the set value K1. The determination unit 82 determines whether the second harmonic content rate (2f/1f) C of the C phase is larger than the set value K1. As mentioned above, the set value K1 is set to a relatively large value (for example, 15%).
 OR演算器84は、判定部80,81,82の判定結果のOR演算を行う。したがって、OR演算器84の出力は、A相、B相、C相のうちいずれか1相の一次側と二次側との差電流に含まれる第2高調波の含有率が設定値K1より大きいという判定条件Aが成立するか否かを示している。 The OR calculator 84 performs an OR operation on the determination results of the determination units 80, 81, and 82. Therefore, the output of the OR calculator 84 indicates that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the A, B, and C phases is lower than the set value K1. This indicates whether or not the determination condition A that the value is large is satisfied.
 一方、判定部83は、A相の第2高調波含有率(2f/1f)Aが設定値K2よりも大きいか否かを判定する。判定部94は、B相の第2高調波含有率(2f/1f)Bが設定値K2よりも大きいか否かを判定する。判定部95は、C相の第2高調波含有率(2f/1f)Cが設定値K2よりも大きいか否かを判定する。設定値K2は、設定値K1よりも小さい値(たとえば、5%)に設定される。 On the other hand, the determination unit 83 determines whether the second harmonic content rate (2f/1f) A of the A phase is larger than the set value K2. The determination unit 94 determines whether the second harmonic content rate (2f/1f)B of the B phase is larger than the set value K2. The determination unit 95 determines whether the second harmonic content rate (2f/1f) C of the C phase is larger than the set value K2. The set value K2 is set to a smaller value (for example, 5%) than the set value K1.
 AND演算器86は、判定部83,94の判定結果に対してAND演算を実行する。AND演算器87は、判定部94,95の判定結果に対してAND演算を実行する。AND演算器88は、判定部83,95の判定結果に対してのAND演算結果を実行する。OR演算器89は、AND演算器86,87,88の各々のAND演算結果に対してOR演算を実行する。したがって、OR演算器89の出力は、3相のうちいずれか2相の一次側と二次側との差電流に含まれる第2高調波の含有率が共に設定値K2より大きいという判定条件Fが成立するか否かを示している。 The AND operation unit 86 performs an AND operation on the determination results of the determination units 83 and 94. The AND operation unit 87 performs an AND operation on the determination results of the determination units 94 and 95. The AND operator 88 performs an AND operation on the determination results of the determination units 83 and 95. The OR operator 89 performs an OR operation on the AND operation results of the AND operators 86, 87, and 88. Therefore, the output of the OR operator 89 is based on the judgment condition F that the content of the second harmonic included in the difference current between the primary side and the secondary side of any two of the three phases is both greater than the set value K2. It shows whether or not it holds true.
 復帰タイマー91は、OR演算器89の出力がインアクティブ状態からアクティブ状態に変化した場合には、自身の出力を直ちにアクティブ状態にする。一方、復帰タイマー91は、OR演算器89がアクティブ状態からインアクティブ状態に変化し、インアクティブの状態が設定時間T1以上継続した場合に、自身の出力をインアクティブ状態にする。 When the output of the OR operator 89 changes from an inactive state to an active state, the return timer 91 immediately sets its own output to an active state. On the other hand, the return timer 91 changes its output to an inactive state when the OR calculator 89 changes from an active state to an inactive state and the inactive state continues for a set time T1 or more.
 AND演算器85は、条件Aの判定結果を示すOR演算器84の出力信号と、条件Fの判定結果を示すOR演算器89の出力に対して復帰タイマー91による遅延処理を施した信号とのAND演算を実行する。AND演算器85から出力されるロック信号がアクティブ状態になった場合にリレー出力がロックされ、AND演算器85から出力されるロック信号がインアクティブ状態になった場合にリレー出力のロックが解除される。 The AND operator 85 combines the output signal of the OR operator 84 indicating the determination result of condition A and the signal obtained by performing delay processing by the recovery timer 91 on the output of the OR operator 89 indicating the determination result of condition F. Perform an AND operation. When the lock signal output from the AND operator 85 becomes active, the relay output is locked, and when the lock signal output from the AND operator 85 becomes inactive, the relay output is unlocked. Ru.
 したがって、条件Aおよび条件Fが共に成立している場合に、各相のリレー出力がロックされる。一方、条件Aが成立しなくなった場合または条件Fが成立しなくなった状態が設定時間T1継続した場合に、各相のリレー出力のロックが解除される。 Therefore, when both condition A and condition F are satisfied, the relay output of each phase is locked. On the other hand, when condition A no longer holds true or when condition F no longer holds true for a set time T1, the relay outputs of each phase are unlocked.
 上記の構成によれば、インラッシュ電流が発生した場合には、3相中1相の第2高調波含有率は必ず設定値K1より大きくなるので、判定条件Aが成立する。さらに、少なくともインラッシュ電流発生直後において、3相中2相の第2高調波含有率は必ず設定値K2より大きくなるので、判定条件Fが成立する。したがって、上記の構成によれば、インラッシュ電流の発生を確実に検出できる。 According to the above configuration, when an inrush current occurs, the second harmonic content rate of one of the three phases is always larger than the set value K1, so the determination condition A is satisfied. Furthermore, at least immediately after the inrush current is generated, the second harmonic content of two of the three phases is always greater than the set value K2, so the determination condition F is satisfied. Therefore, according to the above configuration, the occurrence of inrush current can be detected reliably.
 また、インラッシュ電流の発生中に変圧器の内部故障が発生した場合には、電流変成器CTの検出電流に対してY/Δ変換が施されることにより、故障電流は必ず2相で検出される。この場合、故障電流はほとんど基本波成分であるので、判定条件Fが成立しなくなり、結果としてリレー出力のロックが確実に解除される。 In addition, if an internal failure of the transformer occurs while an inrush current is being generated, the fault current is always detected in two phases by applying Y/Δ conversion to the current detected by the current transformer CT. be done. In this case, since the fault current is almost a fundamental wave component, the determination condition F no longer holds, and as a result, the relay output is reliably unlocked.
 また、いずれか2相において第2高調波含有率が一時的に設定値K2以下に低下したとしても、復帰タイマー91を設けることによってリレー出力のロックがはずれるのを防止できる。これにより、インラッシュ電流による変圧器保護リレー4の誤動作を防止できる。 Further, even if the second harmonic content rate temporarily drops below the set value K2 in any two phases, by providing the recovery timer 91, it is possible to prevent the relay output from becoming unlocked. Thereby, malfunction of the transformer protection relay 4 due to inrush current can be prevented.
 図18は、図17のインラッシュ判定部75の動作を説明するタイミング図である。図18の太線で示されている部分において、判定条件が満たされており、出力信号がアクティブ状態になっていること示す。 FIG. 18 is a timing diagram illustrating the operation of the in-rush determining section 75 of FIG. 17. The portion indicated by the bold line in FIG. 18 indicates that the determination condition is satisfied and the output signal is in the active state.
 図18を参照して、時刻t1において三相変圧器1に加電される。インラッシュ電流の発生により、時刻t2においてB相の第2高調波含有率(2f/1f)Bが設定値K2を超える。 Referring to FIG. 18, power is applied to three-phase transformer 1 at time t1. Due to the generation of the inrush current, the second harmonic content rate (2f/1f) B of the B phase exceeds the set value K2 at time t2.
 次の時刻t3において、A相の第2高調波含有率(2f/1f)Aが設定値K2を超えるので、判定条件Fが満たされる。さらに、時刻t3において、B相の第2高調波含有率(2f/1f)Bが設定値K1を超えるので、判定条件Aが満たされる。これにより、AND演算器85から出力されるロック信号がアクティブ状態になり、リレー出力がロックされる。 At the next time t3, the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K2, so the determination condition F is satisfied. Furthermore, at time t3, the second harmonic content rate (2f/1f)B of the B phase exceeds the set value K1, so the determination condition A is satisfied. As a result, the lock signal output from the AND operator 85 becomes active, and the relay output is locked.
 なお、図18の例では、A相の第2高調波含有率(2f/1f)Aは、時刻t4において設定値K1を超えるが、連続して設定値K1を超えることはない。また、C相の第2高調波含有率(2f/1f)Cは、時刻t4において設定値K2を超えるが、設定値K1を超えることはない。 Note that in the example of FIG. 18, the second harmonic content rate (2f/1f) A of the A phase exceeds the set value K1 at time t4, but does not continuously exceed the set value K1. Further, the second harmonic content rate (2f/1f) C of the C phase exceeds the set value K2 at time t4, but does not exceed the set value K1.
 時刻t6から時刻t7の間のT2時間の間、一時的に、A相の第2高調波含有率(2f/1f)Aが設定値K2以下になるとともに、C相の第2高調波含有率(2f/1f)Cが設定値K2以下になる。これにより、条件Fが成立しなくなるが、T2時間は復帰タイマー91の設定時間T1より短いので、AND演算器85から出力されるロック信号はアクティブ状態で維持される。 During time T2 between time t6 and time t7, the second harmonic content rate (2f/1f) A of the A phase becomes equal to or less than the set value K2, and the second harmonic content rate of the C phase temporarily decreases. (2f/1f)C becomes equal to or less than the set value K2. As a result, condition F no longer holds, but since the time T2 is shorter than the set time T1 of the recovery timer 91, the lock signal output from the AND operator 85 is maintained in the active state.
 時刻t8において、変圧器内部のA相で故障が発生する。これにより、A相およびC相に故障電流が流れるので、A相の第2高調波含有率(2f/1f)AおよびC相の第2高調波含有率(2f/1f)Cが低下し、時刻t9以降に両方とも設定値K2以下になる。これにより、判定条件Fが不成立となる。 At time t8, a failure occurs in the A phase inside the transformer. As a result, a fault current flows through the A phase and the C phase, so the second harmonic content rate (2f/1f)A of the A phase and the second harmonic content rate (2f/1f)C of the C phase decrease, After time t9, both become equal to or less than the set value K2. As a result, the determination condition F is not satisfied.
 時刻t9から復帰タイマー91の設定時間T1が経過した時刻t10において、AND演算器85から出力されるロック信号はインアクティブ状態に変化する。これにより、リレー出力のロックが解除される。 At time t10, when the set time T1 of the recovery timer 91 has elapsed from time t9, the lock signal output from the AND calculator 85 changes to an inactive state. This unlocks the relay output.
 [実施の形態5の効果]
 以上のとおり、実施の形態5の変圧器保護リレー(4)は、変圧器(1)の第1相(A相)、第2相(B相)、および第3相(C相)の各々について、変圧器(1)の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行うリレー演算部(64)と、変圧器(1)においてインラッシュ電流の発生を検出するための判定を行う判定部(75)とを備える。判定部(75)は、第1相、第2相、および第3相のいずれか1相の一次側と二次側との差電流に含まれる第2高調波の含有率が第1の設定値(K1)より大きいという第1条件(条件A)と、第1相、第2相、および第3相のうちいずれか2相の一次側と二次側との差電流に含まれる第2高調波の含有率が共に第2の設定値(K2)より大きいという第2条件(条件F)との成立の有無を判定する。第2の設定値(K2)は第1の設定値(K1)よりも小さい。判定部(75)は、第1条件(条件A)および第2条件(条件F)が共に成立している場合にリレー演算部(64)の出力をロックし、第1条件(条件A)が成立しなくなった場合または第2条件(条件F)が成立しなくなった状態が第1の設定時間(T1)継続した場合にリレー演算部の出力のロックを解除する。
[Effects of Embodiment 5]
As described above, the transformer protection relay (4) of Embodiment 5 applies to each of the first phase (A phase), second phase (B phase), and third phase (C phase) of the transformer (1). , a relay calculation unit (64) performs current differential relay calculation based on the fundamental wave component included in the difference current between the primary side and the secondary side of the transformer (1), and an inrush The determination unit 75 includes a determination unit (75) that performs determination for detecting generation of current. The determination unit (75) determines whether the content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the first phase, second phase, and third phase is set to a first setting. The first condition (condition A) is that the value is larger than the value (K1), and the second condition included in the difference current between the primary side and the secondary side of any two phases among the first phase, second phase, and third phase. It is determined whether or not the second condition (condition F) that both harmonic content rates are larger than the second set value (K2) is satisfied. The second set value (K2) is smaller than the first set value (K1). The determination unit (75) locks the output of the relay calculation unit (64) when the first condition (condition A) and the second condition (condition F) are both satisfied, and the first condition (condition A) is satisfied. When the second condition (condition F) is no longer satisfied or when the state in which the second condition (condition F) is no longer satisfied continues for the first set time (T1), the output of the relay calculation section is unlocked.
 以上の構成によれば、インラッシュ電流が発生した場合には、3相中1相の第2高調波含有率は必ず第1の設定値(K1)以上になるので、第1条件(条件A)が成立する。さらに、少なくともインラッシュ電流発生直後において、3相中の2相の第2高調波含有率は必ず第2の設定値(K2)以上になるので、第2条件(条件F)が成立する。したがって、上記の構成によれば、インラッシュ電流の発生を確実に検出できる。 According to the above configuration, when an inrush current occurs, the second harmonic content rate of one of the three phases is always equal to or higher than the first set value (K1). ) holds true. Furthermore, at least immediately after the inrush current is generated, the second harmonic content of two of the three phases is always equal to or higher than the second set value (K2), so the second condition (condition F) is satisfied. Therefore, according to the above configuration, the occurrence of inrush current can be detected reliably.
 また、インラッシュ電流の発生中に変圧器(1)の内部故障が発生した場合には、電流変成器CTの検出電流に対してY/Δ変換が施されていることにより、故障電流は必ず2相で検出される。この場合、故障電流はほとんど基本波成分であるので、第2条件(条件F)が成立しなくなり、結果としてリレー出力のロックが確実に解除される。 In addition, if an internal failure occurs in the transformer (1) while an inrush current is being generated, the fault current will always be reduced due to the Y/Δ conversion applied to the detected current of the current transformer CT. Detected in two phases. In this case, since the fault current is almost a fundamental wave component, the second condition (condition F) no longer holds, and as a result, the relay output is reliably unlocked.
 また、いずれか2相において第2高調波含有率が一時的に設定値K2以下に低下したとしても、第2条件(条件F)が成立しなくなった状態が第1の設定時間(T1)継続した場合にリレー出力のロックが解除されるので、不必要にリレー出力のロックがはずれるのを防止できる。これにより、インラッシュ電流による変圧器保護リレー(4)の誤動作を防止できる。 Furthermore, even if the second harmonic content rate temporarily drops below the set value K2 in any two phases, the state in which the second condition (condition F) no longer holds continues for the first set time (T1). Since the relay output is unlocked when this occurs, it is possible to prevent the relay output from being unlocked unnecessarily. Thereby, malfunction of the transformer protection relay (4) due to inrush current can be prevented.
 実施の形態6.
 変圧器の鉄心が劣化すると、インラッシュ電流の大きさが変化することが知られている(たとえば、特許6840306号公報(特許文献2)を参照)。したがって、変圧器の鉄心の劣化度に応じて、実施の形態1~5で説明した設定値K1~K4を適切に変更する必要が生じる。しかしながら、インラッシュ電流の大きさは電圧投入位相および残留磁束によっても変化するので、インラッシュ電流の大きさによって変圧器の劣化度を推定するのは困難である。
Embodiment 6.
It is known that when the iron core of a transformer deteriorates, the magnitude of the inrush current changes (see, for example, Japanese Patent No. 6840306 (Patent Document 2)). Therefore, it is necessary to appropriately change the set values K1 to K4 described in the first to fifth embodiments depending on the degree of deterioration of the transformer core. However, since the magnitude of the inrush current also changes depending on the voltage application phase and the residual magnetic flux, it is difficult to estimate the degree of deterioration of the transformer based on the magnitude of the inrush current.
 本願の発明者らは種々の検討を重ねた結果、インラッシュ電流波形に現れる低電流の平坦部分の長さ(以下、デュエルタイム(Dwell Time)と称する)の変化量が、変圧器の鉄心の劣化度に関係していることを見出した。デュエルタイムの変化量は、電圧投入位相および残留磁束には依存しないので、再現性良く変圧器の鉄心の劣化度を推定できる。以下、図面を参照して説明する。 As a result of various studies, the inventors of the present application found that the amount of change in the length of the low current flat portion that appears in the inrush current waveform (hereinafter referred to as dwell time) is We found that it is related to the degree of deterioration. Since the amount of change in dwell time does not depend on the voltage application phase and residual magnetic flux, the degree of deterioration of the transformer core can be estimated with good reproducibility. This will be explained below with reference to the drawings.
 [変圧器の演算処理部の機能構成]
 図19は、実施の形態6の変圧器保護リレー4において、演算処理部30におけるA相演算部54の機能的構成例を示すブロック図である。
[Functional configuration of transformer arithmetic processing section]
FIG. 19 is a block diagram showing an example of the functional configuration of the A-phase calculation unit 54 in the calculation processing unit 30 in the transformer protection relay 4 of the sixth embodiment.
 図19のA相演算部54は、デュエルタイム計測部96をさらに備える点で図4のA相演算部54と異なる。デュエルタイム計測部96は、三相変圧器1の一次側のA相電流I’1Aおよび二次側のA相電流I’2Aの電流波形に基づいてデュエルタイムを計測する。もしくは、デュエルタイム計測部96は、一次側のA相電流I’1Aおよび二次側のA相電流I’2Aの差電流波形(すなわち、ベクトル和)に基づいてデュエルタイムを計測してもよい。この場合、デュエルタイム計測部96は、高調波用差電流演算部65から出力された差電流IdAに基づいてデュエルタイムを計測する。デュエルタイム計測部96は、計測されたデュエルタイムの減少量に応じて、前述の設定値K1~K4を変更する。 The A-phase calculation unit 54 in FIG. 19 differs from the A-phase calculation unit 54 in FIG. 4 in that it further includes a dwell time measurement unit 96. The dwell time measurement unit 96 measures the dwell time based on the current waveforms of the A-phase current I'1A on the primary side and the A-phase current I'2A on the secondary side of the three-phase transformer 1. Alternatively, the dwell time measuring section 96 may measure the dwell time based on the difference current waveform (i.e., vector sum) between the A-phase current I'1A on the primary side and the A-phase current I'2A on the secondary side. . In this case, the dwell time measurement unit 96 measures the dwell time based on the difference current IdA output from the harmonic difference current calculation unit 65. The duel time measuring section 96 changes the aforementioned set values K1 to K4 according to the amount of decrease in the measured duel time.
 ここで、デュエルタイムは、変圧器の鉄心の劣化度合いに応じて減少する。また、デュエルタイムの減少量は、変圧器への電圧投入位相に依存せずに一定である。したがって、デュエルタイムの減少量に応じて、前述の設定値K1~K4を増加させることによって、インラッシュ電流発生を精度良く判定できる。実際の設定値K1~K4の変更量は、実験もしくはシミュレーションによって予め決定できる。 Here, the dwell time decreases depending on the degree of deterioration of the transformer core. Furthermore, the amount of decrease in dwell time is constant regardless of the phase of voltage application to the transformer. Therefore, by increasing the aforementioned set values K1 to K4 in accordance with the amount of decrease in the dwell time, it is possible to accurately determine the occurrence of inrush current. The amount of change in the actual set values K1 to K4 can be determined in advance by experiment or simulation.
 なお、デュエルタイム計測部96は、B相演算部55に設けてもよいし、C相演算部56に設けてもよい。もしくは、デュエルタイム計測部96は、A相、B相およびC相のそれぞれの一次側と二次側の差電流の合成電流に基づいてデュエルタイムを計測してもよい。もしくは、デュエルタイム計測部96は、各相のデュエルタイムの変化量を平均することにより、最終的なデュエルタイムの変化量を決定してもよい。 Note that the duel time measurement section 96 may be provided in the B-phase calculation section 55 or the C-phase calculation section 56. Alternatively, the dwell time measuring section 96 may measure the dwell time based on a composite current of the difference current between the primary side and the secondary side of each of the A phase, B phase, and C phase. Alternatively, the dwell time measuring section 96 may determine the final amount of change in the dwell time by averaging the amount of change in the dwell time of each phase.
 上記以外のA相演算部54の構成、たとえば、インラッシュ判定部75の構成は、実施の形態1~5の場合と同様であるので詳しい説明を繰り返さない。また、図1~図3の構成は、実施の形態6の場合にも共通する。 The configuration of the A-phase calculation unit 54 other than the above, for example, the configuration of the inrush determination unit 75, is the same as in Embodiments 1 to 5, so detailed description will not be repeated. Further, the configurations shown in FIGS. 1 to 3 are also common to the sixth embodiment.
 [デュエルタイムの変化量の計算結果]
 以下、電圧投入位相が0°、30°、60°、および120°の場合のA相のインラッシュ電流波形の計算結果について説明する。劣化前と劣化後の鉄心の励磁特性は実験的に得られた値を用いた。インラッシュ電流波形の計算には、電力系統解析用のEMTP(Electro-Magnetic Transient Program)を用いた。
[Calculation results of duel time change]
Hereinafter, calculation results of the A-phase inrush current waveform when the voltage application phases are 0°, 30°, 60°, and 120° will be described. Experimentally obtained values were used for the excitation characteristics of the core before and after deterioration. EMTP (Electro-Magnetic Transient Program) for power system analysis was used to calculate the inrush current waveform.
 図20Aは、電圧投入位相が0°の場合のA相のインラッシュ電流波形の計算結果を示す図である。図20Bは、図20Aの0.089秒から0.091秒の部分の拡大図である。図20Aおよび図20Bにおいて、劣化前の電流波形を実線で示し、劣化後の電流波形を破線で示す。 FIG. 20A is a diagram showing the calculation result of the A-phase inrush current waveform when the voltage application phase is 0°. FIG. 20B is an enlarged view of the portion from 0.089 seconds to 0.091 seconds in FIG. 20A. In FIGS. 20A and 20B, the current waveform before deterioration is shown by a solid line, and the current waveform after deterioration is shown by a broken line.
 図20Aおよび図20Bに示すように、鉄心の劣化によって、デュエルタイムは、11.6ms(ミリ秒)から11.0msに減少した。したがって、変化量は約0.6msである。 As shown in FIGS. 20A and 20B, due to the deterioration of the iron core, the dwell time decreased from 11.6 ms (milliseconds) to 11.0 ms. Therefore, the amount of change is approximately 0.6 ms.
 図21Aは、電圧投入位相が30°の場合のA相のインラッシュ電流波形の計算結果を示す図である。図21Bは、図21Aの0.0875秒から0.0895秒の部分の拡大図である。図21Aおよび図21Bにおいて、劣化前の電流波形を実線で示し、劣化後の電流波形を破線で示す。 FIG. 21A is a diagram showing the calculation result of the A-phase inrush current waveform when the voltage application phase is 30°. FIG. 21B is an enlarged view of a portion from 0.0875 seconds to 0.0895 seconds in FIG. 21A. In FIGS. 21A and 21B, the current waveform before deterioration is shown by a solid line, and the current waveform after deterioration is shown by a broken line.
 図21Aおよび図21Bに示すように、鉄心の劣化によって、デュエルタイムは、12.4msから11.9msに減少した。したがって、変化量は約0.5msである。 As shown in FIGS. 21A and 21B, due to the deterioration of the iron core, the dwell time decreased from 12.4 ms to 11.9 ms. Therefore, the amount of change is approximately 0.5 ms.
 図22Aは、電圧投入位相が60°の場合のA相のインラッシュ電流波形の計算結果を示す図である。図22Bは、図22Aの0.082秒から0.084秒の部分の拡大図である。図22Aおよび図22Bにおいて、劣化前の電流波形を実線で示し、劣化後の電流波形を破線で示す。 FIG. 22A is a diagram showing the calculation result of the A-phase inrush current waveform when the voltage application phase is 60°. FIG. 22B is an enlarged view of the portion from 0.082 seconds to 0.084 seconds in FIG. 22A. In FIGS. 22A and 22B, the current waveform before deterioration is shown by a solid line, and the current waveform after deterioration is shown by a broken line.
 図22Aおよび図22Bに示すように、鉄心の劣化によって、デュエルタイムは、15.0msから14.4msに減少した。したがって、変化量は約0.6msである。 As shown in FIGS. 22A and 22B, due to the deterioration of the iron core, the dwell time decreased from 15.0 ms to 14.4 ms. Therefore, the amount of change is approximately 0.6 ms.
 図23Aは、電圧投入位相が120°の場合のA相のインラッシュ電流波形の計算結果を示す図である。図23Bは、図23Aの0.084秒から0.086秒の部分の拡大図である。図23Aおよび図23Bにおいて、劣化前の電流波形を実線で示し、劣化後の電流波形を破線で示す。 FIG. 23A is a diagram showing the calculation result of the A-phase inrush current waveform when the voltage application phase is 120°. FIG. 23B is an enlarged view of the portion from 0.084 seconds to 0.086 seconds in FIG. 23A. In FIGS. 23A and 23B, the current waveform before deterioration is shown by a solid line, and the current waveform after deterioration is shown by a broken line.
 図23Aおよび図23Bに示すように、鉄心の劣化によって、デュエルタイムは、15.1msから14.5msに減少した。したがって、変化量は約0.6msである。 As shown in FIGS. 23A and 23B, due to the deterioration of the iron core, the dwell time decreased from 15.1 ms to 14.5 ms. Therefore, the amount of change is approximately 0.6 ms.
 以上の結果から、変圧器の鉄心の劣化に伴うデュエルタイムの減少量は、変圧器への電圧投入位相に依存せずにほぼ一定(約0.6ms)であることがわかる。 From the above results, it can be seen that the amount of decrease in dwell time due to deterioration of the transformer core is almost constant (approximately 0.6 ms), regardless of the voltage application phase to the transformer.
 [実施の形態6の効果]
 以上のとおり、実施の形態6の変圧器保護リレー4によれば、デュエルタイムの変化量に基づいて高調波含有量と比較される各設定値K1~K4が変更される。これにより、変圧器の鉄心の劣化度合いに応じたインラッシュ電流波形の変化に対して、適切に設定値K1~K4を変更できるのでインラッシュ電流の発生の有無の判定精度を高めることができる。
[Effects of Embodiment 6]
As described above, according to the transformer protection relay 4 of the sixth embodiment, each set value K1 to K4, which is compared with the harmonic content, is changed based on the amount of change in the dwell time. As a result, the set values K1 to K4 can be appropriately changed in response to changes in the inrush current waveform depending on the degree of deterioration of the transformer core, thereby increasing the accuracy of determining whether an inrush current is generated.
 今回開示された実施の形態はすべての点で例示であって制限的なものでないと考えられるべきである。この出願の範囲は上記した説明ではなくて請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。 The embodiments disclosed herein are illustrative in all respects and should not be considered restrictive. The scope of this application is indicated by the claims rather than the above description, and it is intended that all changes within the meaning and range equivalent to the claims are included.
 1 変圧器、2 一次巻線、3 二次巻線、4 変圧器保護リレー、5A,5B,5C,6A,6B,6C 三相線路、10 入力変換部、11 補助変成器、20 A/D変換部、21 アナログフィルタ、22 サンプルホールド回路、23 マルチプレクサ、24 A/D変換器、30 演算処理部、31 CPU、32 RAM、33 ROM、34 バス、40 I/O部、41 デジタル入力回路、42 デジタル出力回路、50,51 Y/Δ変換部、52,53 ゲイン調整部、54 A相演算部、55 B相演算部、56 C相演算部、60,61,66,67,68 フィルタ、62 差電流演算部、63 抑制電流演算部、64 比率差動リレー演算部、65 高調波用差電流演算部、69,70,71 実効値演算部、72,73,74 含有率演算部、75 インラッシュ判定部、76,85,86,87,88 AND演算器、80,81,82,83,93,94,95 判定部、84,89,92 OR演算器、90 フリップフロップ、91 復帰タイマー、96 デュエルタイム計測部、A,B,C,D,E,F 判定条件、CT 電流変成器、GND 接地極、K1,K2,K3,K4 設定値、SG1,SG2,SG3,SG4 出力信号、T1 設定時間。 1 Transformer, 2 Primary winding, 3 Secondary winding, 4 Transformer protection relay, 5A, 5B, 5C, 6A, 6B, 6C three-phase line, 10 Input converter, 11 Auxiliary transformer, 20 A/D Conversion unit, 21 analog filter, 22 sample hold circuit, 23 multiplexer, 24 A/D converter, 30 arithmetic processing unit, 31 CPU, 32 RAM, 33 ROM, 34 bus, 40 I/O unit, 41 digital input circuit, 42 Digital output circuit, 50, 51 Y/Δ conversion unit, 52, 53 Gain adjustment unit, 54 A phase calculation unit, 55 B phase calculation unit, 56 C phase calculation unit, 60, 61, 66, 67, 68 filter, 62 Differential current calculation unit, 63 Suppression current calculation unit, 64 Ratio differential relay calculation unit, 65 Harmonic difference current calculation unit, 69, 70, 71 Effective value calculation unit, 72, 73, 74 Content rate calculation unit, 75 Inrush judgment unit, 76, 85, 86, 87, 88 AND operation unit, 80, 81, 82, 83, 93, 94, 95 judgment unit, 84, 89, 92 OR operation unit, 90 flip-flop, 91 return timer , 96 Duel time measurement section, A, B, C, D, E, F Judgment conditions, CT current transformer, GND grounding electrode, K1, K2, K3, K4 setting value, SG1, SG2, SG3, SG4 output signal, T1 Setting time.

Claims (18)

  1.  変圧器の第1相、第2相、および第3相にそれぞれ対応して設けられ、対応する相の前記変圧器の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行う、第1のリレー演算部、第2のリレー演算部、および第3のリレー演算部と、
     前記変圧器の前記第1相、前記第2相、および前記第3相にそれぞれ対応して設けられ、インラッシュ電流の発生を検出するための判定を行う第1の判定部、第2の判定部、および第3の判定部とを備え、
     前記第1の判定部、前記第2の判定部、および前記第3の判定部の各々は、
     前記第1相、前記第2相、および前記第3相のいずれか1相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が第1の設定値より大きいという第1条件と、対応する相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が第2の設定値より大きいという第2条件との成立の有無を判定し、前記第2の設定値は前記第1の設定値よりも小さく、
     前記第1の判定部、前記第2の判定部、および前記第3の判定部の各々は、前記第1条件および前記第2条件が共に成立しているか否かに基づいて、対応する相の前記リレー演算部の出力をロックする、変圧器保護リレー。
    It is provided corresponding to the first phase, second phase, and third phase of the transformer, and is based on the fundamental wave component included in the difference current between the primary side and the secondary side of the transformer of the corresponding phase. a first relay calculation section, a second relay calculation section, and a third relay calculation section that perform current differential relay calculation;
    A first determination unit and a second determination unit are provided corresponding to the first phase, the second phase, and the third phase of the transformer, respectively, and perform determination for detecting generation of inrush current. and a third determination unit,
    Each of the first determining section, the second determining section, and the third determining section:
    The content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the first phase, the second phase, and the third phase is lower than the first set value. Whether or not the first condition that it is large and the second condition that the content rate of the second harmonic included in the difference current between the primary side and the secondary side of the corresponding phase is larger than a second set value are met. is determined, the second set value is smaller than the first set value,
    Each of the first determining section, the second determining section, and the third determining section determines the corresponding phase based on whether both the first condition and the second condition are satisfied. A transformer protection relay that locks the output of the relay calculation section.
  2.  前記第1の判定部、前記第2の判定部、および前記第3の判定部の各々は、前記第1条件および前記第2条件が共に成立した場合にセット状態になり、前記第2条件が成立していない状態が第1設定時間継続した場合にリセット状態になるフリップフロップを含み、
     前記フリップフロップは、前記セット状態のときに対応する相の前記リレー演算部の出力をロックし、前記リセット状態のときに対応する相の前記リレー演算部の出力のロックを解除する、請求項1に記載の変圧器保護リレー。
    Each of the first determining section, the second determining section, and the third determining section enters a set state when both the first condition and the second condition are satisfied, and the second condition is satisfied. including a flip-flop that enters a reset state when a state in which it is not established continues for a first set time;
    2. The flip-flop locks the output of the relay calculation unit of the corresponding phase when in the set state, and unlocks the output of the relay calculation unit of the corresponding phase when in the reset state. Transformer protection relays as described in .
  3.  前記第1の判定部、前記第2の判定部、および前記第3の判定部の各々は、前記第1条件および前記第2条件に加えて、対応する相の前記一次側と前記二次側との差電流に含まれる第2高調波、第3高調波、および第4高調波の各々の含有率の和が第3の設定値より大きいという第3条件の成立の有無を判定し、
     前記第1の判定部、前記第2の判定部、および前記第3の判定部の各々は、前記第1条件および前記第2条件が共に成立した場合にセット状態になり、前記第3条件が成立していない場合にリセット状態になるフリップフロップを含み、
     前記フリップフロップは、前記セット状態のときに対応する相の前記リレー演算部の出力をロックし、前記リセット状態のときに対応する相の前記リレー演算部の出力のロックを解除する、請求項1に記載の変圧器保護リレー。
    Each of the first determining section, the second determining section, and the third determining section determines, in addition to the first condition and the second condition, the primary side and the secondary side of the corresponding phase. Determining whether or not a third condition is satisfied that the sum of the content rates of each of the second harmonic, the third harmonic, and the fourth harmonic included in the difference current is greater than a third set value,
    Each of the first determining section, the second determining section, and the third determining section enters a set state when the first condition and the second condition are both satisfied, and the third condition is satisfied. It includes a flip-flop that goes into a reset state if it is not established,
    2. The flip-flop locks the output of the relay calculation unit of the corresponding phase when in the set state, and unlocks the output of the relay calculation unit of the corresponding phase when in the reset state. Transformer protection relays as described in .
  4.  前記フリップフロップは、前記第2条件および前記第3条件がいずれも成立していない場合に前記リセット状態になる、請求項3に記載の変圧器保護リレー。 The transformer protection relay according to claim 3, wherein the flip-flop enters the reset state when neither the second condition nor the third condition is satisfied.
  5.  前記第1の判定部、前記第2の判定部、および前記第3の判定部の各々は、前記第1条件および前記第2条件に加えて、対応する相の前記一次側と前記二次側との差電流に含まれる第2高調波および第4高調波の各々の含有率の和が第3の設定値より大きいという第3条件の成立の有無を判定し、
     前記第1の判定部、前記第2の判定部、および前記第3の判定部の各々は、前記第1条件および前記第2条件が共に成立した場合にセット状態になり、前記第2条件および前記第3条件がいずれも成立していない場合にリセット状態になるフリップフロップを含み、
     前記フリップフロップは、前記セット状態のときに対応する相の前記リレー演算部の出力をロックし、前記リセット状態のときに対応する相の前記リレー演算部の出力のロックを解除する、請求項1に記載の変圧器保護リレー。
    Each of the first determining section, the second determining section, and the third determining section determines, in addition to the first condition and the second condition, the primary side and the secondary side of the corresponding phase. Determining whether or not a third condition is met that the sum of the respective content rates of the second harmonic and the fourth harmonic included in the difference current between the current and the third harmonic is greater than a third set value,
    Each of the first determining section, the second determining section, and the third determining section enters a set state when the first condition and the second condition are both satisfied, and the second condition and the second condition are satisfied. including a flip-flop that enters a reset state when none of the third conditions are satisfied;
    2. The flip-flop locks the output of the relay calculation unit of the corresponding phase when in the set state, and unlocks the output of the relay calculation unit of the corresponding phase when in the reset state. Transformer protection relays as described in .
  6.  前記第1の判定部、前記第2の判定部、および前記第3の判定部の各々は、さらに、前記第1相、前記第2相、および前記第3相のうちいずれか2相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が共に前記第1の設定値より大きいという付加的条件の成立の有無を判定し、
     前記フリップフロップは、さらに前記付加的条件が成立していない場合に、リセット状態になる、請求項2~5のいずれか1項に記載の変圧器保護リレー。
    Each of the first determining section, the second determining section, and the third determining section further comprises determining the phase of any two of the first phase, the second phase, and the third phase. Determining whether or not the additional condition that the content rate of the second harmonic included in the difference current between the primary side and the secondary side is both larger than the first set value is satisfied;
    The transformer protection relay according to any one of claims 2 to 5, wherein the flip-flop is in a reset state if the additional condition is not satisfied.
  7.  変圧器の第1相、第2相、および第3相の各々について、前記変圧器の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行うリレー演算部と、
     前記変圧器においてインラッシュ電流の発生を検出するための判定を行う判定部とを備え、前記判定部は、
     前記第1相、前記第2相、および前記第3相のいずれか1相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が第1の設定値より大きいという第1条件と、前記第1相、前記第2相、および前記第3相のうちいずれか2相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が共に第2の設定値より大きいという第2条件との成立の有無を判定し、前記第2の設定値は前記第1の設定値よりも小さく、
     前記判定部は、
     前記第1条件および前記第2条件が共に成立している場合に前記リレー演算部の出力をロックし、前記第1条件が成立しなくなった場合または前記第2条件が成立しなくなった状態が第1の設定時間継続した場合に前記リレー演算部の出力のロックを解除する、変圧器保護リレー。
    A relay that performs current differential relay calculation for each of the first phase, second phase, and third phase of the transformer based on a fundamental wave component included in the difference current between the primary side and the secondary side of the transformer. an arithmetic unit;
    a determination unit that performs determination to detect generation of inrush current in the transformer, the determination unit comprising:
    The content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the first phase, the second phase, and the third phase is lower than the first set value. The first condition is that it is large, and the content of a second harmonic included in the difference current between the primary side and the secondary side of any two phases among the first phase, the second phase, and the third phase. It is determined whether or not a second condition that both rates are larger than a second set value is met, and the second set value is smaller than the first set value;
    The determination unit includes:
    When the first condition and the second condition are both satisfied, the output of the relay calculation section is locked, and when the first condition is no longer satisfied or the second condition is no longer satisfied, the output is locked. 1. A transformer protection relay that unlocks the output of the relay calculation section when the set time continues.
  8.  前記変圧器のインラッシュ電流波形における平坦部分の長さであるデュエルタイムを計測するデュエルタイム計測部をさらに備え、
     前記デュエルタイムは、前記変圧器の鉄心の劣化度合いに応じて減少し、
     前記デュエルタイム計測部は、前記デュエルタイムの減少量に応じて、高調波含有率と比較される各設定値を変更する、請求項1~7のいずれか1項に記載の変圧器保護リレー。
    further comprising a dwell time measurement unit that measures a dwell time that is a length of a flat portion in an inrush current waveform of the transformer,
    The dwell time decreases depending on the degree of deterioration of the iron core of the transformer,
    The transformer protection relay according to any one of claims 1 to 7, wherein the dwell time measurement unit changes each set value to be compared with the harmonic content rate according to the amount of decrease in the dwell time.
  9.  前記リレー演算部は、比率差動原理によって内部故障の有無を判定する、請求項1~8のいずれか1項に記載の変圧器保護リレー。 The transformer protection relay according to any one of claims 1 to 8, wherein the relay calculation unit determines the presence or absence of an internal failure based on a ratio differential principle.
  10.  保護リレーを用いた変圧器保護方法であって、
     変圧器の第1相、第2相、および第3相の相ごとに、前記変圧器の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行うステップと、
     前記第1相、前記第2相、および前記第3相のいずれか1相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が第1の設定値より大きいという第1条件の成立の有無を判定するステップと、
     前記変圧器の前記相ごとに、前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が第2の設定値より大きいという第2条件の成立の有無を判定するステップとを備え、前記第2の設定値は前記第1の設定値よりも小さく、さらに、
     前記第1条件が成立するとともに、前記第2条件が成立している相がある場合に、当該相の保護リレー出力をロックするステップを備える、変圧器保護方法。
    A method for protecting a transformer using a protective relay, the method comprising:
    Performing current differential relay calculations for each of the first, second, and third phases of the transformer based on the fundamental wave component included in the difference current between the primary and secondary sides of the transformer. step and
    The content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the first phase, the second phase, and the third phase is lower than the first set value. a step of determining whether or not the first condition of being large is satisfied;
    For each phase of the transformer, it is determined whether a second condition that a content rate of a second harmonic included in the difference current between the primary side and the secondary side is greater than a second set value is satisfied. and the second set value is smaller than the first set value, and further,
    A transformer protection method, comprising the step of locking a protective relay output of a phase when the first condition is satisfied and there is a phase for which the second condition is satisfied.
  11.  前記保護リレー出力がロックされた相において前記第2条件が成立していない状態が第1の設定時間継続した場合に、当該相の前記保護リレー出力のロックを解除するステップをさらに備える、請求項10に記載の変圧器保護方法。 Claim further comprising the step of unlocking the protective relay output of the locked phase if the second condition continues for a first set time in the phase in which the protective relay output is locked. 10. The transformer protection method according to 10.
  12.  前記変圧器の前記相ごとに、前記一次側と前記二次側との差電流に含まれる第2高調波、第3高調波、および第4高調波の各々の含有率の和が第3の設定値より大きいという第3条件の成立の有無を判定するステップと、
     前記保護リレー出力がロックされた相において前記第3条件が成立していない場合に、当該相の前記保護リレー出力のロックを解除するステップとをさらに備える、請求項10に記載の変圧器保護方法。
    For each phase of the transformer, the sum of the content rates of the second harmonic, the third harmonic, and the fourth harmonic included in the difference current between the primary side and the secondary side is the third harmonic. a step of determining whether a third condition of being larger than a set value is satisfied;
    The transformer protection method according to claim 10, further comprising, if the third condition is not satisfied in a phase in which the protective relay output is locked, unlocking the protective relay output of the phase. .
  13.  前記保護リレー出力のロックを解除するステップでは、前記保護リレー出力がロックされた相において前記第2条件および前記第3条件がいずれも成立していない場合に、当該相の前記保護リレー出力のロックが解除される、請求項12に記載の変圧器保護方法。 In the step of unlocking the protective relay output, if neither the second condition nor the third condition is satisfied in the phase in which the protective relay output is locked, the protective relay output of the phase is unlocked. The transformer protection method according to claim 12, wherein the transformer protection method is released.
  14.  前記変圧器の前記相ごとに、前記一次側と前記二次側との差電流に含まれる第2高調波および第4高調波の各々の含有率の和が第3の設定値より大きいという第3条件の成立の有無を判定するステップと、
     前記保護リレー出力がロックされた相において前記第2条件および前記第3条件がいずれも成立していない場合に、当該相の前記保護リレー出力のロックを解除するステップとをさらに備える、請求項10に記載の変圧器保護方法。
    For each phase of the transformer, the sum of the respective content rates of the second harmonic and the fourth harmonic included in the difference current between the primary side and the secondary side is greater than a third set value. a step of determining whether the three conditions are satisfied;
    10. The method further comprises the step of unlocking the protective relay output of the phase when neither the second condition nor the third condition is satisfied in the phase in which the protective relay output is locked. Transformer protection methods described in .
  15.  前記第1相、前記第2相、および前記第3相のうちいずれか2相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が共に前記第1の設定値より大きいという付加的条件の成立の有無を判定するステップをさらに備え、
     前記保護リレー出力のロックを解除するステップでは、さらに前記付加的条件が成立していない場合に、ロックが解除される、請求項11~14のいずれか1項に記載の変圧器保護方法。
    The content rate of the second harmonic included in the difference current between the primary side and the secondary side of any two phases among the first phase, the second phase, and the third phase is equal to that of the first phase. further comprising the step of determining whether or not an additional condition of being larger than a set value is satisfied;
    15. The transformer protection method according to claim 11, wherein in the step of unlocking the protective relay output, the lock is released when the additional condition is not satisfied.
  16.  保護リレーを用いた変圧器保護方法であって、
     変圧器の第1相、第2相、および第3相の相ごとに、前記変圧器の一次側と二次側との差電流に含まれる基本波成分に基づいて電流差動リレー演算を行うステップと、
     前記第1相、前記第2相、および前記第3相のいずれか1相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が第1の設定値より大きいという第1条件の成立の有無を判定するステップと、
     前記第1相、前記第2相、および前記第3相のうちいずれか2相の前記一次側と前記二次側との差電流に含まれる第2高調波の含有率が共に第2の設定値より大きいという第2条件の成立の有無を判定するステップとを備え、前記第2の設定値は前記第1の設定値よりも小さく、さらに、
     前記第1条件および前記第2条件が共に成立している場合に各相の保護リレー出力をロックするステップと、
     前記第1条件が成立しなくなった場合または前記第2条件が成立しなくなった状態が第1の設定時間継続した場合に前記保護リレー出力のロックを解除するステップとを備える、変圧器保護方法。
    A method for protecting a transformer using a protective relay, the method comprising:
    Performing current differential relay calculations for each of the first, second, and third phases of the transformer based on the fundamental wave component included in the difference current between the primary and secondary sides of the transformer. step and
    The content rate of the second harmonic included in the difference current between the primary side and the secondary side of any one of the first phase, the second phase, and the third phase is lower than the first set value. a step of determining whether or not the first condition of being large is satisfied;
    The content rate of the second harmonic included in the difference current between the primary side and the secondary side of any two of the first phase, the second phase, and the third phase is set to a second setting. the second set value is smaller than the first set value, and the second set value is smaller than the first set value, and
    locking the protective relay output of each phase when both the first condition and the second condition are satisfied;
    A transformer protection method comprising the step of unlocking the protective relay output when the first condition no longer holds true or when the state where the second condition no longer holds true continues for a first set time.
  17.  前記変圧器のインラッシュ電流波形における平坦部分の長さであるデュエルタイムを計測し、前記デュエルタイムの減少量に応じて、高調波含有率と比較される各設定値を変更するステップをさらに備え、
     前記デュエルタイムは、前記変圧器の鉄心の劣化度合いに応じて減少する、請求項10~16のいずれか1項に記載の変圧器保護方法。
    The method further comprises the step of measuring a dwell time, which is the length of a flat portion in an inrush current waveform of the transformer, and changing each set value to be compared with a harmonic content rate according to the amount of decrease in the dwell time. ,
    17. The transformer protection method according to claim 10, wherein the dwell time decreases depending on the degree of deterioration of the iron core of the transformer.
  18.  前記電流差動リレー演算を行うステップは、比率差動原理により内部故障の有無を判定するステップを含む、請求項10~17のいずれか1項に記載の変圧器保護方法。 The transformer protection method according to any one of claims 10 to 17, wherein the step of performing the current differential relay calculation includes a step of determining the presence or absence of an internal failure based on a ratio differential principle.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07184317A (en) * 1993-12-24 1995-07-21 Toshiba Corp Ratio differential protective relay
WO2019043910A1 (en) * 2017-09-01 2019-03-07 三菱電機株式会社 Digital protection relay and threshold learning method of digital protection relay

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07184317A (en) * 1993-12-24 1995-07-21 Toshiba Corp Ratio differential protective relay
WO2019043910A1 (en) * 2017-09-01 2019-03-07 三菱電機株式会社 Digital protection relay and threshold learning method of digital protection relay

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