JPS59187791U - clock circuit - Google Patents

clock circuit

Info

Publication number
JPS59187791U
JPS59187791U JP8319183U JP8319183U JPS59187791U JP S59187791 U JPS59187791 U JP S59187791U JP 8319183 U JP8319183 U JP 8319183U JP 8319183 U JP8319183 U JP 8319183U JP S59187791 U JPS59187791 U JP S59187791U
Authority
JP
Japan
Prior art keywords
clock circuit
counter
count value
pulses
minute
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8319183U
Other languages
Japanese (ja)
Inventor
松本 克平
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP8319183U priority Critical patent/JPS59187791U/en
Publication of JPS59187791U publication Critical patent/JPS59187791U/en
Pending legal-status Critical Current

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  • Electric Clocks (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のこの種の時計回路の一例を示すブロック
図、第2図はこの考案の一実施例を示すブロック図であ
る。 図において1は秒カウンタ、7は分累積カウンタ、8は
日累積カウンタである。なお各図中同一符号は同一また
は相当する部分を示すものとする。
FIG. 1 is a block diagram showing an example of a conventional clock circuit of this type, and FIG. 2 is a block diagram showing an embodiment of this invention. In the figure, 1 is a second counter, 7 is a minute cumulative counter, and 8 is a daily cumulative counter. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロコンピュータに時間情報を与える時計回路で、
時間情報として原発振周波数を分周して生成した秒パル
スをカウントする60進の秒カウンタのカウント値と、
上記秒カウンタからの分パルスをカウントする60X2
4進の分累積カウンタのカウント値と、上記分累積カウ
ンタからの日パー ルスをカウントする日累積カウンタ
のカウント値を出力するように構成した時計回路。
A clock circuit that provides time information to a microcomputer.
A count value of a sexagesimal second counter that counts second pulses generated by dividing the original oscillation frequency as time information;
60X2 counting minute pulses from the seconds counter above
A clock circuit configured to output a count value of a quaternary minute accumulation counter and a count value of a daily accumulation counter that counts daily pulses from the minute accumulation counter.
JP8319183U 1983-05-31 1983-05-31 clock circuit Pending JPS59187791U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8319183U JPS59187791U (en) 1983-05-31 1983-05-31 clock circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8319183U JPS59187791U (en) 1983-05-31 1983-05-31 clock circuit

Publications (1)

Publication Number Publication Date
JPS59187791U true JPS59187791U (en) 1984-12-13

Family

ID=30213150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8319183U Pending JPS59187791U (en) 1983-05-31 1983-05-31 clock circuit

Country Status (1)

Country Link
JP (1) JPS59187791U (en)

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