JPS6110576U - random pattern generator - Google Patents

random pattern generator

Info

Publication number
JPS6110576U
JPS6110576U JP9655284U JP9655284U JPS6110576U JP S6110576 U JPS6110576 U JP S6110576U JP 9655284 U JP9655284 U JP 9655284U JP 9655284 U JP9655284 U JP 9655284U JP S6110576 U JPS6110576 U JP S6110576U
Authority
JP
Japan
Prior art keywords
pattern generator
random pattern
count value
circuit
input signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9655284U
Other languages
Japanese (ja)
Inventor
知徳 石突
利彦 村松
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Priority to JP9655284U priority Critical patent/JPS6110576U/en
Publication of JPS6110576U publication Critical patent/JPS6110576U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案による一実施例を示すブロック図である。 １：タイマ回路、４：ラッチ回路、５：加算器。 The figure is a block diagram showing one embodiment of the present invention. 1: timer circuit, 4: latch circuit, 5: adder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定クロツクパルスを計数するタイマ回路と、該タイマ
回路の計数値を保持するラッチ回路と、該ラッチ回路に
保持された計数値及び上記グイマ回路の計数値を入力信
号とし、両入力信号の演算値を出力信号として導出する
演算器とを備えてなることを特徴とするランダムパター
ン発生器、。A timer circuit that counts predetermined clock pulses, a latch circuit that holds the count value of the timer circuit, the count value held in the latch circuit, and the count value of the Guima circuit as input signals, and the calculated value of both input signals. A random pattern generator, comprising: an arithmetic unit that derives an output signal.
JP9655284U 1984-06-25 1984-06-25 random pattern generator Pending JPS6110576U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9655284U JPS6110576U (en) 1984-06-25 1984-06-25 random pattern generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9655284U JPS6110576U (en) 1984-06-25 1984-06-25 random pattern generator

Publications (1)

Publication Number Publication Date
JPS6110576U true JPS6110576U (en) 1986-01-22

Family

ID=30656059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9655284U Pending JPS6110576U (en) 1984-06-25 1984-06-25 random pattern generator

Country Status (1)

Country Link
JP (1) JPS6110576U (en)

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