JPS5918656A - 集積回路用基板の製造方法 - Google Patents
集積回路用基板の製造方法Info
- Publication number
- JPS5918656A JPS5918656A JP12722682A JP12722682A JPS5918656A JP S5918656 A JPS5918656 A JP S5918656A JP 12722682 A JP12722682 A JP 12722682A JP 12722682 A JP12722682 A JP 12722682A JP S5918656 A JPS5918656 A JP S5918656A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- nitride film
- silicon
- crystal silicon
- single crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims abstract description 16
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 10
- 150000004767 nitrides Chemical class 0.000 claims description 22
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 3
- 230000001590 oxidative effect Effects 0.000 claims description 3
- 229910000040 hydrogen fluoride Inorganic materials 0.000 claims 2
- 238000007743 anodising Methods 0.000 claims 1
- 239000013078 crystal Substances 0.000 abstract description 8
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 230000003647 oxidation Effects 0.000 abstract description 3
- 238000007254 oxidation reaction Methods 0.000 abstract description 3
- 238000005498 polishing Methods 0.000 abstract description 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 3
- 239000000377 silicon dioxide Substances 0.000 abstract description 3
- 230000007423 decrease Effects 0.000 abstract description 2
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 238000002955 isolation Methods 0.000 description 10
- 229910021426 porous silicon Inorganic materials 0.000 description 9
- 238000000926 separation method Methods 0.000 description 6
- 238000002048 anodisation reaction Methods 0.000 description 5
- 238000009413 insulation Methods 0.000 description 5
- 239000003989 dielectric material Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- -1 arsenic nitride Chemical class 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- GQPLMRYTRLFLPF-UHFFFAOYSA-N nitrous oxide Inorganic materials [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/7627—Vertical isolation by full isolation by porous oxide silicon, i.e. FIPOS techniques
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12722682A JPS5918656A (ja) | 1982-07-21 | 1982-07-21 | 集積回路用基板の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12722682A JPS5918656A (ja) | 1982-07-21 | 1982-07-21 | 集積回路用基板の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5918656A true JPS5918656A (ja) | 1984-01-31 |
| JPS6244414B2 JPS6244414B2 (enrdf_load_stackoverflow) | 1987-09-21 |
Family
ID=14954846
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12722682A Granted JPS5918656A (ja) | 1982-07-21 | 1982-07-21 | 集積回路用基板の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5918656A (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5439843A (en) * | 1992-01-31 | 1995-08-08 | Canon Kabushiki Kaisha | Method for preparing a semiconductor substrate using porous silicon |
-
1982
- 1982-07-21 JP JP12722682A patent/JPS5918656A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5439843A (en) * | 1992-01-31 | 1995-08-08 | Canon Kabushiki Kaisha | Method for preparing a semiconductor substrate using porous silicon |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6244414B2 (enrdf_load_stackoverflow) | 1987-09-21 |
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