JPS5918632A - Formation of electrode of semiconductor device - Google Patents

Abstract

PURPOSE:To remarkably facilitate micro-miniaturization of multi-layer electrodes by forming a metal silicide layer on the self-alignment basis on the specified region of Si substrate through thermal reaction between a first metal and Si, depositing selectively a second metal layer by the chemical vapor deposition method only on such layer and then providing a third metal layer which becomes the principal wirings. CONSTITUTION:A paradium layer is deposited by the vacuum deposition on the entire part of Si substrate 11 wherein elements are provided and a paradium silicide layer 13 is formed in the specified thickness at the contact part of the substrate 11 through the thermal processing in the N2 ambient. Next, non-reacted paradium is removed by etching with an etchant consisting of mixed liquid of ammonium iodide and iodine and the periphery of layer 13 is covered with an insulating film 12. Thereafter, while the substrate is being heated up to 400 deg.C, tungsten 14 is deposited on the substrate 11 under the condition that deposition pressure is 40 Pa and deposition rate is 15nm/mm., using hydrogen and tungsten hexafluoride. At this time, tungsten 14 is not deposited on the film 12 and is adhered only on the layer 13. Next, an aluminum Al electrode wiring 15 is deposited on tungsten 14.

Description

[Detailed description of the invention] (1) Field of application of the invention The present invention relates to a method for forming electrodes of semiconductor devices.

(2) Prior Art Platinum silicide and palladium silicide are used as electrodes in integrated circuits, but it is known that when these silicides are brought into direct contact with aluminum, they react with heat treatment at about 400 C, forming a complete compound. This causes the disadvantage that the electrical characteristics of the element deteriorate. To prevent this, a known technique is to sandwich an intermediate layer of tungsten, molybdenum, titanium-tungsten alloy, or the like between the silicide and aluminum. FIG. 1 shows a cross-sectional view of such an electrode structure. The electrode structure shown in FIG. 1 is formed by the following steps.

A sisoside layer 1 is formed only on the contact portion of the silicon substrate 11.
After forming 3, a metal layer such as tungsten 14 is deposited, and aluminum 15 is further deposited thereon. Then,
The photoresist is left in the area where the electrode wiring is to be formed, and the exposed aluminum layer is first removed by etching using the photoresist as a mask.

Next, the photoresist is removed, and the exposed portions of the metal layer, such as tungsten, are etched away using the remaining aluminum layer as a mask. In the electrode wiring structure manufactured by this method, side etching of the metal layer such as tungsten occurs during etching, making it difficult to miniaturize the electrode wiring. There were inconveniences such as peeling of the electrode wiring.

(3) Purpose of the Invention The present invention has been achieved by selectively growing a metal layer such as tungsten, which is the most problematic point in the electrodes of semiconductor devices, only on silicide, thereby eliminating the need for a metal layer such as tungsten, which was conventionally required. The purpose is to essentially eliminate the etching process. The present invention has many advantages, such as making it extremely easy to miniaturize the multilayer electrode and i, and at the same time improving adhesion since the contact with the silicon substrate other than the contact is made of aluminum.

(4) General description of the invention In order to achieve the above object, in the present invention, a first metal and silicon are reacted to form a metal silicide layer on a predetermined region of a silicon substrate in a self-aligned manner, Next, a second metal layer is selectively formed only on the metal silicide layer by chemical vapor deposition, and a third metal layer for forming the main wiring is formed on the second metal layer. Features.

(5) Examples Hereinafter, the present invention will be explained in detail with reference to examples. Second
Figures (a), (b), and (C) are cross-sectional views for schematically explaining the method for forming a semiconductor electrode according to the present invention.

A palladium layer of a predetermined thickness is deposited on the entire surface of the silicon substrate 11 on which the device is formed by vacuum evaporation, and then heated at 250C.
The silicon substrate 11 is heat-treated for a predetermined time in a nitrogen atmosphere.
palladium silicide layer 1 of a predetermined thickness on the contact part of
3f, the formed and unreacted palladium is removed by etching with a mixed solution of ammonium iodide and iodine (Fig. Heating temperature: 400 C% Deposition pressure: 4
Tungsten 14 is deposited on the silicon substrate 11 under the conditions of 0 Pa% deposition rate IL 15 nm/lnm. Under these conditions, tungsten is not deposited on the insulating film 12, but selectively deposits only on the palladium silicate layer 413 (FIG. 2(b)). Next, aluminum or an aluminum alloy 15 is deposited on the entire surface of the silicon substrate 11, and a stain electrode wiring is formed by photo-etching (
Figure 2 (C)).

In this embodiment, the case where tungsten is used has been described, but other metals such as molybdenum, titanium, aluminum/tal and alloys thereof can be treated in the same way. Further, as for the metal silicide, platinum silicide or nickel silicide may be used in addition to palladium silicide.

(6) Summary As explained above, according to the present invention, since electrodes can be formed in a self-aligned manner, highly reliable multilayer e-thin electrodes can be easily obtained.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing a conventional multilayer electrode formation method;
FIG. 2 is an explanatory diagram showing a method for forming a multilayer electrode according to the present invention. In the figure, 11... Silicon substrate, 12... Insulating film, 13... Palladium silicide, 14... Tank Figure 1 + 3 Figure 2

Claims (1)

[Claims] 1. A first metal and silicon are heated and reacted to form a self-aligned metal silicide layer on a predetermined region of a silicon substrate, and selectively applied only onto the metal silicide layer using a chemical vapor phase method. 1. A method for forming electrodes in a semiconductor device, comprising depositing a second metal layer and then forming a third metal layer forming a main wiring.