RU1389603C - Method of manufacturing metallization of integral circuits - Google Patents

Abstract

The invention relates to electronic equipment, to methods for creating interconnects of large and ultra-large integrated circuits. The purpose of the invention is to increase the reliability and speed of integrated circuits. According to the invention, layers of titanium and molybdenum are sequentially deposited on a silicon substrate with formed MOS transistors. A layer of silicon is then sprayed. Heat treatment is carried out in a nitrogen atmosphere to form titanium silicide. The silicon and molybdenum layers are then removed by plasma chemical etching. The titanium layer unreacted during the first heat treatment is removed. A second layer of silicon is applied. A second heat treatment is carried out. After which the second silicon layer is removed,

Description

The invention relates to electronic equipment and can be used to create interconnects of large and extra large integrated circuits.

The purpose of the invention is to increase the reliability of the performance of integrated circuits.

Example, On a silicon substrate with formed MOS transistors with polysilicon gates, a titanium layer 1000 A thick and a 500 M thick molybdenum layer are successively cooled by electron beam spraying in a vacuum at a pressure of 10 ® Pa. The titanium sputtering rate is 15 A / s. The substrate temperature during spraying is 523 K.

Then, a silicon layer 1000 A thick was sprayed on a two-layer titanium-molybdenum film by electron beam spraying in a vacuum. The silicon deposition rate was 10 A / s.

Heat treatment is carried out at a temperature of 833 K for 1 h in a reduced pressure reactor at a pressure of 66 Pa in a nitrogen medium. In this case, a mixture of titanium monosilicide and titanium disilicide is formed in the areas of monosilicon and polycrystalline silicon, but no silicides are formed in the areas of silicon dioxide.

The etching of silicon and molybdenum layers was carried out in the plasma of fluorine-containing CF compounds for 4 minutes, while the unreacted titanium layer was not etched.

Further, a titanium layer that has not reacted during the heat treatment is grass. The etching is carried out in a Caro mixture (hot sulfuric acid with hydrogen peroxide, the ratio of H2SO-q: H202 is 7: 3, the temperature is 433 K) for 1 min. The silicide layer is not etched. Its resistance is 6 ohms /

Then, a layer of polycrystalline silicon with a thickness of 1000 A was deposited at a temperature of 893 K in a reduced pressure reactor. Heat treatment to homogenize, phase phase composition and reduce the resistance

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N / s of silicide is carried out at a temperature of 1073 K for 10 minutes in a reduced pressure reactor at a pressure of 66 Pa in a Ni medium.

After heat treatment, plasmochemical etching of the polycrystalline silicon layer in the plasma of fluorine-containing CF compounds is carried out for 2 minutes selectively with respect to the titanium disilicide layer.

The surface resistance of the disilicide layer at the sites of monosilicon and polysilicon is 1.0 Ohm / p;

Claims (1)

The claims A method of creating metallization of integrated circuits, including sequential deposition of titanium layers on a substrate and 0 5 molybdenum, the first heat treatment in a nitrogen environment with the formation of titanium silicide, the removal of a molybdenum layer and titanium unreacted with silicon and the second heat treatment at a temperature higher than the temperature of the first heat treatment, characterized in that, in order to increase the reliability and speed of integrated circuits, after applying the layer the first layer of silicon is deposited on it, after the first heat treatment, the first layer of silicon is removed together with the layer of molybdenum, and after removing the layer of unreacted titanium on the layer of silicide a second layer of silicon is deposited, which is removed after the second heat treatment.