JPS59185093A - 超電導シフトレジスタ回路 - Google Patents

超電導シフトレジスタ回路

Info

Publication number
JPS59185093A
JPS59185093A JP58057919A JP5791983A JPS59185093A JP S59185093 A JPS59185093 A JP S59185093A JP 58057919 A JP58057919 A JP 58057919A JP 5791983 A JP5791983 A JP 5791983A JP S59185093 A JPS59185093 A JP S59185093A
Authority
JP
Japan
Prior art keywords
circuit
flop
flip
shift register
master
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58057919A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0310199B2 (enrdf_load_stackoverflow
Inventor
Yutaka Harada
豊 原田
Yuji Hatano
雄治 波多野
Kunio Yamashita
山下　邦男
Nobuo Kodera
小寺　信夫
Ushio Kawabe
川辺　潮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58057919A priority Critical patent/JPS59185093A/ja
Publication of JPS59185093A publication Critical patent/JPS59185093A/ja
Publication of JPH0310199B2 publication Critical patent/JPH0310199B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/32—Digital stores in which the information is moved stepwise, e.g. shift registers using super-conductive elements

Landscapes

  • Shift Register Type Memory (AREA)
JP58057919A 1983-04-04 1983-04-04 超電導シフトレジスタ回路 Granted JPS59185093A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58057919A JPS59185093A (ja) 1983-04-04 1983-04-04 超電導シフトレジスタ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58057919A JPS59185093A (ja) 1983-04-04 1983-04-04 超電導シフトレジスタ回路

Publications (2)

Publication Number Publication Date
JPS59185093A true JPS59185093A (ja) 1984-10-20
JPH0310199B2 JPH0310199B2 (enrdf_load_stackoverflow) 1991-02-13

Family

ID=13069402

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58057919A Granted JPS59185093A (ja) 1983-04-04 1983-04-04 超電導シフトレジスタ回路

Country Status (1)

Country Link
JP (1) JPS59185093A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9543959B1 (en) 2015-10-21 2017-01-10 Microsoft Technology Licensing, Llc Phase-mode based superconducting logic
US10572582B2 (en) 2006-11-06 2020-02-25 Microsoft Technology Licensing, Llc Clipboard augmentation with references

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10572582B2 (en) 2006-11-06 2020-02-25 Microsoft Technology Licensing, Llc Clipboard augmentation with references
US9543959B1 (en) 2015-10-21 2017-01-10 Microsoft Technology Licensing, Llc Phase-mode based superconducting logic
US9887700B2 (en) 2015-10-21 2018-02-06 Microsoft Technology Licensing, Llc Phase-mode based superconducting logic

Also Published As

Publication number Publication date
JPH0310199B2 (enrdf_load_stackoverflow) 1991-02-13

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