JPS59182660A - Carrier regenerating circuit - Google Patents

Carrier regenerating circuit

Info

Publication number
JPS59182660A
JPS59182660A JP58056613A JP5661383A JPS59182660A JP S59182660 A JPS59182660 A JP S59182660A JP 58056613 A JP58056613 A JP 58056613A JP 5661383 A JP5661383 A JP 5661383A JP S59182660 A JPS59182660 A JP S59182660A
Authority
JP
Japan
Prior art keywords
signal
carrier wave
circuit
carrier
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58056613A
Other languages
Japanese (ja)
Other versions
JPH0612902B2 (en
Inventor
Tokihiro Mishiro
御代 時博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58056613A priority Critical patent/JPH0612902B2/en
Publication of JPS59182660A publication Critical patent/JPS59182660A/en
Publication of JPH0612902B2 publication Critical patent/JPH0612902B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2275Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals
    • H04L27/2276Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals using frequency multiplication or harmonic tracking

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To attain carrier regeneration with high speed synchronism and low noise by holding a switching means to ON-state when the nonmodulating part of a received burst signal is detected to input an output signal to a carrier regenerating circuit. CONSTITUTION:When a burst receiving signal is inputted and a synchronizing pattern CR of the carrier regenerating circuit of the head part of the receiving signal is inputted, a nonmodulating part detecting signal is outputted from a nonmodulating part detector 8, an AND gate 9 is turned off to control the switching device 1 to the ON-state. A large input power is inputted to the carrier regenerating circuit 2 in this case, it is transmitted to a tracking type filter 4 and the circuit 2 attains tracking synchronism in high speed. When the clock regenerating circuit synchronism pattern STR next to the pattern CR is transmitted, zero is outputted from the detector 8, the gate 9 is turned on, the switching device 1 is on/off-controlled, and the part arranged with the phase and amplitude near the convergence only is cut out and the result is inputted to the circuit 2. Thus, the carrier regenerating signal with improved C/N ratio is outputted and the high speed synchronism and excellent C/N ratio output which are contrary conditions to each other are performed at the same time.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は衛星通信等に使用されているPSK−TDMA
(Pんapt  5hift  Keyinty −T
ime  DivisionMu、1.tiplt A
cctss )通信方式の受信装置に用いられている基
準搬送波の再生回路に係夛、特に高速同期と低雑音とい
う相反する条件を同時に満足するようにした搬送波再生
回路に関するものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to PSK-TDMA used in satellite communications, etc.
(Papt 5hift Keyinty-T
ime DivisionMu, 1. tiplt A
The present invention relates to a reference carrier regeneration circuit used in a communication system receiving device, and particularly relates to a carrier regeneration circuit that simultaneously satisfies contradictory conditions of high-speed synchronization and low noise.

〔従来技術と問題点〕[Conventional technology and problems]

PSK−TDMA通信方式の受信装置において低雑音の
基準搬送波を再生する手段として、従来第1図に示す如
き構成の、いわゆるサンプリング法という再生クロック
信号によシ受信信号を開閉して受信信号位相の不揃の部
分を切bib雑音を減する方式が提案されている。
Conventionally, as a means for regenerating a low-noise reference carrier wave in a PSK-TDMA communication system receiving device, the received signal is opened and closed by a regenerated clock signal using the so-called sampling method, which has the configuration shown in FIG. A method has been proposed to reduce bib noise by cutting off the irregular portions.

次に第1図に概略について説明する。Next, the outline will be explained with reference to FIG.

PSK変調方式では搬送波の位相をディジタル情報に応
じて切換えて伝送し、受信側では基準搬送波の位相とこ
の受信信号の位相を比較してディジタル情報を復調する
。このとき伝送路の制約から帯域制限を行う必要があり
このため変調波の位相、振幅をも歪みを受け、バースト
状の受信信号のうち、第2図(へ)のアイパターンに示
す如く。
In the PSK modulation method, the phase of a carrier wave is switched according to digital information for transmission, and on the receiving side, the phase of the reference carrier wave and the phase of this received signal are compared to demodulate the digital information. At this time, it is necessary to limit the band due to constraints on the transmission path, and therefore the phase and amplitude of the modulated wave are also distorted, as shown in the eye pattern of FIG.

Tl、 TR、Ts・・・の収束点として示される点、
つまシlシンボル中の1点のみが確定位相、振幅をもつ
。しかしその中間部は位相変動が多く、このような部分
を再生してもジッターが存在する。したがって、第2図
(ロ)に示す如く、このアイパターンの収束点Tx 、
 TR・・・附近のみをクロックで抽出して、第2図0
うに示す如き信号を取シ出し、これで搬送波を再生すれ
ばジッター成分のない基準搬送波を得ることができる。
Points indicated as convergence points of Tl, TR, Ts...
Only one point in each symbol has a definite phase and amplitude. However, there are many phase fluctuations in the middle part, and even if such a part is reproduced, jitter still exists. Therefore, as shown in FIG. 2 (b), the convergence point Tx of this eye pattern is
TR...Extract only the surrounding area using the clock, and
By extracting a signal like the one shown above and reproducing the carrier wave using this signal, it is possible to obtain a reference carrier wave without jitter components.

そのため、第1図に示す如く、クロック再生回路6の出
力パルスを位相器7で位相させて開閉器1をオン・オフ
制御して第2図(()〜?うに示す如く収束点Tx 、
 TR・・・の近傍のみの信号を抽出し、これを搬送波
再生回路2によシ基準搬送波を再生している。
Therefore, as shown in FIG. 1, the output pulse of the clock regeneration circuit 6 is phased by the phase shifter 7 to control the on/off of the switch 1, and the convergence point Tx, as shown in FIG.
A signal only in the vicinity of TR is extracted and sent to a carrier wave reproducing circuit 2 to reproduce a reference carrier wave.

この搬送波再生回路2は逓倍器3.追尾形P波器41分
周器5等によシ構成されている。そしてル相PSK変調
方式の場合には、逓倍器3または分周器5はそれぞれル
倍で逓倍し、またはl/ルで分周することになる。また
入力周波数等が変動したときその出力周波数の位相が変
動しないように。
This carrier wave regeneration circuit 2 includes a multiplier 3. It is composed of a tracking type P-wave device 41, a frequency divider 5, and the like. In the case of the phase PSK modulation method, the multiplier 3 or the frequency divider 5 will respectively multiply the signal by a factor of 1 or divide the frequency by a factor of 1. Also, when the input frequency etc. fluctuates, the phase of the output frequency does not fluctuate.

フィルタの中心周波数がこの変動に追従する追尾形声波
器4を使用し、再生搬送波の位相変動を抑制して信号対
雑音比(C/N)を改善したのち。
After using a tracking type voice wave generator 4 whose filter center frequency follows this variation, the phase variation of the reproduced carrier wave is suppressed and the signal-to-noise ratio (C/N) is improved.

さきに逓倍器3でル倍された信号を分周器5でル分周し
てもとの周波数に戻し、基準搬送波を得るものである。
The signal that has been multiplied by the multiplier 3 is then frequency-divided by the frequency divider 5 to return it to its original frequency, thereby obtaining a reference carrier wave.

ところで搬送波の再生手段から得られるものは。By the way, what can be obtained from carrier wave regeneration means?

バースト状に受信される変調波に対して高速に追尾同期
し、かつ出力される基準搬送波は雑音の少ないものでな
ければならない。す々わち、受信信号のフォーマットは
、第3図に示す如く、搬送波再生回路同期パターン(無
変調)CRと、クロック再生回路同期パターン(例えば
「1010・・・・・・4のような180度位相)ST
R,発信元や受信先のアドレス等の局識別信号や位相不
確定除去用の信号で構成されるユニークワードUW、デ
ータDATD  等により構成されている。そしてユニ
ークワードの局識別を正確に行うためにこの部分までに
同期が確立していなければならないが、搬送波再生回路
同期パターンCRとクロック再生回路同期パターンST
Rはシステムによ)固定した長さであり、これを長くす
ることはできず、したがってバースト状に受信される変
調波に対して高速度に追尾同期し、しかもC/Nの高い
搬送波再生回路が必要となる。
The reference carrier wave that is output must have low noise and can be tracked and synchronized at high speed with respect to modulated waves received in bursts. In other words, the format of the received signal is as shown in FIG. degree phase) ST
R, a unique word UW consisting of a station identification signal such as a source address and a destination address, and a signal for removing phase uncertainty, and data DATD. In order to accurately identify the station of the unique word, synchronization must be established by this part, but the carrier wave regeneration circuit synchronization pattern CR and the clock regeneration circuit synchronization pattern ST
R is a fixed length (depending on the system) and cannot be made longer. Therefore, a carrier regeneration circuit that can track and synchronize at high speed with respect to modulated waves received in bursts and has a high C/N. Is required.

ところが同期速度とC/’Nを決定するのは追尾形ろ波
器4であるが、これらは次のように相反する条件である
。すなわち高速同期のためには帯域幅を広くして追尾形
P波器4に大きな入力を付与することが必要になるが、
これは第2図(ロ)におけるパルス幅を広くして開閉器
lのオン状態を長くすることになシ2位相変動の大きな
成分が入力されることにがり、その結果C/Nは悪くな
る。逆にC/Nをよくして低C/Nを実現するためには
この帯域幅を狭くすることが必要となる。
However, it is the tracking filter 4 that determines the synchronous speed and C/'N, but these are contradictory conditions as follows. In other words, in order to achieve high-speed synchronization, it is necessary to widen the bandwidth and provide a large input to the tracking type P-wave device 4.
This is because the pulse width in FIG. 2(b) is widened to lengthen the ON state of the switch 1, and a large component of phase fluctuation is inputted, resulting in a poor C/N ratio. Conversely, in order to improve the C/N and achieve a low C/N, it is necessary to narrow this bandwidth.

これらの相反する条件に対し、第1図におけるクロック
サンプリング法では、上記の如く、第2図(ロ)に示す
再生クロックによシ受信信号の符号の変換点つまり収束
点Tl 、 Ta・・・付近の信号を切り取シ2位相、
振幅の揃った部分のみを追尾形F波a4に入力してC/
Nを改善している。
In response to these conflicting conditions, in the clock sampling method shown in FIG. 1, as described above, the regenerated clock shown in FIG. Cut out the nearby signal, 2-phase,
Input only the part with the same amplitude to the tracking type F wave a4 and
N is improved.

ところでこのような従来のもので問題になるのは、搬送
波再生回路の同期のための、第3図に示すバーストの先
頭である無変調の搬送波再生回路同期パターンCR部分
までが開閉器1によυオン・オフ制御されるので、この
部分の受信エネルギーが著るしく低下して高速同期がそ
こなわれることがある。
By the way, the problem with such a conventional system is that the unmodulated carrier wave regeneration circuit synchronization pattern CR part, which is the beginning of the burst shown in FIG. Since υ is controlled on/off, the received energy in this part may drop significantly and high-speed synchronization may be impaired.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、このような問題点を改善するために、
PSK−’rDMA  通信方式の受信装置において高
速同期及び高C/Hの要求を同時に満すことのできる搬
送波再生回路を提供することである。
The purpose of the present invention is to improve such problems,
It is an object of the present invention to provide a carrier wave recovery circuit that can simultaneously satisfy the requirements of high-speed synchronization and high C/H in a PSK-'rDMA communication system receiving device.

〔発明の構成〕[Structure of the invention]

この目的を達成するために1本発明の搬送波再生回路で
は、クロック再生手段と移相手段と開閉手段を備えクロ
ック再生手段よシ得られたクロックに応じて開閉手段を
制御し、開閉手段の出力信号を追尾形P波手段を有する
搬送波再生手段に伝達して=Mf送波を再生するように
した搬送波再生回路において、受信バースト信号の無変
調部を検出する無変調部検出手段を設け、この無変調部
検出手段によp上記無変調部を検出するとき上記開閉手
段をオン状態に保つように制御して該開閉手段の出力信
号を搬送波再生回路に入力するように構成したことを特
徴とする。
In order to achieve this object, the carrier wave regeneration circuit of the present invention includes a clock regeneration means, a phase shift means, and an opening/closing means, and controls the opening/closing means according to the clock obtained by the clock reproducing means, and outputs the output of the opening/closing means. In a carrier wave regeneration circuit configured to transmit a signal to a carrier wave regeneration means having a tracking type P wave means to regenerate an =Mf transmission wave, a non-modulation portion detection means for detecting a non-modulation portion of a received burst signal is provided. When the non-modulated portion detection means detects the non-modulated portion, the switching means is controlled to be kept in an on state, and the output signal of the switching means is input to the carrier wave regeneration circuit. do.

〔発明の実施例〕[Embodiments of the invention]

本発明の一実施例を第4図〜第6図にもとづき説明する
An embodiment of the present invention will be described based on FIGS. 4 to 6.

第4図は本発明の一実施例構成図、第5図はその動作説
明図、第6図は無変調部検出器の一例及びその動作説明
図である。
FIG. 4 is a block diagram of an embodiment of the present invention, FIG. 5 is an explanatory diagram of its operation, and FIG. 6 is an example of a non-modulated portion detector and an explanatory diagram of its operation.

図中、他と同符号部は同一部分を示し、8は無変調部検
出器、9はアンド・ゲート、10は帯域p波器、11は
包絡線検波器、12は電圧比較器である。
In the figure, parts with the same symbols as the others indicate the same parts, 8 is a non-modulated part detector, 9 is an AND gate, 10 is a band p wave detector, 11 is an envelope detector, and 12 is a voltage comparator.

無変調部検出器8(は、第6図(イ)に示すフォーマッ
トの受信信号の先頭にある無変調の搬送波再生回路同期
パターンCRを検出するものでちって。
The non-modulated part detector 8 detects the non-modulated carrier regeneration circuit synchronization pattern CR at the beginning of the received signal in the format shown in FIG. 6(a).

第6図(イ)に示す如く、帯域シ波器10.包絡線検波
器11.電圧比較器12等によシ構成される。
As shown in FIG. 6(a), the band shifter 10. Envelope detector 11. It is composed of a voltage comparator 12 and the like.

したがって、第6図(ロ)に示す如く、上記搬送波再生
回路同期/ぐターンCRが入力されたとき、帯域済波器
lOで搬送波周波数f、  を通過させるので。
Therefore, as shown in FIG. 6(b), when the carrier wave regeneration circuit synchronization/g turn CR is input, the carrier wave frequency f is passed through the bandpass filter IO.

これを包絡線検波器11によシ第6図(ハ)に示す如く
、包絡線検波出力が生ずる。この包絡線検波出力を、電
圧比較612によシ閾値THと比較してこの閾値THを
超えたとき第6図に)に示す如く無変調部検出信号が出
力され、これがアンド・ゲート9の否定端子に入力され
る。したがって無変調部検出器8から無変調部検出信号
が出力されるとき、アンド・ゲート9はオフとなる。な
お、搬送波は変調されているときその搬送周波数f、 
 のパワーは弱くなりパワーは他の成分に払散されるの
で、包絡線検波器11の出力は、上記無変調の搬送波再
生回路同期パターンCR部分のみ犬となり。
When this is detected by the envelope detector 11, an envelope detection output is generated as shown in FIG. 6(c). This envelope detection output is compared with a threshold value TH by a voltage comparison 612, and when this threshold value TH is exceeded, a non-modulated part detection signal is output as shown in FIG. input to the terminal. Therefore, when the non-modulated part detection signal is output from the non-modulated part detector 8, the AND gate 9 is turned off. Note that when the carrier wave is modulated, its carrier frequency f,
The power becomes weaker and the power is dissipated into other components, so the output of the envelope detector 11 only corresponds to the non-modulated carrier regeneration circuit synchronization pattern CR portion.

クロック再生回路同期パターンSTR以後の各信号につ
いては、閾値THよシ小さな出力を送出することになる
For each signal after the clock regeneration circuit synchronization pattern STR, an output smaller than the threshold value TH is sent out.

したがって、第4図に示す本発明の一実施構成では、バ
ースト状の受信信号が入力されたとき。
Therefore, in one embodiment of the present invention shown in FIG. 4, when a burst reception signal is input.

その先頭部分の搬送波再生回路同期パターンCRが入力
されたとき無変調部検出器8から、第5図(ロ)及び第
6図に)の如き無変調部検出信号が出力されるので、ア
ンド・ゲート9はオフとなシ、開閉器1をオン状態に制
御する。それ故、このとき搬送波再生回路2には大きな
入力パワーが入力され。
When the carrier wave regeneration circuit synchronization pattern CR at the beginning part is input, the non-modulation part detector 8 outputs the non-modulation part detection signal as shown in FIGS. 5(b) and 6). The gate 9 is turned off and the switch 1 is turned on. Therefore, at this time, a large input power is input to the carrier wave regeneration circuit 2.

追尾形戸波器4にはこの大入力パワーが伝達され。This large input power is transmitted to the tracking type door wave device 4.

したがってこの搬送波再生回路2は高速に追尾同期する
ことになる。そして搬送波再生回路同期パターンCRの
次のクロック再生回路同期パターンSTRが伝達される
とき、上記無変調部検出器8から零が出力され、アンド
・ゲート9はオン状態とな9.今度は第5図ぐ)に示す
如き、クロック再生回路6からの再生クロックが位相器
7及びアンド・ゲート9を経由して開閉器1に印加され
、これによ!ll開閉器1はオン・オフ制御される。そ
して第1図の従来の場合と同様に、第2図に示す如く、
収束点付近の1位相、振幅等の揃った部分のみを切り取
ってこれを搬送波再生回路2に入力する。したがって今
度はC/Nの改善された搬送波再生信号を出力するとと
になる。このようにして高速同期と良好なC/N出力と
いう問題を解決することができる。
Therefore, this carrier wave regeneration circuit 2 achieves tracking synchronization at high speed. When the next clock regeneration circuit synchronization pattern STR after the carrier wave regeneration circuit synchronization pattern CR is transmitted, zero is output from the non-modulation section detector 8, and the AND gate 9 is turned on.9. This time, as shown in Figure 5), the recovered clock from the clock recovery circuit 6 is applied to the switch 1 via the phase shifter 7 and the AND gate 9, thereby! The switch 1 is controlled to be turned on and off. As in the conventional case shown in Fig. 1, as shown in Fig. 2,
Only a portion near the convergence point where the phase, amplitude, etc. are uniform is cut out and inputted to the carrier wave regeneration circuit 2. Therefore, if a carrier wave reproduction signal with an improved C/N ratio is outputted this time, the result will be as follows. In this way, the problem of high speed synchronization and good C/N output can be solved.

勿論、開閉61は受信信号のないときノイズによるパル
ス出力によυオン・オフIIJ御されることになる。し
たがって、クロック再生回路を例えば電圧制御発振器V
COを使用して構成するときこのvCOの制御信号は雑
音パワーに比例して犬きくなシ、大きく周波数変動する
ことになる。しかし無信号状態のとき開閉器lをオン・
オフして雑音パワーを抑制できるので、VCOの周波数
変動を小さく抑制することもできる。
Of course, when there is no received signal, the opening/closing 61 is controlled on/off by pulse output due to noise. Therefore, the clock regeneration circuit is, for example, a voltage controlled oscillator V
When configured using a CO, the control signal of this vCO will vary greatly in frequency in proportion to the noise power. However, when there is no signal, switch l is turned on.
Since the noise power can be suppressed by turning it off, the frequency fluctuation of the VCO can also be suppressed to a small level.

なお上記説明では1本発明を逓倍分周形の搬送波再生回
路を使用した例について説明したが、勿論本発明の適用
はこれのみに限定されるものではなく、逆変調、再変調
、コスタス形等の上膜送波再生回路を使用しても同様な
効果を得ることができる。
In the above explanation, the present invention has been explained with reference to an example in which a frequency-multiplying type carrier wave regeneration circuit is used, but of course, the application of the present invention is not limited to this only, and can be applied to inverse modulation, remodulation, Costas type, etc. A similar effect can be obtained by using the above-mentioned membrane transmission regeneration circuit.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、高速同期及び低雑音の搬送波再生とい
う相反する問題を、非常に簡単な構成によシ解決するこ
とができる。
According to the present invention, the contradictory problems of high-speed synchronization and low-noise carrier wave regeneration can be solved with a very simple configuration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はクロックサンプル法による従来の搬送波再生回
路、第2図はその動作回路、第3図は信号フォーマット
、第4図は本発明の一実施例構成図、第5図はその動作
説明図、第6図は無変調部検出器の一例及びその動作説
明図である。 図中、1は開閉器、2は搬送波再生口4.3は逓倍器、
4は追尾形p波器、5は分周器、6はクロック再生回路
、7は位相器、8は無変調部検出器、9はアンド・ゲー
ト、10は帯域戸波器。 11は包絡線検波器、12は電圧比較器である。 特許出願人 富士通株式会社 代理人弁理士    山 谷 晧 榮 QX) H酔(ト侃H す5I¥1 (ハン にン
Fig. 1 shows a conventional carrier wave recovery circuit using the clock sampling method, Fig. 2 shows its operation circuit, Fig. 3 shows its signal format, Fig. 4 shows the configuration of an embodiment of the present invention, and Fig. 5 shows its operation explanation. , FIG. 6 is an example of a non-modulated portion detector and an explanatory diagram of its operation. In the figure, 1 is a switch, 2 is a carrier wave regeneration port 4.3 is a multiplier,
4 is a tracking type p-wave device, 5 is a frequency divider, 6 is a clock recovery circuit, 7 is a phase shifter, 8 is a non-modulation part detector, 9 is an AND gate, and 10 is a bandpass filter. 11 is an envelope detector, and 12 is a voltage comparator. Patent Applicant: Fujitsu Limited Representative Patent Attorney Akira Yamatani, Sakae QX)

Claims (1)

【特許請求の範囲】 クロック再生手段と移相手段と開閉手段を備えクロック
再生手段よシ得られたクロックに応じて開閉手段を制御
し、開閉手段の出力信号を追尾形F波手段を有する搬送
波再生手段に伝達して搬送波を再生するようにした搬送
波再生回路において。 受信バースト信号の無変調部を検出する無変調部検出手
段を設け、この無変調部検出手段によシ上記無変調部を
検出するとき上記開閉手段をオン状態に保つように制御
して該開閉手段の出力信号を搬送波再生回路に入力する
ように構成したことを特徴とする搬送波再生回路。
[Claims] The switching means is provided with a clock reproducing means, a phase shifting means, and an opening/closing means, and the opening/closing means is controlled according to the clock obtained by the clock reproducing means, and the output signal of the opening/closing means is a carrier wave having a tracking type F-wave means. In a carrier wave reproducing circuit configured to transmit a carrier wave to a reproducing means and reproduce the carrier wave. A non-modulated part detecting means for detecting a non-modulated part of the received burst signal is provided, and when the non-modulated part detecting means detects the non-modulated part, the opening/closing means is controlled to be kept in an on state, and the opening/closing means is controlled to be kept in an on state. A carrier wave regeneration circuit characterized in that the output signal of the means is input to the carrier wave regeneration circuit.
JP58056613A 1983-03-31 1983-03-31 Carrier wave regeneration circuit Expired - Lifetime JPH0612902B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58056613A JPH0612902B2 (en) 1983-03-31 1983-03-31 Carrier wave regeneration circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58056613A JPH0612902B2 (en) 1983-03-31 1983-03-31 Carrier wave regeneration circuit

Publications (2)

Publication Number Publication Date
JPS59182660A true JPS59182660A (en) 1984-10-17
JPH0612902B2 JPH0612902B2 (en) 1994-02-16

Family

ID=13032100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58056613A Expired - Lifetime JPH0612902B2 (en) 1983-03-31 1983-03-31 Carrier wave regeneration circuit

Country Status (1)

Country Link
JP (1) JPH0612902B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003045027A1 (en) * 2001-11-20 2003-05-30 Sanyo Electric Co., Ltd. Radio reception apparatus, signal processing timing control method, and signal processing timing control program

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50115966A (en) * 1974-02-23 1975-09-10

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50115966A (en) * 1974-02-23 1975-09-10

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003045027A1 (en) * 2001-11-20 2003-05-30 Sanyo Electric Co., Ltd. Radio reception apparatus, signal processing timing control method, and signal processing timing control program
US7068988B2 (en) 2001-11-20 2006-06-27 Sanyo Electric Co., Ltd. Radio reception apparatus, signal processing timing control method, and signal processing timing control program

Also Published As

Publication number Publication date
JPH0612902B2 (en) 1994-02-16

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