JPH05122260A - Identification reproducing device - Google Patents

Identification reproducing device

Info

Publication number
JPH05122260A
JPH05122260A JP30840391A JP30840391A JPH05122260A JP H05122260 A JPH05122260 A JP H05122260A JP 30840391 A JP30840391 A JP 30840391A JP 30840391 A JP30840391 A JP 30840391A JP H05122260 A JPH05122260 A JP H05122260A
Authority
JP
Japan
Prior art keywords
detection output
output
identification
sampling
detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30840391A
Other languages
Japanese (ja)
Inventor
Fumito Tomaru
史人 都丸
Masaaki Ota
正明 太田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP30840391A priority Critical patent/JPH05122260A/en
Publication of JPH05122260A publication Critical patent/JPH05122260A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide the identification reproducing device for a GMSK demodulator adopting the orthogonal synchronization detection system in which deterioration in the amplitude of an eye pattern of a reproduction output is less and the Viterbi decoding soft discrimination system is applicable as the error correction system. CONSTITUTION:This device is provided with means 4, 5 sampling an in-phase detection output and an orthogonal detection output in each identification timing, means 7, 8 delaying a detection output after sampling by one time slot, means 9, 10 multiplying the detection signal after one time slot delay and the other detection signal before the delay respectively, and a changeover means 12 outputting alternately the two multiplier output signals synchronously with a data rate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は,GMSK変調方式を用
いた無線通信装置の復調器における識別再生回路の改良
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a discriminating and reproducing circuit in a demodulator of a wireless communication device using a GMSK modulation system.

【0002】[0002]

【従来の技術】図2に直交同期検波方式のGMSK復調
器におけるコスタスループを用いた従来の識別再生装置
の第一の例を,図3に差分処理を用いた従来の識別再生
装置の第二の例を示す。以下,図2及び図3を用いて従
来例について説明する。
2. Description of the Related Art FIG. 2 shows a first example of a conventional identification / reproduction apparatus using a Costas loop in a GMSK demodulator of a quadrature synchronous detection system, and FIG. 3 shows a second example of a conventional identification / reproduction apparatus using difference processing. For example: Hereinafter, a conventional example will be described with reference to FIGS.

【0003】図3において,変調波入力端子1より入力
されたGMSK変調波を直交同期検波器2を介すること
により,同相検波出力υI及び直交検波出力υQを得る。
GMSKの直交同期検波方式では得られたυI,υQに差
分処理を施さなければ,正しい符号列は再生できない。
In FIG. 3, the in-phase detection output υ I and the quadrature detection output υ Q are obtained by passing the GMSK modulated wave input from the modulated wave input terminal 1 through the quadrature synchronous detector 2.
In the orthogonal synchronous detection method of GMSK, a correct code string cannot be reproduced unless the difference processing is performed on υ I and υ Q obtained.

【0004】図3に示す従来装置では,上記検波出力υ
I,υQについてアナログ的に乗算器9,10および減算
器19により差分処理を行っている。しかし,GMSK
変調方式では,送信側の帯域制限フィルタの影響によ
り,データ極性の変化点における位相変化が緩やかにな
るため,これに起因して発生する受信側の復調信号の歪
みが図3の従来装置においては,上述のアナログ的な差
分処理で倍化され,符号列のパターンによっては復号後
のアイパターンの振幅が極端に劣化してしまう問題を生
ずる。図3の識別再生装置による再生出力のアイパター
ン波形図を図4に示す。
In the conventional device shown in FIG. 3, the detection output υ
The difference processing is performed for I and υ Q in an analog manner by the multipliers 9 and 10 and the subtractor 19. However, GMSK
In the modulation method, the phase change at the change point of the data polarity becomes gradual due to the influence of the band limiting filter on the transmission side. Therefore, the distortion of the demodulated signal on the reception side caused by this change is However, there is a problem that the amplitude of the decoded eye pattern is extremely deteriorated depending on the pattern of the code string that is doubled by the above-mentioned analog difference processing. FIG. 4 shows an eye pattern waveform diagram of reproduction output by the identification reproducing apparatus of FIG.

【0005】一方,差分処理前の同相検波出力υI及び
直交検波出力υQは,図5に示す様に図4に比べ十分ア
イが開いている。そこで,図2に示す他の従来例では,
アイの開きが大きい同相検波出力υI,直交検波出力υQ
を二値判定器15,16で,しきい値電圧υthを基準と
して二値判定を行い,さらに,EX.ORゲート17及
びEX.ORゲート18を介して,ロジック的に差分処
理を行うことにより,アイの劣化のない状態で符号列の
再生を行うものである。
On the other hand, the in-phase detection output υ I and the quadrature detection output υ Q before the differential processing have a sufficiently open eye as compared with FIG. 4 as shown in FIG. Therefore, in another conventional example shown in FIG.
In-phase detection output υ I and quadrature detection output υ Q with large eye opening
Is judged by the binary judgment devices 15 and 16 with reference to the threshold voltage υ th . OR gate 17 and EX. The difference processing is logically performed via the OR gate 18 to reproduce the code string without deterioration of the eye.

【0006】[0006]

【発明が解決しようとする課題】前述した従来技術のう
ち図3に示す回路では,差分処理としてアナログ的に乗
算処理後に減算処理を行うため,アイパターンの振幅劣
化が生ずる。また,図2に示す回路では差分処理は乗算
処理(EX.OR)のみで構成されているが,正しい符
号列を再生する以前に二値判定器によりデータを二値化
してしまうため,復号された符号列のアイパターンにお
ける振幅値のアナログ量が重要な情報となるビタビ復号
軟判定方式が適応できないという欠点がある。
In the circuit shown in FIG. 3 among the above-mentioned prior arts, since the subtraction processing is performed after the analog multiplication processing as the difference processing, the amplitude deterioration of the eye pattern occurs. Further, in the circuit shown in FIG. 2, the difference processing is constituted only by the multiplication processing (EX.OR), but since the data is binarized by the binary discriminator before the correct code string is reproduced, it is decoded. There is a drawback in that the Viterbi decoding soft decision method, in which the analog amount of the amplitude value in the eye pattern of the code string becomes important information, cannot be applied.

【0007】本発明は,これらの欠点を除去するために
なされたもので,誤り訂正方式としてビタビ復合軟判定
方式が適応可能で,かつ差分処理後の再生符号列のアイ
パターンの振幅劣化が少ない識別再生装置を提供するこ
とを目的とする。
The present invention has been made in order to eliminate these drawbacks, the Viterbi reconstruction soft decision method can be applied as an error correction method, and the amplitude deterioration of the eye pattern of the reproduced code string after the difference processing is small. An object is to provide an identification reproducing apparatus.

【0008】[0008]

【課題を解決するための手段】本発明は,上記の目的を
達成するために,識別再生装置において同相検波出力υ
Iと直交検波出力υQを各々の識別タイミングでサンプリ
ングした後,一方の検波出力に対し,他方の一タイムス
ロット前の検波出力を乗じ,各々の出力をデータレート
に同期したスイッチで交互に出力するようにしたもので
ある。
In order to achieve the above object, the present invention provides an in-phase detection output υ in an identification / reproduction device.
After sampling I and quadrature detection output υ Q at each identification timing, one detection output is multiplied by the detection output one time slot before the other, and each output is output alternately by a switch synchronized with the data rate. It was done.

【0009】[0009]

【作用】その結果,直交同期検波出力の振幅値を二値化
しない状態で検波信号がサンプリングされ,アイパター
ンの振幅劣化の原因となる減算処理を伴わず乗算のみの
処理を行うため,アイパターンの振幅劣化がほとんど無
く,かつ軟判定利得を確保した状態で再生出力が得ら
れ,ビタビ復合軟判定方式への適応が可能となる。
As a result, the detection signal is sampled without binarizing the amplitude value of the quadrature synchronous detection output, and only the multiplication is performed without performing the subtraction processing that causes the amplitude deterioration of the eye pattern. The playback output is obtained with almost no amplitude deterioration and the soft decision gain is secured, and it is possible to adapt to the Viterbi reconstruction soft decision method.

【0010】[0010]

【実施例】以下,この発明の一実施例を図1により説明
する。変調波入力端子1は直交同期検波器2を介しサン
プリングゲート4,5に接続される。サンプリングゲー
ト4は乗算器9,符号反転器11を介し切換えスイッチ
12と接続され,サンプリングゲート5は乗算器10を
介して切換スイッチ12と接続される。さらに,サンプ
リングゲート4は遅延器7を介して乗算器10と,サン
プリングゲート5は遅延器8を介して乗算器9と接続さ
れる。クロック再生器3は,1/2分周器13を介しサ
ンプリングゲート5,インバータ6と接続され,インバ
ータ6はサンプリングゲート4と接続される。さらに,
クロック再生器3は切換スイッチ12と接続され,切換
スイッチ12は再生符号の出力端子14と接続される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIG. The modulated wave input terminal 1 is connected to the sampling gates 4 and 5 via the quadrature synchronous detector 2. The sampling gate 4 is connected to the changeover switch 12 via the multiplier 9 and the sign inverter 11, and the sampling gate 5 is connected to the changeover switch 12 via the multiplier 10. Further, the sampling gate 4 is connected to the multiplier 10 via the delay unit 7, and the sampling gate 5 is connected to the multiplier 9 via the delay unit 8. The clock regenerator 3 is connected to the sampling gate 5 and the inverter 6 via the 1/2 frequency divider 13, and the inverter 6 is connected to the sampling gate 4. further,
The clock regenerator 3 is connected to the changeover switch 12, and the changeover switch 12 is connected to the output terminal 14 for the reproduced code.

【0011】以下,この動作について説明する。入力端
子1から,入力されたGMSK変調波は,直交同期検波
器2を通すことにより,同相検波出力υI,直交検波出
力υQとして検波される。このυI,υQの波形を図5に
示す。
This operation will be described below. The GMSK modulated wave input from the input terminal 1 is detected as an in-phase detection output υ I and a quadrature detection output υ Q by passing through the quadrature synchronous detector 2. The waveforms of υ I and υ Q are shown in Fig. 5.

【0012】直交検波出力υQは,データレートに同期
した再生クロック信号を二分周したクロック信号CLK
によりサンプリングゲート5でサンプリングされ,同相
検波出力υIは,クロック信号CLKを反転したクロッ
ク信号バーCLKによりサンプリングゲート4でサンプ
リングされる。サンプリングされた信号は遅延器7,8
を介し,同相検波出力υIは一タイムスロット時間の1
T前の直交検波出力υQ-Tと,直交検波出力υQは1T前
の同相検波出力υI-Tと乗算器9,10で各々乗じられ
る。さらに,同相検波出力側の乗算器9の出力(υI×
υQ-T)は符号反転器11により符号が反転される。
The quadrature detection output υ Q is a clock signal CLK obtained by dividing the reproduction clock signal synchronized with the data rate by two.
Is sampled by the sampling gate 5, and the in-phase detection output υ I is sampled by the sampling gate 4 by the clock signal bar CLK which is the inverted clock signal CLK. The sampled signals are delayed by the delay units 7 and 8.
In-phase detection output υ I is
The quadrature detection output υ QT before T and the quadrature detection output υ Q are respectively multiplied by the in-phase detection output υ IT 1 T before and the multipliers 9 and 10. Furthermore, the output of the multiplier 9 on the in-phase detection output side (υ I ×
The sign of υ QT ) is inverted by the sign inverter 11.

【0013】この符号反転器11の出力と,乗算器10
の出力のアイパターン波形図を図6に示す。図6で示す
信号は切換スイッチ12で一タイムスロット時間のTご
とに交互に出力される。
The output of the sign inverter 11 and the multiplier 10
FIG. 6 shows an eye pattern waveform diagram of the output of FIG. The signal shown in FIG. 6 is alternately output by the changeover switch 12 every T of one time slot time.

【0014】本回路構成を採ることにより,減算処理を
伴わずに乗算のみで差分処理が可能であるため,アイの
振幅劣化を防ぐことができ,また出力は二値化されない
のでビタビ復号の軟判定データとして使用できる。
By adopting this circuit configuration, since difference processing can be performed only by multiplication without involving subtraction processing, deterioration of eye amplitude can be prevented, and since the output is not binarized, Viterbi decoding softening is possible. It can be used as judgment data.

【0015】[0015]

【発明の効果】以上述べた如く本発明によれば,直交同
期検波方式を用いたGMSK復調器において,誤り訂正
方式としてビタビ復号軟判定方式が適応可能となる上,
再生符号列のアイパターンの振幅劣化も少ないため,よ
り復調効率の高い受信機が実現でき,その効果は顕著で
ある。
As described above, according to the present invention, in the GMSK demodulator using the orthogonal coherent detection method, the Viterbi decoding soft decision method can be applied as the error correction method.
Since the amplitude deterioration of the eye pattern of the reproduction code string is small, a receiver with higher demodulation efficiency can be realized, and the effect is remarkable.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の全体構成を示すブロック図。FIG. 1 is a block diagram showing the overall configuration of the present invention.

【図2】直交同期検波におけるコスタスループを用いた
識別再生装置の従来例を示すブロック図。
FIG. 2 is a block diagram showing a conventional example of an identification / reproduction device using a Costas loop in quadrature synchronous detection.

【図3】差分処理を用いた識別再生装置の従来例を示す
ブロック図。
FIG. 3 is a block diagram showing a conventional example of an identification / reproduction device using difference processing.

【図4】差分処理を行った場合の再生符号のアイパター
ン波形図。
FIG. 4 is an eye pattern waveform diagram of a reproduction code when difference processing is performed.

【図5】直交同期検波器出力信号のアイパターン波形
図。
FIG. 5 is an eye pattern waveform diagram of an output signal of a quadrature synchronous detector.

【図6】本発明における切換スイッチの入力信号のアイ
パターン波形図。
FIG. 6 is an eye pattern waveform diagram of an input signal of a changeover switch according to the present invention.

【符号の説明】[Explanation of symbols]

1 入力端子 2 直交同期検波器 3 クロック再生器 4,5 サンプリングゲート 6 インバータ 7,8 遅延器 9,10 乗算器 11 符号反転器 12 切換スイッチ 13 2分周器 14 出力端子 15,16 二値判定器 17,18 EX.ORゲート 19 減算器 1 Input Terminal 2 Quadrature Synchronous Detector 3 Clock Regenerator 4,5 Sampling Gate 6 Inverter 7,8 Delay Device 9,10 Multiplier 11 Sign Inverter 12 Changeover Switch 13 2 Divider 14 Output Terminal 15,16 Binary Judgment Vessel 17, 18 EX. OR gate 19 Subtractor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 直交同期検波方式を用いたGMSK復調
器の識別再生装置において, 同相検波出力及び直交検波出力を各々の識別タイミング
でサンプリングする手段と,上記サンプリング後の各検
波出力をそれぞれ一タイムスロット遅延させる手段と,
上記一タイムスロット遅延後の一方の検波出力信号と遅
延前の他方の検波出力信号とを各々乗算する手段と,上
記二つの乗算出力信号をデータレートに同期させて交互
に出力するための切換手段とを備えたことを特徴とする
識別再生装置。
1. In a discriminating and reproducing apparatus for a GMSK demodulator using a quadrature synchronous detection method, a means for sampling the in-phase detection output and the quadrature detection output at each discrimination timing, and each detection output after the sampling for one time. Means for slot delay,
Means for multiplying one detection output signal after the one time slot delay and the other detection output signal before the delay, and switching means for alternately outputting the two multiplication output signals in synchronization with the data rate. An identification / reproduction device comprising:
【請求項2】 請求項1記載の識別再生装置を備えたこ
とを特徴とするGMSK同期検波方式の受信機。
2. A receiver of the GMSK synchronous detection system comprising the identification / reproduction device according to claim 1.
JP30840391A 1991-10-28 1991-10-28 Identification reproducing device Pending JPH05122260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30840391A JPH05122260A (en) 1991-10-28 1991-10-28 Identification reproducing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30840391A JPH05122260A (en) 1991-10-28 1991-10-28 Identification reproducing device

Publications (1)

Publication Number Publication Date
JPH05122260A true JPH05122260A (en) 1993-05-18

Family

ID=17980646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30840391A Pending JPH05122260A (en) 1991-10-28 1991-10-28 Identification reproducing device

Country Status (1)

Country Link
JP (1) JPH05122260A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003527795A (en) * 1999-12-15 2003-09-16 インフィネオン テクノロジーズ アクチェンゲゼルシャフト Angle modulation signal receiving device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003527795A (en) * 1999-12-15 2003-09-16 インフィネオン テクノロジーズ アクチェンゲゼルシャフト Angle modulation signal receiving device

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