JPS59178542A - Information processing device - Google Patents

Information processing device

Info

Publication number
JPS59178542A
JPS59178542A JP58054184A JP5418483A JPS59178542A JP S59178542 A JPS59178542 A JP S59178542A JP 58054184 A JP58054184 A JP 58054184A JP 5418483 A JP5418483 A JP 5418483A JP S59178542 A JPS59178542 A JP S59178542A
Authority
JP
Japan
Prior art keywords
instruction
information processing
processing device
stop
condition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58054184A
Other languages
Japanese (ja)
Inventor
Hidetoshi Yasukawa
安川 英俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58054184A priority Critical patent/JPS59178542A/en
Publication of JPS59178542A publication Critical patent/JPS59178542A/en
Pending legal-status Critical Current

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  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To easily set an information processing device to a stopping condition at any optional locations on a program, by providing a function which executes an instruction for setting the information processing device under an executing condition to a stopping condition and executing the instruction. CONSTITUTION:An information processing device reads out an instruction out of programs on a memory and slowly advances an address counter, and then, starts processing by checking instruction codes. When the instruction code is a stop instruction at this time, the device puts a bit of a newly installed position displaying the stoppage in a register displaying that there is an interrupting cause. When the instruction is processed, an interrupt register is referred and whether it is interruption or stop display is discriminated. When it is stop display, this device is stopped. Moreover, since the content of the memory is read out and displayed by a display at this time, the condition of the system can be checked in detail.

Description

【発明の詳細な説明】 (1〉  発明の技術分野 本発明は情報処理装置の命令実行の機能に係るものであ
る。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to the command execution function of an information processing device.

(2)従来技術と問題点 プログラムのデバッグや情報処理装置の故障探索等に際
しては、異常を生じたとき走行していたプログラムの命
令アドレス付近での動作を分析するため、その位置で情
報処理装置の動作の進行を止める必要をしばしば生ずる
(2) Prior art and problems When debugging a program or searching for a failure in an information processing device, in order to analyze the operation near the instruction address of the program that was running when an abnormality occurred, the information processing device It is often necessary to stop the progress of a motion.

従来の情報処理装置ではこの様なときのために、情報処
理装置のパネルや制御用のコンソールから命令やオペラ
ンドの絶佳アドレスを指定すると該アドレスが検出され
たとき割シ込みを起こして停止状態になる機能を持たせ
ているものが多い。従って必要に応じて、この機能を利
用するか、または予めプログラム中に分岐先が自らのア
ドレスを指すようなステップを設けておいて、ループさ
せるなどの方法が採られて来た。
In conventional information processing equipment, for such cases, if you specify the perfect address of an instruction or operand from the information processing equipment panel or control console, when that address is detected, an interrupt will be generated and the system will stop. Many of them have certain functions. Therefore, as needed, methods have been adopted, such as making use of this function or providing a step in advance in the program in which the branch destination points to its own address and creating a loop.

これらの内、前者の絶佳アドレスを指定する方法は、情
報処理装置を停止させたい位置のプログラムなどの論理
アドレスとその絶佳アドレスとの関係が一定ではない(
システム編集によって異なる)ため、その調査が面倒で
あるだけでなく間違いを生じ易い欠点があった。また後
者のプログラムをループさせる方法は、情報処理装置が
停止状態にならないので、システムの状態が変化してし
まう欠点があった。
Among these, the former method of specifying the perfect address is used because the relationship between the logical address of a program or the like at the location where you want to stop the information processing device and that perfect address is not constant (
(depending on the system editing), the investigation is not only troublesome but also prone to errors. Furthermore, the latter method of looping the program has the disadvantage that the information processing apparatus does not come to a halt state, so the state of the system changes.

t fcマイクロプロセッサなどで、グログラムの進行
を止めるホルト命令が用意されている場合があるが、こ
れは7ノ・λベレーション命令を繰シ返し実行している
ので前記プログラムをループさせる場合と同様にシステ
ムの状態が変化してしまう欠点があった。
t fc microprocessors may have a halt instruction that stops the progress of the program, but this is similar to the case when the program is looped because it repeatedly executes the 7-λvelation instruction. had the disadvantage that the state of the system changed.

(3)発明の目的 本発明は上記従来の欠点に鑑み、プログラムのデバッグ
や情報処理装置の故障探索などに際して、システムの状
態を詳細に知る必要のあるとき、プログラム上の任意の
位置で情報処理装置を容易に停市状態にすることの可能
な情報処理装置を提供することを目的としている。
(3) Purpose of the Invention In view of the above-mentioned drawbacks of the conventional technology, the present invention provides information processing at any position on a program when it is necessary to know the state of the system in detail, such as when debugging a program or searching for a failure in an information processing device. It is an object of the present invention to provide an information processing device that can easily put the device in a suspended state.

(4)発明の構成 そしてこの目的は本発明によれば特許請求の範囲に記載
のとおり、実行状態の情報処理装置を停止状態にする目
的の命令を実行する機能を有し、該命令の実行によって
自らを停止状態にすることが可能であることを特徴とす
る情報処理装置により達成される。
(4) Structure and object of the invention As described in the claims, the present invention has a function of executing an instruction for the purpose of bringing an information processing device in an execution state into a halt state, and the execution of the instruction This is achieved by an information processing device characterized in that it can put itself into a stopped state by.

(5)発明の実施例 第1図は本発明の1実施例の情報処理装置における停止
命令に係る制御を示す流れ図であって、1は停止命令以
外の命令の命令コードによる分岐を表わしており、2.
5.4はそれぞれ異なる命令の処理ステップを表わして
いる。
(5) Embodiment of the Invention FIG. 1 is a flowchart showing control related to a stop command in an information processing apparatus according to an embodiment of the present invention, where 1 represents branching based on an instruction code of an instruction other than a stop command. , 2.
5.4 represents processing steps of different instructions.

第1図において、情報処理装置はメモリ上のプログラム
の中から命令を読み出すと、次の命令の読み出しに備え
てアドレスカウンタを歩進する。そして命令コードを調
べて、それぞれの命令の処理ステップ2〜4に制御が渡
される。このとき命令コードが本発明に係る停止命令で
あった場合には、単に割り込み原因のあることを表示す
るレジスタに新たに設けた停止を表示する位置のビット
を立てるのみである。命令の処理が終った時、前記レジ
スタが参照され、また割り込みが停止表示かが識別され
て、停止表示である場合には情報処理装置が停止状態に
なる。このとき、ディスプレイ装置によりメモリ内容を
読み出して表示したシ、メモリダンプリストを出力する
ことが出来るから、これによりシステムの状態を詳細に
調べることが可能となる。
In FIG. 1, when an information processing device reads an instruction from a program on a memory, it increments an address counter in preparation for reading the next instruction. The instruction code is then examined and control is passed to processing steps 2 to 4 for each instruction. At this time, if the instruction code is a stop instruction according to the present invention, a newly provided bit at a position indicating a stop is simply set in a register indicating that there is an interrupt cause. When the processing of the instruction is completed, the register is referred to, and it is determined whether the interrupt is a stop indication, and if it is a stop indication, the information processing apparatus is placed in a halt state. At this time, the display device can read and display the memory contents and output a memory dump list, making it possible to examine the system status in detail.

第2図は本発明の他の実施例の情報処理装置における停
止命令に係る制御を示す流れ図であって、11〜4′は
第1図と同様である。
FIG. 2 is a flow chart showing control related to a stop command in an information processing apparatus according to another embodiment of the present invention, and steps 11 to 4' are the same as those in FIG. 1.

第2図に示す実施例は、第1図の場合のように停止命令
によって無東件に停止するのではなく、一定の条件が満
たされているときにのみ停止命令が受は付けられるよう
に制御するもので、例えば停止命令のオペラ〉′ドに書
かれた値を、特定のレジスタの内容と比較して、停止状
態にするか否かを判定すると言う方法等が採られる。
In the embodiment shown in FIG. 2, the stop command is not automatically stopped as in the case of FIG. 1, but the stop command is accepted only when certain conditions are met. For example, a method is adopted in which the value written in the operand of the stop command is compared with the contents of a specific register to determine whether or not to enter the stop state.

(5)発明の詳細 な説明したように本発明の情報処理装置によれば、プロ
グラム中に書かれた停止命令によって該プログラムを実
行中の情報処理装置を停止状態にすることが出来るので
、プログラムのデバッグや情報処理装置の故障探索など
に際して任意の時点でのシステム状態の調査が容易に行
なえるから効果は太きい。
(5) As described in detail, according to the information processing device of the present invention, the information processing device that is executing the program can be stopped by a stop command written in the program. This is highly effective because the system status at any point in time can be easily investigated when debugging systems or searching for failures in information processing equipment.

また、本発明は従来の情報処理装置の制御を大幅に変更
する必要はなく、前述した実施例の流れ図によっても理
解されるとおり、従来の割シ込み処理の制御を若干変更
することで、容易に実現することが可能である。
Furthermore, the present invention does not require any major changes in the control of the conventional information processing apparatus, and as can be understood from the flowchart of the embodiment described above, the present invention can be easily implemented by slightly changing the control of the conventional interrupt processing. It is possible to realize this.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の1実施例の情報処理装置における停止
命令にかかる制御を示す流れ図、第2図は本発明の他の
実施例の情報処理装置における停止命令に係る制御を示
す流れ図である。 1.1′・・・停止命令以外の命令の命令コードによる
分岐、2〜4.2′〜4′・・・命令の処理ステップ
FIG. 1 is a flow chart showing control related to a stop command in an information processing device according to one embodiment of the present invention, and FIG. 2 is a flow chart showing control related to a stop command in an information processing device according to another embodiment of the present invention. . 1.1'...Branch based on instruction code of instruction other than stop instruction, 2-4.2'-4'...Instruction processing step

Claims (1)

【特許請求の範囲】[Claims] 実行状態の情報処理装置を停止状態にする目的の命令を
実行する機能を有し、該命令の実行によって自らを停止
状態にすることが可能であることを特徴とする情報処理
装置。
An information processing device having a function of executing an instruction intended to put an information processing device in a running state into a stopped state, and capable of putting itself into a stopped state by executing the instruction.
JP58054184A 1983-03-30 1983-03-30 Information processing device Pending JPS59178542A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58054184A JPS59178542A (en) 1983-03-30 1983-03-30 Information processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58054184A JPS59178542A (en) 1983-03-30 1983-03-30 Information processing device

Publications (1)

Publication Number Publication Date
JPS59178542A true JPS59178542A (en) 1984-10-09

Family

ID=12963455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58054184A Pending JPS59178542A (en) 1983-03-30 1983-03-30 Information processing device

Country Status (1)

Country Link
JP (1) JPS59178542A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63124144A (en) * 1986-11-13 1988-05-27 Nec Corp Information processor
JPS63124145A (en) * 1986-11-13 1988-05-27 Nec Corp Information processor
JPH02291076A (en) * 1989-03-06 1990-11-30 Internatl Business Mach Corp <Ibm> Natural language analyzer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63124144A (en) * 1986-11-13 1988-05-27 Nec Corp Information processor
JPS63124145A (en) * 1986-11-13 1988-05-27 Nec Corp Information processor
JPH02291076A (en) * 1989-03-06 1990-11-30 Internatl Business Mach Corp <Ibm> Natural language analyzer

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