JPS59159583A - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device

Info

Publication number
JPS59159583A
JPS59159583A JP58032764A JP3276483A JPS59159583A JP S59159583 A JPS59159583 A JP S59159583A JP 58032764 A JP58032764 A JP 58032764A JP 3276483 A JP3276483 A JP 3276483A JP S59159583 A JPS59159583 A JP S59159583A
Authority
JP
Japan
Prior art keywords
light emitting
wire bonding
laser diode
wire
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58032764A
Other languages
Japanese (ja)
Other versions
JPH0470793B2 (en
Inventor
Masamichi Kobayashi
正道 小林
Masahiro Ichiki
市来　正浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58032764A priority Critical patent/JPS59159583A/en
Publication of JPS59159583A publication Critical patent/JPS59159583A/en
Publication of JPH0470793B2 publication Critical patent/JPH0470793B2/ja
Granted legal-status Critical Current

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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
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    • H01S5/0233—Mounting configuration of laser chips
    • H01S5/02345—Wire-bonding
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    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013—Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
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    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
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    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0201—Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
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    • H01S5/02208—Mountings; Housings characterised by the shape of the housings
    • H01S5/02212—Can-type, e.g. TO-CAN housings with emission along or parallel to symmetry axis
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    • H01S5/02355—Fixing laser chips on mounts
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    • H01S5/00—Semiconductor lasers
    • H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/068—Stabilisation of laser output parameters
    • H01S5/0683—Stabilisation of laser output parameters by monitoring the optical output parameters

Abstract

PURPOSE:To enable the automation of assembly by mounting a light emitting element on an insulation substrate whereon an Au film is formed and then leading out electrodes from the upper surface of said element and the surface of the Au film by wire bonding. CONSTITUTION:A metallic thin film 11 and the Au thin film 12 are formed on the substrate 10, and unnecessary parts are removed by patterning. Next, a metallic film 13 is formed at the part for mounting a laser diode element 16, and further a solder 15 is formed by a lift-off method. Successively, the substrate 10 is devided into individual pellets, and said element 16 is placed on the solder 15 and then hardened by fusing the solder by heating. Then, the Au wires 17 and 18 are connected by wire bonding. Thus, the soldering of an Au pedestal is unnecessitated, and accordingly automatic assembly becomes simple.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体発光装置、例えばレーザダイオードのご
とき発光素子の電極取り出し技術に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a technology for taking out electrodes of semiconductor light emitting devices, for example light emitting elements such as laser diodes.

〔背景技術〕[Background technology]

レーザダイオードなステム上に組み立て電極取り出しを
行なうため本願発明者等はこれまで下記の構造を考えた
。すなわち、第１図に示すように、サブマウントと称す
る５ｉＣ（炭火シリコン）等の高耐熱性絶縁基板１０表
面にクロム・金・半田を順次積層してなる金属被膜２を
形成し、この金属被膜２の上の一部にレーザダイオード
素子（発光素子）３を載せると同時に、金属被膜２の上
の他の一部に金ベディスクルと称する金箔の小片４を載
せて加熱することにより上記金属被膜表面の半田を溶か
してレーザダイオード素子と金ベディスタルを絶縁基板
１上に溶着固定す゛る。レーザダイオード素子からの電
極取り出しは、同図に示すようにレーザダイオード素子
３の上面電極に直接に金線５をワイヤボンディングし、
下面電極は金属被膜２を介して電気的に接続する金ペデ
ィスタル４上に金線６をワイヤボンディングすることに
より行なう。In order to assemble and take out the electrodes on the stem of a laser diode, the inventors of the present application have so far considered the following structure. That is, as shown in FIG. 1, a metal coating 2 consisting of chromium, gold, and solder is sequentially laminated on the surface of a highly heat-resistant insulating substrate 10 such as 5iC (charcoal-fired silicon) called a submount. A laser diode element (light emitting element) 3 is placed on a portion of the metal coating 2, and at the same time a small piece of gold foil 4 called a gold pedicle is placed on the other portion of the metal coating 2 and heated. The laser diode element and the gold base metal are welded and fixed onto the insulating substrate 1 by melting the solder. To take out the electrode from the laser diode element, wire bond the gold wire 5 directly to the upper surface electrode of the laser diode element 3 as shown in the figure.
The lower surface electrode is formed by wire bonding a gold wire 6 onto a gold pedestal 4 which is electrically connected via a metal coating 2.

なお、上記絶縁基板１は後記する別の銅等からなるステ
ムに取付けられ、ワイヤボンディングされた各金線はス
テム上のリードに接続される。The insulating substrate 1 is attached to another stem made of copper or the like, which will be described later, and each wire-bonded gold wire is connected to a lead on the stem.

上記のＳｉＣからなる絶縁基板１０寸法は、たとえば縦
横０．５１１１ｍＸ１．ＯｗＬ、厚さ０．２膓程度で極
めて微小であり、この上にレーザダイオード素子及び金
ベディスタルを半田付けするために同時に載せることは
困難で、その自動組立化の大きな障害になっている。本
発明はかかる問題を解決したものである。The dimensions of the insulating substrate 10 made of SiC are, for example, 0.5111 m x 1. It is extremely small, with a thickness of about 0.2 mm, and it is difficult to place a laser diode element and a gold bedtal on it at the same time for soldering, which is a major obstacle to automatic assembly. The present invention solves this problem.

〔発明の目的〕[Purpose of the invention]

本発明の目的はレーザダイオードの組立の合理化ができ
る電極取り出し構造の提供にある。An object of the present invention is to provide an electrode extraction structure that can streamline the assembly of a laser diode.

〔発明の概要〕 本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、絶縁基板の一主表面上の全面又は
一部に金被膜が形成され、この金被膜表面上の一部に半
田材を介してレーザダイオード素子が取り付けられ、こ
のレーザダイオード素子の上面はその一つの電極取り出
しのためのワイヤボンディング部であるとともに金被膜
表面の他部はレーザダイオード素子の他の一つの電極取
り出しのためのワイヤボンディング部であることによっ
て、レーザダイオードの組立の自動化を可能とする発明
の目的を達成するものである。[Summary of the Invention] To briefly explain the outline of a typical invention disclosed in this application, a gold coating is formed on the entire or a part of one main surface of an insulating substrate, and a gold coating is formed on the surface of the gold coating. A laser diode element is attached to a part through a solder material, and the upper surface of this laser diode element is a wire bonding part for taking out one electrode, and the other part of the gold coating surface is a part of the other part of the laser diode element. By providing a wire bonding section for taking out two electrodes, the object of the invention is achieved, which is to enable automation of the assembly of the laser diode.

〔実施例〕〔Example〕

第２図〜第９図は本発明による半導体発光装置の一実施
例をその組立工程の各形態により示す工程断面図である
。FIGS. 2 to 9 are process cross-sectional views showing various forms of the assembly process of an embodiment of the semiconductor light emitting device according to the present invention.

＋１１　　第２図において、１０は厚さ０．２鵡のＳｉ
Ｃ基板（ウェハ）であってこの基板の上面上の全面に接
合性を良くするためＣｒ（クロム）又はＴｉ（チタン）
等の金属の薄膜１１を蒸着又はスパッタにより形成し、
その上にＡｕ（金）の薄膜１２を蒸着又はスパッタによ
り形成する。なお、ＳｉＣ基板１０の下面にもＡｕ等の
金属が蒸着されるが、このための説明及び図面は省略す
る。+11 In Figure 2, 10 is Si with a thickness of 0.2
C substrate (wafer), and Cr (chromium) or Ti (titanium) is applied to the entire upper surface of this substrate to improve bonding properties.
Form a thin film 11 of metal such as by vapor deposition or sputtering,
A thin film 12 of Au (gold) is formed thereon by vapor deposition or sputtering. Note that a metal such as Au is also deposited on the lower surface of the SiC substrate 10, but the explanation and drawings for this will be omitted.

（２）ホトレジストマスク（図示しない）を用いて上記
Ｃｒ等及びＡ　１１の薄膜１１．１２をベレットボンデ
ィング及びワイヤボンディングされる部分をのこして第
３図に示すように不要部をバターニング（ホトエッチ）
により除去する。この場合バターニングされる部分には
ＳｉＣ基板のスクライプ領域（Ｓ）を含むものである。(2) Using a photoresist mask (not shown), the thin films 11 and 12 of Cr etc. and A11 are subjected to bullet bonding and wire bonding, and unnecessary parts are patterned (photoetched) as shown in Fig. 3.
Remove by. In this case, the portion to be patterned includes the scribe region (S) of the SiC substrate.

（３１Ａｕ等の薄膜の上でレーザダイオード素子を取り
付ける部分に不要な金属拡散を阻止するためのバリアメ
タルとして、Ｃｒ　（クローム）、Ｔｉ（チタン）、Ｗ
（タングステン）、Ｔａ（タンタル）等から選択し、本
バリアメタル上に半田との濡れ性の良好なＡｕ（金）、
ｐｔ（白金）、Ｐｄ（バ２ジウム）等を形成した金属被
膜１３を第４図に示すように選択的に形成する。この金
属被膜１３の選択形成にはホトレジストマスク又はリフ
トオフ法（後述する）を用いて行なうものである。(Cr (chrome), Ti (titanium), W
(tungsten), Ta (tantalum), etc., and Au (gold), which has good wettability with solder, on this barrier metal.
A metal coating 13 made of pt (platinum), Pd (bardium), etc. is selectively formed as shown in FIG. This selective formation of the metal film 13 is performed using a photoresist mask or a lift-off method (described later).

（４）　　バリアメタルとなる金属被膜１３上に、半田
をリフトオフ法により形成する。すなわち第５図に示す
ようにレーザダイオード素子をとりつげる部分のみが窓
開するホトレジスト（感光耐食樹脂）マスク１４を形成
した上に適当な厚さに半田材（Ｐｂ−８ｎ系）１５を形
成した後、上記ホトレジスト・マスク特定の有機溶剤を
用いて溶解除去することによりホトレジストマスク上の
半田材を選択的に取り除（（第６図参照）。(4) Solder is formed on the metal film 13 that will become the barrier metal by a lift-off method. That is, as shown in FIG. 5, a photoresist (photosensitive corrosion-resistant resin) mask 14 was formed with a window open only in the portion where the laser diode element was attached, and then a solder material (Pb-8n type) 15 was formed to an appropriate thickness. After that, the solder material on the photoresist mask is selectively removed by dissolving and removing the photoresist mask using a specific organic solvent (see FIG. 6).

（５１ＳｉＣ基板１０をスクライプ領域Ｓでカットし、
個々のベレットに分割する（第６図、第７図参照）。(Cut the 51SiC substrate 10 in the scribe area S,
Divide into individual pellets (see Figures 6 and 7).

（６）レーザダイオード素子（Ｇａ　Ａｓ　ＡＩｊ系共
晶半導体結晶の一部に不純物拡散により活性層となるＰ
ｎ接合を形成し、上下面に電極を設けたもの）１６を上
記半田材１５の上に示すように載置し、加熱して半田材
を溶かすことにより固定する。(6) Laser diode element (P that becomes an active layer by impurity diffusion into a part of the GaAs AIj-based eutectic semiconductor crystal)
16 with an n-junction formed and electrodes provided on the upper and lower surfaces is placed on the solder material 15 as shown, and fixed by heating to melt the solder material.

（７）第８図に示すようにレーザダイオード素子１６の
上面電極に対して一つのＡｕワイヤ１７を直接にワイヤ
ボンディングするとともにＡｕ被膜１２においてダイオ
ード素子の取り付けてない部分に他の１つのＡｕワイヤ
１８をワイヤボンディングにより接続する。第９図は第
８図に対応する平面図である。(7) As shown in FIG. 8, one Au wire 17 is wire-bonded directly to the upper surface electrode of the laser diode element 16, and another Au wire is bonded to the part of the Au coating 12 where the diode element is not attached. 18 are connected by wire bonding. FIG. 9 is a plan view corresponding to FIG. 8.

なお、ワイヤボンディングを行なう以前にＳｉＣ基板１
０は第１２図に示すようにステム１９上に半田等により
固定され、ワイヤボンディングされたＡｕワイヤ１７．
１８の他端をステム上に植設されたリード２０にワイヤ
ボンディングにより接続する。同図において２１はステ
ムヘッダ、２２は光出力モニター用受光素子、２３は封
止体であって上部を開口しレーザ光が上方へ向って発振
するようになる。なお、位置精度を確実なものとするた
めに、第１２図に示すようにステム１９．サブマウント
１０およびレーザダイオード（チップ）１６のそれぞれ
の端面ば平坦とならないように取り付けた方が好ましい
。Note that before wire bonding, the SiC substrate 1
As shown in FIG. 12, 0 is an Au wire 17.0 fixed to the stem 19 by solder or the like and wire-bonded.
The other end of 18 is connected to a lead 20 implanted on the stem by wire bonding. In the figure, 21 is a stem header, 22 is a light receiving element for monitoring optical output, and 23 is a sealing body whose upper part is open so that laser light oscillates upward. In addition, in order to ensure positional accuracy, the stem 19. It is preferable to attach the submount 10 and the laser diode (chip) 16 so that their respective end faces are not flat.

上記の実施例で説明した本発明によれば、ＳｉＣ等の絶
縁基板（又はサブマウントという）上［Ａｕ被膜を半田
付けする部分（１３）とワイヤボンディング（１２）す
る部分とを同時にバターニングにより形成することによ
り、サブマウント上に半田付けするのはレーザダイオー
ド素子チップのみとなるから組立の自動化が容易となろ
う第９図では、レーザダイオード素子を半田付けする部
分とワイヤボンディングする部分を含むＡｕ等の金属被
膜をほとんど全面に形成する場合を示しているがワイヤ
ボンディングされる部分の金属被膜はこれ以外に任意の
形状とすることができる。According to the present invention explained in the above embodiments, on an insulating substrate (or submount) such as SiC, [the part to which the Au film is soldered (13) and the part to be wire bonded (12) are simultaneously patterned. By forming the submount, only the laser diode element chip is soldered onto the submount, making it easier to automate the assembly. Figure 9 includes the part where the laser diode element is soldered and the part where wire bonding is done. Although a case is shown in which a metal coating such as Au is formed almost on the entire surface, the metal coating on the portion to be wire bonded may have any other shape.

第１０図ではワイヤボンディングされる金属被膜を半凸
形状とした場合の例を示し、ワイヤポンディング位置は
いくぶん限定されることになる。FIG. 10 shows an example in which the metal coating to be wire bonded has a semi-convex shape, and the wire bonding position is somewhat limited.

第１１図は金属被膜におけるワイヤボンディングされる
部分を２つの部分１２ａ、１２ｂに分けて形成した場合
の例を示す。この場合、レーザダイオード素子が半田付
けされた部分と一体の部分１２ａから切り離された部分
１２ｂＫレ一ザダイオード素子上面のワイヤボンディン
グ部から取り出したＡｕワイヤ１７を−たん接続し、こ
こを第２のワイヤボンディング部として新たなＡｕワイ
ヤ２４をワイヤボンディングし外部リードへの電極取り
出し部とする。FIG. 11 shows an example in which the portion of the metal coating to be wire bonded is divided into two portions 12a and 12b. In this case, the Au wire 17 taken out from the wire bonding part on the upper surface of the laser diode element is simply connected to the part 12b cut off from the part 12a that is integrated with the part to which the laser diode element is soldered, and this is connected to the second part 12b. A new Au wire 24 is wire-bonded as a wire-bonding part to serve as an electrode extraction part to an external lead.

〔効果〕〔effect〕

以上実施例で述べた本発明によれば下記のように効果が
得られる。According to the present invention described in the embodiments above, the following effects can be obtained.

（１）　　レーザダイオード取り付は部とワイヤボンデ
ィング部を一体に形成することにより従来のようなＡｕ
ベディスクルが不要となり、組立の自動化が実現できる
。(1) Laser diode mounting is possible by integrally forming the part and wire bonding part.
This eliminates the need for bedicles and enables automation of assembly.

（２１Ａｕペデイスタルが不要になることにより材料節
減ができる。(Materials can be saved by eliminating the need for a 21Au pedestal.

（３）　　ワイヤボンディング部となるＡｕ被膜を２つ
部分に分けて形成することにより、レーザダイオードチ
ップ付けを既に行なったサブマウント毎に［移し変え１
を行なう場合に有利である。(3) By forming the Au film that will become the wire bonding part in two parts, it is possible to apply [Transfer 1] to each submount to which the laser diode chip has already been attached.
This is advantageous when carrying out.

（４）　　第２のワイヤボンディング部を設けることに
より、レーザダイオードから直接にリードへのワイヤボ
ンディングによる接続が一度で済み、素子へのストレス
が少なくなり寿命が向上する。(4) By providing the second wire bonding section, the connection from the laser diode directly to the lead by wire bonding only needs to be done once, reducing stress on the device and improving its life.

１５）上記（１）〜（４）により製品の信頼性が向上す
る。15) The reliability of the product is improved by the above (1) to (4).

以上本発明者によってなされた実施例にもとづき具体的
に説明したが本発明は上記実施例に限定されるものでは
なく、その要旨を逸脱しない範囲で種々に変更可能であ
ることは（・うまでもな℃・。Although the present invention has been specifically described above based on the embodiments made by the present inventor, it is understood that the present invention is not limited to the above-mentioned embodiments, and can be modified in various ways without departing from the gist of the invention. Na℃・.

たとえばワイヤボンディング部となるＡｕ被膜の形状を
図示した形状以外の種々の形状をもたせることができる
。For example, the shape of the Au coating serving as the wire bonding portion can be made to have various shapes other than the shape shown in the figure.

〔利用分野〕[Application field]

本発明はレーザダイオード一般、例えば赤外レーザダイ
オード、可視レーザダイオード等の長波長レーザダイオ
ードの電極取り出し構造に適用できる。さらに本発明は
レーザダイオード以外の半導体発光素子の電極取り出し
構造に応用できるものである。The present invention can be applied to the electrode extraction structure of laser diodes in general, for example, long wavelength laser diodes such as infrared laser diodes and visible laser diodes. Furthermore, the present invention can be applied to electrode extraction structures of semiconductor light emitting devices other than laser diodes.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこれまで使われているレーザターイオードの電
極取り出し構造の一例を示す断面図である。 第２図〜第８図は本発明によるレーザダイオードの電極
取り出し構造の一実施例をその組立工程にしたがって示
す工程断面図である。 第９図〜第１１図は本発明によるレーザダイオードの電
極取り出し構造の各実施例を示す平面図である。 第１２図はレーザダイオード装置全体の組立後の形状を
示す正面図である。 １・・・ＳｉＣ基板、２・・・半田被膜、３・・・レー
ザダイオード素子、４・・・金ペディスタル、５，６・
・・金ワイヤ、１０・・・ＳｉＣ基板（ウェハ及びペレ
ット）、１１・・・Ｃｒ、Ｔｉ等の薄膜、１２・・・金
被膜、１３・・・バリアメタル、１４・・・ホトレジス
ト、１５・・・半田材、１６・・・レーザダイオード素
子（チップ）、１７．１８・・・金ワイヤ、１９・・・
ステム、２０・・・リード、２１・・・ステムヘッダ、
２２・・・光出力モニタ用受光素子、２３・・・封止体
、２４・・・金ワイヤ、Ｓ・・・スクライプ（ダイシン
グ）領域。 第　　１　　図 第　　２　図 ／２ 第　　４　　図 第　　６　図 ３９０ 竺９図 第１０図 ／−？FIG. 1 is a cross-sectional view showing an example of an electrode extraction structure of a laser diode that has been used so far. FIGS. 2 to 8 are process cross-sectional views showing an embodiment of the electrode lead-out structure of a laser diode according to the present invention according to its assembly process. 9 to 11 are plan views showing respective embodiments of the electrode extraction structure of a laser diode according to the present invention. FIG. 12 is a front view showing the shape of the entire laser diode device after assembly. DESCRIPTION OF SYMBOLS 1... SiC substrate, 2... Solder coating, 3... Laser diode element, 4... Gold pedestal, 5, 6...
... Gold wire, 10... SiC substrate (wafer and pellet), 11... Thin film of Cr, Ti, etc., 12... Gold coating, 13... Barrier metal, 14... Photoresist, 15. ...Solder material, 16...Laser diode element (chip), 17.18...Gold wire, 19...
Stem, 20... Lead, 21... Stem header,
22... Light receiving element for monitoring optical output, 23... Sealing body, 24... Gold wire, S... Scripe (dicing) region. Figure 1 Figure 2/2 Figure 4 Figure 6 Figure 390 Figure 9 Figure 10/-?

Claims (1)

【特許請求の範囲】 １、絶縁基板の一生表面上の全面又は一部に金被膜が形
成され、上記金被膜表面上の一部に半田材を介して発光
素子が取り付けられ、上記発光素子の上面はその一つの
電極取り出しのためのワイヤボンディング部であるとと
もに上記金被膜表面上の他部は上記発光素子の他の一つ
の電極取り出しのためのワイヤボンディング部であるこ
とを特徴とする半導体発光装置。 ２、上記ワイヤボンディング部となる金被膜は２つの部
分に分けて絶縁基板上に形成され、第１の金被膜上の一
部に半田材を介して発光素子が取り付けられ、発光素子
の上面のワイヤボンディング部から取り出したワイヤは
第２の金被膜上に接続されるとともに、この第２の金被
膜は一つの電極取り出しのための第２のワイヤボンディ
ング部となっている。許請求の範囲第１項に記載の半導
体発光装置。[Claims] 1. A gold film is formed on the entire surface or a part of the surface of the insulating substrate, a light emitting element is attached to a part of the surface of the gold film via a solder material, and the light emitting element is A semiconductor light emitting device characterized in that the upper surface is a wire bonding portion for taking out one electrode, and the other part on the surface of the gold coating is a wire bonding portion for taking out another electrode of the light emitting element. Device. 2. The gold film that will become the wire bonding part is formed on an insulating substrate in two parts, and a light emitting element is attached to a part of the first gold film via a solder material, and the upper surface of the light emitting element is attached to a part of the first gold film. The wire taken out from the wire bonding part is connected onto the second gold film, and this second gold film serves as a second wire bonding part for taking out one electrode. A semiconductor light emitting device according to claim 1.
JP58032764A 1983-03-02 1983-03-02 Semiconductor light emitting device Granted JPS59159583A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58032764A JPS59159583A (en) 1983-03-02 1983-03-02 Semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58032764A JPS59159583A (en) 1983-03-02 1983-03-02 Semiconductor light emitting device

Publications (2)

Publication Number Publication Date
JPS59159583A true JPS59159583A (en) 1984-09-10
JPH0470793B2 JPH0470793B2 (en) 1992-11-11

Family

ID=12367904

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58032764A Granted JPS59159583A (en) 1983-03-02 1983-03-02 Semiconductor light emitting device

Country Status (1)

Country Link
JP (1) JPS59159583A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208887A (en) * 1985-03-13 1986-09-17 Rohm Co Ltd Semiconductor laser apparatus
JPS6428973A (en) * 1987-07-24 1989-01-31 Mitsubishi Electric Corp Member for mounting optical semiconductor element chip
US7075960B2 (en) 2003-01-10 2006-07-11 Matsushita Electric Industrial Co., Ltd. Semiconductor laser apparatus and production method thereof
WO2006098454A1 (en) * 2005-03-18 2006-09-21 Dowa Electronics Materials Co., Ltd. Submount and method for manufacturing same
JP2006261569A (en) * 2005-03-18 2006-09-28 Dowa Mining Co Ltd Sub-mount and its manufacturing method
JP2010283197A (en) * 2009-06-05 2010-12-16 Mitsubishi Electric Corp Laser diode device and method of manufacturing laser diode device
JP2012514860A (en) * 2009-01-09 2012-06-28 シーアン フォーカスライト テクノロジーズ カンパニー リミッテッド High power semiconductor laser and manufacturing method thereof
JP2014139997A (en) * 2013-01-21 2014-07-31 Rohm Co Ltd Light-emitting element and light-emitting element package

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940396A (en) * 1972-08-25 1974-04-15
JPS5693387A (en) * 1979-12-26 1981-07-28 Matsushita Electric Ind Co Ltd Semiconductor laser device
JPS5822760U (en) * 1981-08-05 1983-02-12 株式会社日立製作所 semiconductor equipment

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5822760B2 (en) * 1980-02-07 1983-05-11 工業技術院長 Low-pass filtration device for infrasound

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940396A (en) * 1972-08-25 1974-04-15
JPS5693387A (en) * 1979-12-26 1981-07-28 Matsushita Electric Ind Co Ltd Semiconductor laser device
JPS5822760U (en) * 1981-08-05 1983-02-12 株式会社日立製作所 semiconductor equipment

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208887A (en) * 1985-03-13 1986-09-17 Rohm Co Ltd Semiconductor laser apparatus
JPS6428973A (en) * 1987-07-24 1989-01-31 Mitsubishi Electric Corp Member for mounting optical semiconductor element chip
US7075960B2 (en) 2003-01-10 2006-07-11 Matsushita Electric Industrial Co., Ltd. Semiconductor laser apparatus and production method thereof
US7362785B2 (en) 2003-01-10 2008-04-22 Matsushita Electric Industrial Co., Ltd. Semiconductor laser apparatus and production method thereof
WO2006098454A1 (en) * 2005-03-18 2006-09-21 Dowa Electronics Materials Co., Ltd. Submount and method for manufacturing same
JP2006261569A (en) * 2005-03-18 2006-09-28 Dowa Mining Co Ltd Sub-mount and its manufacturing method
US8472208B2 (en) 2005-03-18 2013-06-25 Dowa Electronics Materials Co., Ltd. Submount and method of manufacturing the same
US8581106B2 (en) 2005-03-18 2013-11-12 Dowa Electronics Materials Co., Ltd. Submount
TWI462236B (en) * 2005-03-18 2014-11-21 Dowa Electronics Materials Co Sub-mounting sheet and manufacturing method thereof
JP2012514860A (en) * 2009-01-09 2012-06-28 シーアン フォーカスライト テクノロジーズ カンパニー リミッテッド High power semiconductor laser and manufacturing method thereof
JP2010283197A (en) * 2009-06-05 2010-12-16 Mitsubishi Electric Corp Laser diode device and method of manufacturing laser diode device
JP2014139997A (en) * 2013-01-21 2014-07-31 Rohm Co Ltd Light-emitting element and light-emitting element package

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