JPS6366062B2 - - Google Patents
Info
- Publication number
- JPS6366062B2 JPS6366062B2 JP11913383A JP11913383A JPS6366062B2 JP S6366062 B2 JPS6366062 B2 JP S6366062B2 JP 11913383 A JP11913383 A JP 11913383A JP 11913383 A JP11913383 A JP 11913383A JP S6366062 B2 JPS6366062 B2 JP S6366062B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- melting point
- optical semiconductor
- welded
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000007789 sealing Methods 0.000 claims abstract description 38
- 239000004065 semiconductor Substances 0.000 claims abstract description 31
- 230000008018 melting Effects 0.000 claims abstract description 27
- 238000002844 melting Methods 0.000 claims abstract description 27
- 230000003287 optical effect Effects 0.000 claims abstract description 20
- 238000005219 brazing Methods 0.000 claims abstract description 13
- 239000000463 material Substances 0.000 claims abstract description 13
- 238000003466 welding Methods 0.000 claims abstract description 3
- 239000005355 lead glass Substances 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 150000002739 metals Chemical class 0.000 claims description 2
- 239000000945 filler Substances 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 abstract description 20
- RHZWSUVWRRXEJF-UHFFFAOYSA-N indium tin Chemical compound [In].[Sn] RHZWSUVWRRXEJF-UHFFFAOYSA-N 0.000 abstract description 9
- 239000005018 casein Substances 0.000 abstract description 4
- BECPQYXYKAMYBN-UHFFFAOYSA-N casein, tech. Chemical compound NCCCCC(C(O)=O)N=C(O)C(CC(O)=O)N=C(O)C(CCC(O)=N)N=C(O)C(CC(C)C)N=C(O)C(CCC(O)=O)N=C(O)C(CC(O)=O)N=C(O)C(CCC(O)=O)N=C(O)C(C(C)O)N=C(O)C(CCC(O)=N)N=C(O)C(CCC(O)=N)N=C(O)C(CCC(O)=N)N=C(O)C(CCC(O)=O)N=C(O)C(CCC(O)=O)N=C(O)C(COP(O)(O)=O)N=C(O)C(CCC(O)=N)N=C(O)C(N)CC1=CC=CC=C1 BECPQYXYKAMYBN-UHFFFAOYSA-N 0.000 abstract description 4
- 235000021240 caseins Nutrition 0.000 abstract description 4
- 238000000034 method Methods 0.000 abstract description 4
- 229910052738 indium Inorganic materials 0.000 abstract description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 2
- 229910001128 Sn alloy Inorganic materials 0.000 abstract description 2
- 239000011261 inert gas Substances 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000010703 silicon Substances 0.000 abstract description 2
- 239000011521 glass Substances 0.000 description 15
- 238000007747 plating Methods 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 229910045601 alloy Inorganic materials 0.000 description 6
- 239000000956 alloy Substances 0.000 description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000000919 ceramic Substances 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- 239000006023 eutectic alloy Substances 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 2
- 239000005394 sealing glass Substances 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- PCEXQRKSUSSDFT-UHFFFAOYSA-N [Mn].[Mo] Chemical compound [Mn].[Mo] PCEXQRKSUSSDFT-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
- BDOSMKKIYDKNTQ-UHFFFAOYSA-N cadmium atom Chemical compound [Cd] BDOSMKKIYDKNTQ-UHFFFAOYSA-N 0.000 description 1
- -1 cadmium bismuth gold Chemical compound 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000005499 meniscus Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02162—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、小型の気密封止型光学半導体装置に
係り、特に半導体素子表面に有機フイルターを有
する光学半導体装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a small hermetically sealed optical semiconductor device, and more particularly to a method for manufacturing an optical semiconductor device having an organic filter on the surface of a semiconductor element.
従来から光学半導体装置に完全な気密封止を達
成することは極めて困難でエポキシ樹脂を、キヤ
ツプガラス板の周辺に塗布して封止する程度であ
つた。又、最近大型のパツケージ及びキヤツプを
用意し、キヤツプガラス板を封止用ガラス及びセ
ラミツクリングを重層し、更にそれを封止ガラス
を用いて、大きな巾を有する金属枠板に重層した
キヤツプ体とした後、その大きな外形に合つた前
記パツケージ本体にシームウエルドする方法が開
発された。しかしながら、これは使用する目的が
小型のビデオカメラが主体であるため大きな寸法
ではカメラレンズを大きくしたりビデオカメラ自
体も大きくしなければならない欠点があつた。
又、一方半導体装置のリード間の規格も満足させ
なければ、使用上特別のプリント基板やICソケ
ツトを作らなければならず極めて使用しにくいも
のであつた。 Conventionally, it has been extremely difficult to achieve complete hermetic sealing in optical semiconductor devices, and the only way to achieve this is to apply epoxy resin around the periphery of a cap glass plate for sealing. Recently, large packages and caps have been prepared, and a cap glass plate is layered with sealing glass and a ceramic ring, which is then layered on a metal frame plate with a large width using sealing glass. After that, a method was developed to seam weld the package to the package body to fit the large external shape. However, since this is mainly used for small-sized video cameras, it has the disadvantage that larger dimensions require a larger camera lens or larger video camera itself.
On the other hand, unless the specifications between the leads of the semiconductor device were satisfied, a special printed circuit board and IC socket had to be made for use, making it extremely difficult to use.
本発明は全く別の封止技術を開発することによ
りこれらの問題を一拠に解決した。 The present invention solves these problems by developing a completely different sealing technology.
本発明の特徴は、封止枠片面と透光板間は低融
点鉛ガラスを、又前記封止枠他面には200℃以下
の融点のろう材を溶着した光学半導体装置用キヤ
ツプと、光学半導体装置をダイマウント,ツイヤ
リングしたキヤビテイ部周辺に、200℃以下の融
点を有するろう材を溶着したパツケージを、該ろ
う材同士を溶着することによつて封止する半導体
装置の製造方法にある。そして、キヤツプ封止枠
片面にアルミニウム,チタン,タンタル層を形成
した後に低融点鉛ガラスで透光板と溶着したキヤ
ツプを用いることが好ましい。 The present invention is characterized by a cap for an optical semiconductor device, in which a low melting point lead glass is welded between one side of the sealing frame and the transparent plate, and a brazing material with a melting point of 200°C or less is welded to the other side of the sealing frame; A method of manufacturing a semiconductor device includes sealing a package in which a brazing material having a melting point of 200°C or less is welded around a cavity portion in which a semiconductor device is die-mounted and twisted, by welding the brazing material to each other. . It is preferable to use a cap in which an aluminum, titanium, or tantalum layer is formed on one side of the cap sealing frame and then welded to a transparent plate using low melting point lead glass.
このような製造方法によれば封止の良好な半導
体装置が実現される。 According to such a manufacturing method, a semiconductor device with good sealing can be realized.
以下、本発明実施例を図を用いて説明する。第
1図から第6図は本発明実施例に用いるキヤツプ
部品断面図である。第1図において1は透過性の
すぐれたポロシリケートガラス板である。このガ
ラス板には商品名、コーニング7059とか、セラミ
ツク系としてサフアイヤガラスや石英ガラスも用
いられる。2は低融点鉛ガラスで封止温度は350
℃から450℃程度のものを用いる。しかしながら
本発明の場合には、特に、2次元イメージセンサ
の如き有機フイルターを使用した半導体装置の封
止を行うため、350℃以上もの温度での封止は不
可能で、200℃以下でないと有機フイルターが変
性してしまい、光学半導体装置としては使えな
い。従つて、本発明半導体装置を構成するために
は以下に述べる構造にまで追加の処理が必要であ
る。第2図は、第3図,第4図に示す如き表面処
理が行われた、パツケージキヤビテイ寸法よりひ
とまわり水法が大きい封止補助枠3の断面図であ
る。第3図は、封止補助枠3′の表面処理構造を
示したもので、4は0.5mm厚、0.8mm巾のコバー合
金枠で、3面には下地ニツケルメツキ5が0.5〜
4μm厚、金又は銀メツキが0.3〜1μm厚に形成さ
れている。枠3′が一面で表面処理されていない
理由は、この面に前述のガラス板1が低融点鉛ガ
ラス2で融着されやすくするためである。ガラス
板1と封止補助枠3′との融着部の密着性は、気
密封止において極めて重要なことで、この部分の
密着性を向上させた実施例が、第4図に示すもの
である。同図において7は42合金枠、8は錫メツ
キ、9はアルミニウムである。アルミニウムは、
低融点鉛ガラスとの融着性が、チタンやタンタル
と同程度にすぐれている。封止補助枠3″はあら
かじめ0.5〜10μm厚のアルミニウムを片面、蒸着
又はクラツド法により42合金枠に設けた後に、打
抜き加工を行つたものである。錫メツキは、ガラ
ス板1を低融点ガラス2を用いて、封止補助枠
3″に融着してから行う方が望ましいが、あらか
じめつけておいても問題はない。尚、錫メツキ
は、他のカドミウムや亜鉛や錫鉛メツキでも代用
可能であるし、アルミニウム以外に、チタンやタ
ンタルを蒸着、スパツタ法等で代用しても良いこ
とは明らかである。第5図は封止補助枠3と、ガ
ラス板1とを低融点ガラスで融着した状態を示し
た断面図である。第6図は封止用低融点半田10
をろう付けしたキヤツプ11の断面図である。封
止用低融点半田10は光学半導体装置上面素子部
上に設けられるカゼイン製有極フイルター又はエ
ポキシ等の有機接着剤を使用するガラスフイルタ
ーは、有機物を使用している関係上、耐熱性がな
く200℃以下に選定する必要がある。又低温側は、
使用用途が特殊なものを除いて一般のビデオカメ
ラや認識装置であるので100℃程度の温度保証を
する必要上、選定すべき半田の融点は100℃〜200
℃になる。これに適応する半田又は金属は多くあ
り、基本的にはどれを採用しても問題にならな
い。例えば、インジウムやインジウム錫合金、イ
ンジウム錫、鉛、合金、他、ガリウム、カドミウ
ムビスマス金,銀を含んでいても良い。このよう
な例の中から、例えばインジウム55%残錫合金を
使用すれば、キヤツプ11は350℃程度の窒素ガ
ス中であらかじめ半田10をろう付けして形成出
来る。同様に光学半導体装置素子を塔載する前の
パツケージにインジウム錫半田をろう付けし、そ
の後に光学半導体装置素子を組み込んだものの断
面図が第7図に示してある。同図において、12
はアルミナセラミツクパツケージ、13はアルミ
ナステム、14は配線メタライズ、15は外部リ
ード、16はパツケージ13のキヤビテイ周辺に
設けられた、半田付け用メタライズで、タングス
テン又はモリブデンマンガン等をスクリーン印刷
焼成して表面にニツケルメツキ、金メツキ又はニ
ツケルメツキ,錫メツキが形成されている。17
は、前述の方法でろう付けしたインジウム錫半田
である。18は光学半導体装置素子で、シリコン
チツプ19上にカゼイン有機フイルター20を有
している構造となつている。あるいは、チツプ1
9上にクロム又はカゼイン等のフイルターを表面
に有するガラスフイルターをエポキシやシリコー
ンで接着したものである。21は銀ペースト又は
ダイマウント用合金、22は接続線である。この
ような有機フイルター付き光学半導体装置素子を
含むパツケージ12に第6図に示したキヤツプ1
1を不活性ガス中で、低融点半田を融着する150
℃〜200℃にして圧着すれば、有機フイルター2
0は何の損障を受けることなく気密封止が完成さ
れる。第8図には気密封止の完了した光学半導体
装置の断面図が示してある。キヤツプ11とパツ
ケージ12の低融点インジウム錫半田部10及び
17はお互にとけ合つて一体の封止半田部23と
なつている。この低融点半田は、例えば10,1
7がインジウム錫共晶合金とすると、融点は127
℃なので、封止温度が150℃程度であれば十分に
とけ合うし又、10がインジウム錫共晶合金で、
11が錫鉛共晶合金とすると、160℃程度の温度
で十分にとけ合うことが確認出来た。第9図に
は、他のセラミツクDIPタイプのパツケージで更
に気密封止の向上を計つた実施例が示してある。
又、第10図には、セラミツクチツプキヤリヤー
型のパツケージでの実施例が示してある。これら
においては共にパツケージのキヤビテイ周辺に、
メタライズと封止枠を設け、該封止枠の内側壁又
は、枠上面までも半田が回り込んで封止長を長く
して気密性を上昇するように設計されている。第
9図,封止枠24にはろう材25が枠24の上面
まで半田が濡れている。第10図封止枠29には
ろう材30が枠29の内側面上面までメニスカス
状半田が濡れている。これらの図から明らかなよ
うに、キヤツプ封止補助枠3は、封止枠24,2
9よりも高さが高い方が半田封止時にメニスカス
が出来やすく、封止性の向上に役立つている。 Embodiments of the present invention will be described below with reference to the drawings. 1 to 6 are cross-sectional views of cap parts used in embodiments of the present invention. In FIG. 1, 1 is a porosilicate glass plate with excellent transparency. The product name for this glass plate is Corning 7059, and ceramics such as sapphire glass and quartz glass are also used. 2 is low melting point lead glass and the sealing temperature is 350
Use one with a temperature between ℃ and 450℃. However, in the case of the present invention, in particular, since semiconductor devices using organic filters such as two-dimensional image sensors are sealed, it is impossible to seal them at temperatures of 350°C or higher; The filter is denatured and cannot be used as an optical semiconductor device. Therefore, in order to construct the semiconductor device of the present invention, additional processing is required even for the structure described below. FIG. 2 is a sectional view of the auxiliary sealing frame 3, which has been subjected to the surface treatment as shown in FIGS. 3 and 4, and has a diameter slightly larger than the package cavity dimension. Fig. 3 shows the surface treatment structure of the auxiliary sealing frame 3'. 4 is a cover alloy frame with a thickness of 0.5 mm and a width of 0.8 mm, and a base nickel plating 5 of 0.5 to 0.5 mm is coated on three sides.
4 μm thick, gold or silver plating is formed 0.3 to 1 μm thick. The reason why the frame 3' is not surface-treated on one side is to make it easier for the above-mentioned glass plate 1 to be fused to this surface with the low melting point lead glass 2. The adhesion of the fused portion between the glass plate 1 and the auxiliary sealing frame 3' is extremely important for airtight sealing, and an example in which the adhesion of this part is improved is shown in Fig. 4. be. In the figure, 7 is a 42 alloy frame, 8 is tin plating, and 9 is aluminum. Aluminum is
Its fusion properties with low melting point lead glass are as good as those of titanium and tantalum. The auxiliary sealing frame 3'' is made by applying aluminum with a thickness of 0.5 to 10 μm on one side to a 42 alloy frame by vapor deposition or cladding, and then punching it out.For tin plating, the glass plate 1 is made of low melting point glass. Although it is preferable to do this after fusion-bonding it to the auxiliary sealing frame 3'' by using 2, there is no problem in attaching it in advance. It is clear that tin plating can be replaced with other cadmium, zinc, or tin-lead plating, and titanium or tantalum can also be used in place of aluminum by vapor deposition, sputtering, or the like. FIG. 5 is a sectional view showing a state in which the auxiliary sealing frame 3 and the glass plate 1 are fused together using low melting point glass. Figure 6 shows low melting point solder 10 for sealing.
FIG. 2 is a cross-sectional view of a cap 11 that has been brazed. The low melting point solder 10 for sealing is a casein polarized filter provided on the upper element part of the optical semiconductor device or a glass filter using an organic adhesive such as epoxy, which does not have heat resistance because it uses an organic substance. It is necessary to select a temperature below 200℃. Also, on the low temperature side,
Since these are general video cameras and recognition devices, excluding those with special uses, it is necessary to guarantee a temperature of about 100℃, so the melting point of the solder that should be selected is between 100℃ and 200℃.
It becomes ℃. There are many solders or metals that can be used for this purpose, and basically it does not matter which one is used. For example, it may contain indium, indium tin alloy, indium tin, lead, alloy, gallium, cadmium bismuth gold, and silver. Among these examples, if an alloy of 55% indium and tin is used, the cap 11 can be formed by brazing the solder 10 in advance in nitrogen gas at about 350°C. Similarly, FIG. 7 shows a cross-sectional view of a package in which indium tin solder is brazed to a package before mounting an optical semiconductor device element thereon, and then the optical semiconductor device element is assembled therein. In the same figure, 12
13 is an alumina ceramic package, 13 is an alumina stem, 14 is a wiring metallization, 15 is an external lead, 16 is a metallization for soldering provided around the cavity of the package 13, and the surface is made by screen printing and baking tungsten or molybdenum manganese, etc. Nickel plating, gold plating, nickel plating, and tin plating are formed on the surface. 17
is indium tin solder brazed using the method described above. Reference numeral 18 denotes an optical semiconductor device element, which has a structure including a casein organic filter 20 on a silicon chip 19. Or chip 1
9, a glass filter having a chromium or casein filter on its surface is adhered with epoxy or silicone. 21 is a silver paste or die mounting alloy, and 22 is a connecting wire. A cap 1 shown in FIG. 6 is attached to a package 12 containing such an optical semiconductor device element with an organic filter.
1 in an inert gas to fuse low melting point solder 150
If you press the temperature between ℃ and 200℃, organic filter 2
0, hermetic sealing is completed without any damage. FIG. 8 shows a cross-sectional view of the optical semiconductor device that has been hermetically sealed. The low melting point indium tin solder parts 10 and 17 of the cap 11 and the package 12 are melted together to form an integral sealing solder part 23. This low melting point solder is, for example, 10,1
If 7 is an indium-tin eutectic alloy, the melting point is 127
℃, so if the sealing temperature is around 150℃, it will melt sufficiently, and 10 is an indium-tin eutectic alloy,
When No. 11 is a tin-lead eutectic alloy, it was confirmed that they can be sufficiently melted at a temperature of about 160°C. FIG. 9 shows an embodiment of another ceramic DIP type package in which the hermetic sealing is further improved.
FIG. 10 shows an embodiment using a ceramic chip carrier type package. In both of these, around the cavity of the package,
It is designed so that metallization and a sealing frame are provided, and the solder wraps around the inner wall of the sealing frame or even the top surface of the frame to lengthen the sealing length and improve airtightness. In FIG. 9, the solder material 25 is wetted with solder up to the upper surface of the sealing frame 24. In the sealing frame 29 shown in FIG. 10, the brazing material 30 is wetted with meniscus-shaped solder up to the upper surface of the inner surface of the frame 29. As is clear from these figures, the cap sealing auxiliary frame 3 is connected to the sealing frames 24, 2.
When the height is higher than 9, a meniscus is more likely to form during solder sealing, which helps improve sealing performance.
以上のように、有機フイルター部を有する光学
半導体装置の気密性は、低融点鉛ガラスと、低融
点半田とを組み合わせた状態で、極めて合理的に
得られ、半導体装置の信頼性は十分得られる丈で
なく、極めてコンパクトなパツケージを有する半
導体装置となる。 As described above, the airtightness of an optical semiconductor device having an organic filter part can be obtained in a very rational manner by combining low melting point lead glass and low melting point solder, and sufficient reliability of the semiconductor device can be obtained. This results in a semiconductor device having an extremely compact package.
第1図〜第6図は各々本発明に用いるキヤツプ
断面図、第7図〜第10図は各々本発明実施例の
断面図である。
なお図において、1……ガラス板、2……低融
点ガラス、3,3′,3″……封止補助枠、11…
…キヤツプ、12,26……セラミツクパツケー
ジ、18……光学半導体チツプ、10,17,2
3,25,30……封止半田材、24,29……
封止枠、である。
1 to 6 are sectional views of caps used in the present invention, and FIGS. 7 to 10 are sectional views of embodiments of the present invention. In the figure, 1...Glass plate, 2...Low melting point glass, 3, 3', 3''...Sealing auxiliary frame, 11...
... Cap, 12, 26 ... Ceramic package, 18 ... Optical semiconductor chip, 10, 17, 2
3, 25, 30... sealing solder material, 24, 29...
It is a sealing frame.
Claims (1)
又前記封止枠他面には200℃以下の融点のろう材
を溶着した光学半導体装置用キヤツプと、光学半
導体装置をダイマウント、ワイヤリングしたキヤ
ビテイ部周辺に、200℃以下の融点を有するろう
材を溶着したパツケージとを、該ろう材同士を溶
着することによつて封止することを特徴とする半
導体装置の製造方法。1. Use low melting point lead glass between one side of the sealing frame and the transparent plate.
In addition, on the other side of the sealing frame, there is a cap for an optical semiconductor device welded with a brazing material having a melting point of 200°C or less, and a brazing material having a melting point of 200°C or less is placed around the cavity portion where the optical semiconductor device is die-mounted and wired. 1. A method of manufacturing a semiconductor device, comprising: sealing a package by welding the brazing filler metals together.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11913383A JPS6010757A (en) | 1983-06-30 | 1983-06-30 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11913383A JPS6010757A (en) | 1983-06-30 | 1983-06-30 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6010757A JPS6010757A (en) | 1985-01-19 |
JPS6366062B2 true JPS6366062B2 (en) | 1988-12-19 |
Family
ID=14753750
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11913383A Granted JPS6010757A (en) | 1983-06-30 | 1983-06-30 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6010757A (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7607560B2 (en) * | 2004-05-14 | 2009-10-27 | Intevac, Inc. | Semiconductor die attachment for high vacuum tubes |
JP2015018873A (en) * | 2013-07-09 | 2015-01-29 | 日機装株式会社 | Semiconductor module |
JP6294418B2 (en) * | 2016-09-01 | 2018-03-14 | 日機装株式会社 | Optical semiconductor device and method of manufacturing optical semiconductor device |
JPWO2020022278A1 (en) * | 2018-07-27 | 2021-08-05 | Agc株式会社 | Optical package |
-
1983
- 1983-06-30 JP JP11913383A patent/JPS6010757A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6010757A (en) | 1985-01-19 |
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