JPS59149450A - Time-division multiplex data transmission system - Google Patents

Abstract

PURPOSE:To shorten a data transmission time by converting one data pulse train of plural data pulse trains into a M code and generating a specific pulse train at a changing point of the other data train and superposing a redundancy code upon the M code. CONSTITUTION:When data strings A and B are multiplexed, the data string A is converted into an M-code data pulse train A' and changing points of the data string from 1 to 0 and from 0 to 1 are detected to generate a pulse train B'. The pulse train B' is extended by 1/2 bit length when generated corresponding to the pulse train A' to form a redundancy pattern, and thus multiplex data C is generated and sent out. A pulse train D is generated at a level change part of the data C on a reception side and regarded as a trigger to generate sampling pulses E for the pulse train. By using the rise of a pulse E, the data C is sampled to obtain a signal of a pulse train A'' corresponding to the pulse train A. Further, a pulse train F having the interpolated pulse train D is generated from the pulse train E to sample the data C, obtaining a pulse train B'' corresponding to the pulse train B.

Description

Detailed Description of the Invention (1) Technical Field of the Invention The present invention relates to time division multiplexed data transmission of digital data in which at least two different types of digital data are time division multiplexed and transmitted over one line. It is related to the method.

(2) Problems with conventional technology Conventionally, when transmitting two different types of digital data over one line by time-division multiplexing, one
One data string and another data string were switched for each piece of data and transmitted over a single line.

For example, FIG. 1 shows a data transmission system according to the prior art, in which one data string (1) and another data string (2) are
The data transmission time was set to τ (seconds), and the data was switched every τ and transmitted to one line. However, in this conventional method, the total data transmission time is the sum of the transmission times of data string (1) and other data strings (2), as shown in (3) of the same figure. Ta.

In other words, when trying to transmit 9 data as a data string (1) and a data string (2), 9τ - 9
This means that a transmission time of τ=18τ is required. In other words, it takes twice as long to transmit two pieces of data with similar configurations as it does for one piece of data. Furthermore, even in cases where it is desired to receive only either data stream (1) or data stream (2), a complex demodulator compatible with the 1 time division system is required.

(3) Purpose of the Invention The present invention solves the above-mentioned problems by significantly shortening the data transmission time and, for example, when it is desired to receive only one of two data streams. It is an object of the present invention to provide a time division multiplexed data transmission system for data that can be used by an M code demodulator.

(4) Embodiments of the Invention Before describing detailed embodiments of the invention, the principle of the invention will be briefly explained. FIG. 2 shows the transmission method of this embodiment.

In the figure, data string (1) and data string (2) are superimposed, and attention is paid to the part where data string (2) is reversed from "1" to "0" and vice versa. Multiplexed data is generated as follows. By doing this, the transmission time of the data string (1) is the same as before, but the transmission time of the data string (2) is only a short time in the longest case, and the data string (2) is changed from "0" to rlJ. And the less the change in data from rlJ to rOJ, the shorter the transmission time, and the total time required to transmit data strings (1) and (2) is.

1.0 of the transmission time when transmitting only data string (1)
~1.5 times is sufficient.

3(A)tB) are waveform diagrams for explaining the generation and demodulation of multiplexed data according to the present invention.
The method of the present invention will be explained in detail.

In FIG. 3, pulse trains A and B are the original data to be multiplexed. First, pulse train A is set to M like X.
For code conversion (Manchester code) L and eta pulse train B, create a pulse train like B' by paying attention to the change from '1' (H level) to '0' (L level) or from 0 to III. ( (Data B is not converted to M code.) Note that the pulse train λ converted to 2M code includes a clock signal component.

Now, quadratic multiplexed data C is generated from the thus converted pulse train λ, 100, and information about the pulse trains A and B is included therein.

The generation procedure will be explained using the generation rule diagram of Fig. 4.

First, a pulse train C is generated based on a pulse train B' generated from a pulse train B without 2M code conversion. That is, when the pulse train B' is generated, the pulse train X is extended by the bit length to provide a redundant pattern. For example, in the 1 year old 4 figure, in a time slot where there is no pulse in pulp train B', the shape of pulse train
If the pulse train C in the figure is used, and there are pulses in the pulse train B, extend the pulse train A' by the length of the bit and add a redundant code to make the pulse train C in the figure. The portion of the pulse train C shown in bold in FIG. 3 indicates the time when the pulse train B' is extended by 4 bits. In this way, nine multiplexed data C according to the present invention are generated.

Next, the principle of demodulating pulse trains X and B' corresponding to the original pulse trains A and B from the multiplexed pulse train C will be explained with reference to FIG.

First, focusing on the level change part of pulse train C,
B1 Generate a pulse train as shown in the diagram, and use this D as a trigger pulse for a monostable circuit to generate a pulse train A. (7) Sampling pulse train E is generated. Then, if the above multiplexed pulse train C and the above generated pulse train E are input to the ACl (AC asynchronous communication interface adapter) (described later) which is in the receiving mode, the multiplexed pulse train C will be generated at the rising edge of the pulse train E. To be sampled, a signal output of pulse train X corresponding to pulse train A is obtained.

Next, to obtain pulse train B', pulse train F is generated from pulse train E, and multiplexed pulse train C is sampled using pulse train F as a sampling pulse. Note that the pulse train F may be considered to be in a relationship obtained by interpolating the pulse train. Therefore, from the result of sampling multiplexed data C using pulse train F, pulse train B' corresponding to pulse train B
is obtained.

Incidentally, at this time, the pulse train E is also used as a reference signal, which will be further described with reference to FIG.

That is, in FIG. 5, in the procedure for generating the pulse train B', the rising edge of the fLffth pulse E from the start of pulse generation always coincides with some rising edge of the pulse F, and this is taken as the rising edge. And E.

Considering the timing of each rise of and E-.

(1) If En+l and p, , +z match, it is assumed that there is no change in the level of pulse train B, and En+1 and Fm+
3, it is assumed that there is a level change in pulse train B.

(2) Fm, Fm+t + Fm+ 2 noAter
How to know the change by performing y comparison.

Various methods can be considered. In one embodiment of the present invention, demodulation using method (2) is considered. In other words, the sampling of pulse train C' (same as pulse train C) in tree 3 is F
Consider sampling points Fm+ Fm+ s and Fm+ 2 starting with the pulse indicated by the thick line in the pulse train.

Consider the sample result Rm+ Rm+1 r Rm+2. As shown in Fig. 5, the results are as shown in Figure 5.
l, R? It can be seen that there are eight patterns for 7L+2.

Therefore, if there is no change in the level of pulse train B corresponding to the four patterns, and if there is a change in the level of pulse train B corresponding to the other four patterns, the state can be detected using an address decoder, etc. By doing this, the level change of pulse train B can be known, so a demodulated pulse train corresponding to pulse train B can be obtained.In the above case, pulse train B' is initially set to the same level as pulse train B, and , pulse train Fm is a pulse train, E
Make sure to set it at the same timing as the rise of %.

Next, FIG. 6 shows the configuration of a multiplexing device that realizes generation of multiplexed pulse train C from pulse trains A and B shown in FIG. 3, and its operation will be explained. In the multiplexing device shown in Figure 6, 1 and 2 are asynchronous communication interface adapters (hereinafter referred to as ACIA) for pulse trains A and B (for example, MC6850 from Motorola, USA), 3 and 4 are shift registers for them, 5 and 6 7 is a clock control circuit, 8 is a clock generation circuit, 9 is a redundant pattern generation circuit, and 10 is an M code conversion/redundant pattern addition circuit.

In operation, the pulse train A shown in FIG.
The data is once shifted to the shift register 3 via the . Then, the data Dn to be sent and the data D%+1 to be sent next are sent to the data discrimination circuit 5, and the combination state thereof is judged there. In that case, what are the possible combinations of the data Dn v DtL+1 to be sent?

(L, L), (L, H), (H, L), (H, H) 4
This result is supplied to the M code conversion/redundant pattern addition circuit 10 to generate an M code, and is also notified to the redundant pattern generation circuit 9.

On the other hand, the pulse train B is also once shifted to the shift register 9 via the ACIA 2, and then the level states, which are the contents of the data Dm, D, +t to be sent, are sent to the data discrimination circuit 6 in the same way as before. It's there. In the redundant pattern generation circuit 9, the two sent data discrimination circuits 5 and 6
As explained in connection with FIG. 4, a predetermined redundant pattern is generated based on the information from the 2M code converter and redundant pattern adding circuit 10, and the 2M code converter/redundant pattern adding circuit 10 generates a pattern in which pulse train B is superimposed on pulse train A. A multiplexed pulse train C is generated and output from the output terminal P1.

In addition, in order to prevent the output timing of the sending data and the timing of the input data pulse trains A and B from collapsing due to the presence or absence of redundancy, a clock control circuit 7 is provided to adjust the read timing of the input pulse trains A and B. do.

For example, if a redundant pattern exists, the output data transmission timing is extended so that it no longer matches the input pulse train, so it is necessary to temporarily stop reading the input pattern during that time.

Next, the specific configuration and operation of the apparatus for demodulating pulse trains N and B' corresponding to the original pulse trains A and B from the generated multiplexed pulse train C shown in FIG. 3 will be described.

The off-line diagram shows the configuration of a demodulator that implements the above demodulation. In the demodulator, 11 is a clock edge detection circuit, 12 is an interpolation clock generation circuit, 13 is a data shift register,
14 is a clock generation circuit, 15 is a first pattern discrimination circuit, 16 is a second pattern discrimination circuit, and 17 is a data generation circuit.

Note that +P3 is the output terminal of pulse train C +P4 is pulse train E
The output terminal I P5 indicates the output terminal of the pulse train B'.

In operation, when the multiplexed pulse train C shown in FIG.
The edge is detected by (pulse train D in Figure 3).
The clock generation circuit 14 is controlled by the pulse train, and its output becomes the pulse train E in FIG. Therefore, the output from the interpolation clock generation circuit 12, which is generated based on the output pulse train E, becomes the pulse train F shown in FIG. i3. Therefore, the result of sampling the original signal using the pulse train F is input into the data shift register 13.

Then, the contents of the data shift register 13 to be sent are sent to the fan 1 and the second pattern discrimination circuits 15 and 16.
As explained in connection with FIG. A pulse train B' corresponding to the first pulse train B is obtained.

The second pattern discrimination circuit 16 is used to initialize one circuit 17, for example, when a pulse train A has N p
If there are consecutive H's.

If the data pulse train B is also set in advance to be 11 levels, the determination circuit 16 checks the predetermined pattern (H, L, H in the embodiment) and the number of repetitions thereof (-N), and then the reset signal is can be emitted.

(5) Effects of the invention As described above, in the present invention, the case where two data pulse trains are multiplexed and transmitted and demodulated has been described as an example, but the time required to transmit one data A is independent of the content. However, the time required to transmit other data B can be shortened according to its content, and the longest time for the latter data is the former item.111-I
As can be seen from the fact that the smaller the change in QI or IQI=11g, the shorter the transmission time, and the total time for both data is only 1.0 to 1.5 times the transmission time for one data A. Transmission time can be significantly reduced compared to conventional methods.

Further, when receiving only one data A without requiring the other data B, it is possible to use two ordinary M code demodulators.

9. In the case of the present invention, two cases have been described regarding the data pulse train to be transmitted.

Needless to say, the present invention can also be applied to data pulse trains with larger data pulses.

[Brief explanation of drawings]

FIG. 1 is a diagram explaining a conventional time division multiplex data transmission system, FIG. 2 is a diagram showing the principle of the data transmission system according to the present invention, and FIG.
FIG. 4 is a waveform diagram illustrating the generation of multiplexed data and its demodulation method according to the present invention, FIG. 4 is a diagram illustrating the rules for generating multiplexed data, and FIG. ':A16 shows a specific example of a device that implements the multiplexed data transmission system of the present invention, and an off-line diagram shows a specific example of a device that implements the multiplexed/</resequence sequence demodulation system of the present invention. In the figure, 1 and 2 are ACIA, and 3.4 is shift register t5.
, 6 is a data discrimination circuit, 7 is a clock control circuit, 8 is a clock generation circuit, 9 is a redundant turn generation circuit, and 10 is an M code conversion/redundancy/<turn addition circuit. Patent applicant Alps Electric Co., Ltd.

Claims (1)

[Scope of Claims] At least one data pulse train out of a plurality of data pulse trains to be transmitted is converted into an M code. Regarding the other data pulse train, a predetermined pulse train is generated by paying attention to the level change thereof, and in response to the presence of the pulse train, a redundant code is superimposed on the data pulse train converted into the M code, and multiplex transmission is performed. Multiplexed data transmission method.