JPS59143338A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS59143338A
JPS59143338A JP58017338A JP1733883A JPS59143338A JP S59143338 A JPS59143338 A JP S59143338A JP 58017338 A JP58017338 A JP 58017338A JP 1733883 A JP1733883 A JP 1733883A JP S59143338 A JPS59143338 A JP S59143338A
Authority
JP
Japan
Prior art keywords
circuit
light
light emitting
elements
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58017338A
Other languages
Japanese (ja)
Inventor
Kenichi Kuroda
謙一 黒田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58017338A priority Critical patent/JPS59143338A/en
Publication of JPS59143338A publication Critical patent/JPS59143338A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Abstract

PURPOSE:To obtain a monolithic IC which shortens the time of signal delay and has a high operating speed without the generation of malfunctions by a method wherein a light emitting element and a light receiving element are formed on the same substrate as a semiconductor substrate provided with an IC element, and signal transmission by means of electromagnetic waves is performed therebetween. CONSTITUTION:Input terminals 2a-2c consisting of bonding pads are provided at one end of the substrate 1 of GaAs, etc., and an output terminal 3 of the same structure at the other end, and an internal circuit 4 such as an FET is formed by being positioned therebetween. It is connected to the input terminals and the output terminal via wirings 5a1-5a3 and 5b, respectively. Next, the light receiving elements 6a-6c put in conduction state respectively by light irradiation are connected between the wirings 5a1-5a3 and a power source voltage VCC. The light emitting element 7 is connected between the wiring 5b and the ground point of the circuit. When light signals are made incident from an external light emitting device 10a to the elements 6a-6c in such a constitution, the elements come in conduction state and operates the circuit 4, thus making the element 7 emit light only during this time, and enabling the detection in the light emitting device 10b.

Description

【発明の詳細な説明】 この発明は、半導体集積回路装置に関し、特に集積回路
内部の素子間あるいは内部回路と外部装置との間の信号
の伝達を光によりて行ガえるようKされたモノリシック
集積回路装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit device, and in particular to a monolithic integrated circuit device which is structured so that signals can be transmitted between elements within the integrated circuit or between an internal circuit and an external device using light. Related to circuit devices.

従来、一般に、半導体集積回路はウェーハの段階で、ポ
ンディングパッドにプローブ(針)を当てて回路が正常
な動作を行なうか否かt検査するようにされていた。そ
のため、検査時にプローブによってポンディングパッド
が損傷されてしまうという欠点があった。また、半導体
集積回路の集積度の増加あるいは多ピン化に伴ない、検
査工程における項目がま丁ま丁増加してきている。その
ため、現在一般に行なわれているボンデイングバヴド會
用いた検査方法では、検査時間が大幅に増加されてしま
うとともに、半導体集積回路内の一部の回路の動作情報
を直接得ることはできず、正確な検査が行なえないとい
う問題点があった。
Conventionally, semiconductor integrated circuits have generally been inspected at the wafer stage by applying a probe (needle) to a bonding pad to determine whether the circuit is operating normally. Therefore, there is a drawback that the bonding pad is damaged by the probe during inspection. Further, as the degree of integration of semiconductor integrated circuits increases or the number of pins increases, the number of items in the inspection process is increasing exponentially. For this reason, the currently commonly used testing method using bonding tests significantly increases testing time, and it is not possible to directly obtain operational information of some circuits within a semiconductor integrated circuit. There was a problem that accurate inspection could not be performed.

更に、半導体集積回路装置における信号の伝達は、従来
一般に、集積回路を構成する各素子間の場合には、半導
体チシプ上に形成された多結晶シリコンあるいはアルミ
ニウム等に代表される電気伝導物質全電気配線として用
いることにより、電気信号で行なわれる。
Furthermore, signal transmission in semiconductor integrated circuit devices has conventionally been carried out between each element constituting an integrated circuit using an electrically conductive material such as polycrystalline silicon or aluminum formed on a semiconductor chip. By using it as a wiring, electrical signals are used.

また、半導体集積回路と外部電子装置との間の信号の伝
達は、例えば、ポンディングパッドとリード端子との開
音ワイヤボンディングによシミ気的に接続し、このリー
ド端子と外部の電子装置との間を電気伝導材料で電気的
に結ぶことにより行なわれていた。
In addition, signal transmission between the semiconductor integrated circuit and the external electronic device is achieved by, for example, connecting the bonding pad and the lead terminal with open wire bonding, and connecting the lead terminal with the external electronic device. This was done by electrically connecting them with an electrically conductive material.

しかしながら、このように、半導体集積回路の内部素子
間あるいは外部装置との間の信号伝達を電気配線で行な
うと、電気配線の静電容量および抵抗によって、信号の
伝達に遅延を生ずる。%に、半導体集積回路における集
積度が高くされるに従って、内部配線の長さが相対的に
長くなり、その結果、配線による信号の遅延はますます
大きくされる。例えば、半導体集積回路の内部で信号の
伝達が行なわれる素子同士が比較的離れている場合、近
い素子同士の信号の伝達に比べて、信号の遅延は顕著と
なる。しかも、集積回路内部の電気配線あるいは素子と
の静電容量結合により、近接した配線あるいは素子の信
号の影響を受け、回路が誤動作されるおそれがあった。
However, when signals are transmitted between internal elements of a semiconductor integrated circuit or with external devices using electrical wiring, a delay occurs in signal transmission due to the capacitance and resistance of the electrical wiring. %, as the degree of integration in semiconductor integrated circuits increases, the length of internal wiring becomes relatively longer, and as a result, signal delays due to wiring become increasingly large. For example, when elements that transmit signals within a semiconductor integrated circuit are relatively far apart, the signal delay becomes more significant than when signals are transmitted between elements that are close to each other. Moreover, due to capacitance coupling with electrical wiring or elements within the integrated circuit, there is a risk that the circuit may malfunction due to the influence of signals from nearby wiring or elements.

そこでこの発明は、回路を構成する素子が形成された半
導体基板と同一の基板(チップ)上に発光素子と受光素
子とを形成しておくことによって、外部装置との間で非
接触で信号の伝達が行なえるようにし、これによって、
集積回路の検査工程においてポンディングパッドが損傷
されるのを防止する。また、内部の各回路ごとに検査を
行なうことができ、これによって、検査時間を短縮し、
かつ検査の信頼性を向上させることを目的とする。
Therefore, the present invention has been developed by forming a light emitting element and a light receiving element on the same substrate (chip) as the semiconductor substrate on which the elements constituting the circuit are formed, so that signals can be transmitted without contact with external devices. enable communication, thereby
To prevent a bonding pad from being damaged during an integrated circuit testing process. In addition, each internal circuit can be inspected individually, thereby reducing inspection time and
The purpose is to improve the reliability of testing.

さらに、この発明は、集積回路内の互いに離れたところ
に位置する素子間あるいは回路間で、信号の伝達が放射
線たとえば光のような電磁波によって行なえるようにし
て、信号の遅延時間を短縮させ、動作速度を向上させる
とともに、誤動作を起きにくくさせることを目的とする
Furthermore, the present invention enables signal transmission between elements or circuits located far apart from each other in an integrated circuit using radiation, e.g., electromagnetic waves such as light, thereby reducing signal delay time. The purpose is to improve operating speed and make malfunctions less likely to occur.

以下図面を用いてこの発明を説明する。The present invention will be explained below using the drawings.

第1図は一例として、半導体基板上に形成された受光素
子と発光素子とによって、集積回路と外部装置との間で
信号の伝達を行なうようにして、回路の検葺を非接触で
行なえるようにした実施例を示す。
FIG. 1 shows an example in which signals are transmitted between an integrated circuit and an external device using a light-receiving element and a light-emitting element formed on a semiconductor substrate, so that circuit inspection can be performed without contact. An example will be shown below.

図において、1はGaAs(ガリウム拳ヒ素)半導体の
ような一個の半導体基板である。2a〜2Cは、この半
導体基板1上に形成されたポンディングパッドからガる
入力端子、また、3は同様の出力端子である。4は半導
値基板1上に形成されたyIIIT(電界効果型トラン
ジスタ)のような能動素子によシ構成された内部回路で
、この内部回路4は配線5al〜5al および5bを
介して上記入力端子2a〜2Cおよび出力端子3に接続
されている。
In the figure, 1 is a semiconductor substrate such as a GaAs (gallium arsenide) semiconductor. 2a to 2C are input terminals connected to bonding pads formed on the semiconductor substrate 1, and 3 is a similar output terminal. Reference numeral 4 denotes an internal circuit formed on the semiconductor substrate 1 using active elements such as yIIIT (field effect transistor), and this internal circuit 4 receives the above input via wirings 5al to 5al and 5b. It is connected to the terminals 2a to 2C and the output terminal 3.

そして、上記配線5 a 1〜5alと電源電圧v0゜
との間には、光が照射されると導通状態にされる受光素
子6a〜6Cがそれぞれ設けられている。
Light receiving elements 6a to 6C are provided between the wirings 5a1 to 5al and the power supply voltage v0°, respectively, and are made conductive when irradiated with light.

また、配線5bと回路の接地点との間には発光素子7が
設けられている。上記受光素子6a〜60および発光素
子7は公知の半導体製造技術によってGaA9半導体基
板上に、他の回路素子(puT)とともに形成すること
ができる。
Further, a light emitting element 7 is provided between the wiring 5b and the ground point of the circuit. The light receiving elements 6a to 60 and the light emitting element 7 can be formed together with other circuit elements (puT) on a GaA9 semiconductor substrate using known semiconductor manufacturing techniques.

上記回路においては、外部の発光装flOaから上記各
受光素子6a〜60に対し、適当な光信号を入れてやる
と、受光素子6a〜6Cは光が照射されている間だけ導
通状態にされ、配線5a1〜5alに電源電圧v0゜が
供給される。そのため、電源電圧V。0が供給きれた配
線を介して内部回路4にハイレベルの信号が入力される
In the above circuit, when an appropriate optical signal is input from the external light emitting device flOa to each of the light receiving elements 6a to 60, the light receiving elements 6a to 6C are rendered conductive only while being irradiated with light. A power supply voltage v0° is supplied to the wirings 5a1 to 5al. Therefore, the power supply voltage V. A high-level signal is input to the internal circuit 4 through the wiring that has been completely supplied with 0's.

これによって、内部回路4が所定の動作を行なって、出
力がハイレベルにされると、配線5bと接地点との間に
接続された発光素子7が、内部回路4の出力がハイレベ
ルの間だけ光を発する。これを外部の受光装置10bに
よって検出することにより、ポンディングパッド(2a
〜2Cおよび3)にプローブを当てることなく、非接触
で、内部回路4が正常な動作を行なうか否かを検査する
ことができる。その結果、検査時にプローブによってポ
ンディングパッドが損傷されるおそれがなくなる。
As a result, when the internal circuit 4 performs a predetermined operation and the output is set to a high level, the light emitting element 7 connected between the wiring 5b and the ground point lights up while the output of the internal circuit 4 is at a high level. only emits light. By detecting this with the external light receiving device 10b, the bonding pad (2a
It is possible to test whether or not the internal circuit 4 operates normally without contacting 2C and 3) with a probe. As a result, there is no risk that the bonding pad will be damaged by the probe during testing.

次に、本発明を適用して集積回路内部の一部の回路につ
いて動作の正常、異常を判定できるようにされた実施例
を第2図を用いて説明する。
Next, an embodiment in which the present invention is applied to determine whether the operation of some circuits inside an integrated circuit is normal or abnormal will be described with reference to FIG.

図において、2a〜2fは第1図の実施例における入力
端子と同じようにポンディングパッドからなる入力端子
、3は出力端子である。また、4a〜4Cは、それぞれ
別の機能を有する内部回路であり、内部回路4a 、 
4N)と内部回路4Cとは、配線5Q+ 、 5cl 
によって電気的に接続されている。そして、この配線5
c1と5c2 の途中には、−組の受デ素子と発光素子
とからなる信号変換回路8a、Rbがそれぞれ設けられ
ている。
In the figure, 2a to 2f are input terminals consisting of bonding pads like the input terminals in the embodiment of FIG. 1, and 3 is an output terminal. Further, 4a to 4C are internal circuits each having a different function, and internal circuits 4a,
4N) and internal circuit 4C are wiring 5Q+, 5cl
electrically connected by. And this wiring 5
In the middle of c1 and 5c2, signal conversion circuits 8a and Rb each consisting of a negative pair of receiving and receiving elements and a light emitting element are provided.

この信号変換回路8 a、 、 8 bは、各々、上記
配線5cl  + 5ctを介して供給宴ねる内部回路
4a。
These signal conversion circuits 8a, 8b are each supplied with the internal circuit 4a via the wiring 5cl+5ct.

4bの出力信号を、光信号に変換して外部に発振する機
能と、外部から供給される光信号を電気信号に変換して
、内部回路4cへ出力する機能とを有している。
It has the function of converting the output signal of 4b into an optical signal and oscillating it to the outside, and the function of converting the optical signal supplied from the outside into an electric signal and outputting it to the internal circuit 4c.

従って、内部回路4aおよび4bの動作をそれぞれ検査
する場合には、入力端子2a〜2c(又は2d〜2f)
から電気的な入力信号を入れて、信号変換回路8a(又
はFlb’)から発信される信号を、外部装置11によ
って検出して判定すればよい。
Therefore, when inspecting the operation of internal circuits 4a and 4b, input terminals 2a to 2c (or 2d to 2f)
It is sufficient to input an electrical input signal from the signal conversion circuit 8a (or Flb') and detect the signal transmitted from the signal conversion circuit 8a (or Flb') by the external device 11 for determination.

また、内部回路4cの動作を検査する場合には、外部装
置11から基板1上の信号変換回路8F1゜8bに光信
号を入力して内部回路40を動作させ、その出力を電気
信号として出力端子3よシ取り出す。そして、その入力
信号と出力信号との組合せから動作の正常、異常の判定
を行なう。
In addition, when inspecting the operation of the internal circuit 4c, an optical signal is inputted from the external device 11 to the signal conversion circuit 8F1゜8b on the board 1 to operate the internal circuit 40, and the output is sent to the output terminal as an electrical signal. 3. Take it out. Then, it is determined whether the operation is normal or abnormal based on the combination of the input signal and output signal.

このように、第2図の実施例では、入出力用ポンディン
グパッドにプローブを尚てて検査しなければならないが
、従来不可能であった内部回路ごとの検査が簡単に行な
えるようになる。そのため、入力信号の組合せ数が、入
力端子のみからの入カメ5る従来方法に比べてかなり少
なくされ、検査時間が大幅に短縮されるとともに、検査
精度も向上される。
In this way, in the embodiment shown in Fig. 2, the probe must be placed on the input/output pad for inspection, but it is now possible to easily inspect each internal circuit, which was previously impossible. . Therefore, the number of combinations of input signals is considerably reduced compared to the conventional method in which input is made only from input terminals, and inspection time is significantly shortened and inspection accuracy is also improved.

次に、集積回路内の比較的離れた位置に形成されている
素子あるいは回路間で信刊の伝達を行なう場合には、例
えば、2つの素子あるいは回路部にそれぞれ発光素子と
受光素子を設けておく。そして、パッケージ等によシ固
定された光ファイバの両端面を、それぞれ上記発光素子
と受光素子に対向させ、電気信号を光信号に変換して光
フアイバ内を通過させ、再び元の電気信号に変換してや
ることによシ、信号全遅延させることなく伝達してやる
ことができる。
Next, when transmitting a message between elements or circuits formed at relatively distant positions in an integrated circuit, for example, two elements or circuit parts may each be provided with a light emitting element and a light receiving element. put. Then, both end surfaces of the optical fiber fixed by a package etc. are placed to face the above-mentioned light emitting element and light receiving element respectively, and the electric signal is converted into an optical signal and passed through the optical fiber, and is converted back into the original electric signal. By converting, the signal can be transmitted without any delay.

また、別々の半導体基板上に形成はれた相互に関連のあ
る集積回路同士を向い合わせ、その基板上に形成された
発光素子と受光素子が一致されるように位置決めして固
定してやることによシ、信号の伝達を行なえるようにす
ることも可能である。
In addition, by facing mutually related integrated circuits formed on separate semiconductor substrates and positioning and fixing them so that the light-emitting element and light-receiving element formed on the substrates are aligned, It is also possible to enable transmission of signals.

以上説明したように、この発明によれば、集積回路が形
成されている半導体基板の所望の部分に、受光素子ある
いは発光素子を設けるようにしたので、光による非接触
の信号伝達が可能となり、電気配線による信号伝達の一
部を光信号による伝達に置き換えることにより、集積度
の増加に伴なう検査時間の延長を最小にしてやることが
できる。
As explained above, according to the present invention, since the light receiving element or the light emitting element is provided in a desired part of the semiconductor substrate on which the integrated circuit is formed, non-contact signal transmission by light becomes possible. By replacing part of the signal transmission through electrical wiring with optical signal transmission, it is possible to minimize the extension of inspection time that accompanies an increase in the degree of integration.

また、ポンディングパッドを用いないで回路の検査を行
なうことができるのでパヴドの損傷を防止することがで
きる。更に、電気配線における静電容量結合等の誘導現
象のない信号の伝達が可能となり、信号の遅延を減少さ
せ、かつ回路の誤動作を防止することができるという効
果がある。
Further, since the circuit can be tested without using the bonding pad, damage to the pad can be prevented. Furthermore, it is possible to transmit signals without inductive phenomena such as capacitive coupling in electrical wiring, reducing signal delays and preventing circuit malfunctions.

なお、上記実施例では、GaAs半導体基板上に回路素
子とともに発光素子と受光素子を設けるようにしたもの
を説明したが、この発明はe、As半導体に限定される
ものでは々い。
In the above embodiment, a light emitting element and a light receiving element are provided along with a circuit element on a GaAs semiconductor substrate, but the present invention is not limited to e and As semiconductors.

また、信号伝達は光に限定される本のでもない。Also, signal transmission is not limited to light.

例えば、シリコンダイオードはバンドギャップ電圧との
関係で熱線を放射することが知られているので、シリコ
ン半導体基板上に形成されたダイオードによって、電気
信号を熱線信号に変換して信号の伝達を行なうようなこ
とも可能である。
For example, it is known that silicon diodes emit heat rays in relation to the bandgap voltage, so a diode formed on a silicon semiconductor substrate converts an electrical signal into a heat ray signal and transmits the signal. It is also possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る半導体集積回路装置の一実施例を
示す概略構成図、 第2図は本発明の他の実施例を示す概略構成図である。 1・・・半導体基板、2a〜2f・・・入力端子(ポン
ディングパッド)、4,4a、4b、4a・・・内部回
路、6a〜6c・・・信号変換素子(受光素子)、7・
・・信号変換素子(発光素子)。
FIG. 1 is a schematic block diagram showing one embodiment of a semiconductor integrated circuit device according to the present invention, and FIG. 2 is a schematic block diagram showing another embodiment of the present invention. 1... Semiconductor substrate, 2a to 2f... Input terminal (ponding pad), 4, 4a, 4b, 4a... Internal circuit, 6a to 6c... Signal conversion element (light receiving element), 7.
...Signal conversion element (light emitting element).

Claims (1)

【特許請求の範囲】[Claims] 1、能動素子と受動素子もしくはこれらの一方のみから
なる集積回路が形成された半導体基板と同一の基板上に
、放射線信号を受けて電気信号に変換する信号変換素子
と、内部回路の電気信号を放射線信号に変換する信号変
換素子、もしくはこれらの一方の素子のみが形成されて
なることを特徴とする半導体集積回路装置。
1. On the same substrate as the semiconductor substrate on which the integrated circuit consisting of active elements and passive elements or only one of these is formed, there is a signal conversion element that receives radiation signals and converts them into electrical signals, and a signal conversion element that converts the electrical signals of the internal circuit. 1. A semiconductor integrated circuit device comprising only a signal conversion element that converts into a radiation signal, or one of these elements.
JP58017338A 1983-02-07 1983-02-07 Semiconductor integrated circuit device Pending JPS59143338A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58017338A JPS59143338A (en) 1983-02-07 1983-02-07 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58017338A JPS59143338A (en) 1983-02-07 1983-02-07 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS59143338A true JPS59143338A (en) 1984-08-16

Family

ID=11941260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58017338A Pending JPS59143338A (en) 1983-02-07 1983-02-07 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS59143338A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6246541A (en) * 1985-08-23 1987-02-28 Nippon Denshi Zairyo Kk Semiconductor integrated circuit
JPS6258650A (en) * 1985-09-06 1987-03-14 Nippon Denshi Zairyo Kk Noncontact type probe card

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6246541A (en) * 1985-08-23 1987-02-28 Nippon Denshi Zairyo Kk Semiconductor integrated circuit
JPS6258650A (en) * 1985-09-06 1987-03-14 Nippon Denshi Zairyo Kk Noncontact type probe card

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