JPS59139446A - 加算回路 - Google Patents

加算回路

Info

Publication number
JPS59139446A
JPS59139446A JP1344683A JP1344683A JPS59139446A JP S59139446 A JPS59139446 A JP S59139446A JP 1344683 A JP1344683 A JP 1344683A JP 1344683 A JP1344683 A JP 1344683A JP S59139446 A JPS59139446 A JP S59139446A
Authority
JP
Japan
Prior art keywords
input
logic gate
signal
inputs
case
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1344683A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0142431B2 (enrdf_load_stackoverflow
Inventor
Masaru Uya
宇屋 優
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1344683A priority Critical patent/JPS59139446A/ja
Publication of JPS59139446A publication Critical patent/JPS59139446A/ja
Publication of JPH0142431B2 publication Critical patent/JPH0142431B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/501Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/5016Half or full adders, i.e. basic adder cells for one denomination forming at least one of the output signals directly from the minterms of the input signals, i.e. with a minimum number of gate levels

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
JP1344683A 1983-01-28 1983-01-28 加算回路 Granted JPS59139446A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1344683A JPS59139446A (ja) 1983-01-28 1983-01-28 加算回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1344683A JPS59139446A (ja) 1983-01-28 1983-01-28 加算回路

Publications (2)

Publication Number Publication Date
JPS59139446A true JPS59139446A (ja) 1984-08-10
JPH0142431B2 JPH0142431B2 (enrdf_load_stackoverflow) 1989-09-12

Family

ID=11833357

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1344683A Granted JPS59139446A (ja) 1983-01-28 1983-01-28 加算回路

Country Status (1)

Country Link
JP (1) JPS59139446A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4866658A (en) * 1984-09-10 1989-09-12 Raytheon Company High speed full adder

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4866658A (en) * 1984-09-10 1989-09-12 Raytheon Company High speed full adder

Also Published As

Publication number Publication date
JPH0142431B2 (enrdf_load_stackoverflow) 1989-09-12

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