JPS59132651A - Data fixing method of semiconductor memory for reading only - Google Patents

Abstract

PURPOSE:To eliminate any danger doing damage to a gate electrode intending to simplify processes and to improve productivity by a method wherein after forming gate electrodes on gate regions of all transistors on a substrate, a resist perforating only the gate electrode of specified transistor is provided to implant one conductive type ion. CONSTITUTION:Transistor regions 2, 2 to be memory cells and field oxides 3, 3 are formed on one conductive type e.g. P type silicon substrate 1 and reverse conductive type i.e. N<+> type impurity layers 4, 4 are provided in each transistor region 2, 2 and then the field oxide films 3 are coated with a metal with high melting point to be gate electrodes, i.e. Mo. Next after forming gate electrodes 7, 7 by means of etching the metal with high melting point, holes 8, 8 are perforated into the field oxide films 3, 3. Successively overall surface of the substrate 1 is coated with photoresist 9 for exposure and development using specified mask to remove the resist 9 on the electrodes 7 providing implanting holes. In such a condition, doner atom such as P<+> etc. is implanted at high energy of around 150keV.

Description

DETAILED DESCRIPTION OF THE INVENTION A) Industrial Application Field The present invention relates to a data fixing method for a read-only memory in which data is fixed by varying the threshold voltage of a transistor serving as a memory cell by t1 in a semiconductor read-only memory. Regarding.

(1) By varying the threshold voltages of transistors that become memory cells of conventional semiconductor dedicated memory (hereinafter referred to as MM).
As a method for fixing the data of 1' and %□z, the inventor of the present application proposed Japanese Patent Application No. 1982-20369. This data fixing method uses Mo as the gate electrode.

When forming a contact hole made of a high-melting point metal such as Ti, Ta, W, etc., using photolithography technology, a contact hole is formed in the insulating film on the metal gate electrode of the required transistor to establish conduction with the conductive layer above it. At the same time, a hole is opened in the insulating film on the metal gate electrode of the required transistor, and a predetermined ion is implanted through this hole. This method not only provides a high degree of integration, but also significantly shortens the turnaround time since the data is fixed in the second to last mask process.

However, when fixing J-Jy data in the ROM using this method, care must be taken when performing photolithography to avoid damaging the gate metal when removing the insulating film such as the PEG film on the gate metal. I had to pay.

In addition, it is necessary to cover the gate electrode from which the P2O film has been removed with an insulating film again, which shortens the turnaround time but increases the number of manufacturing steps overall.

C) Purpose of the Invention The present invention has been made in view of these problems, and provides a ROM data fixing method that simplifies the entire ROM manufacturing process without the risk of damaging the gate electrode. The purpose is to provide

2) Structure of the Invention The present invention comprises a process of forming a transistor region to serve as a memory cell on a semiconductor substrate, a process of providing a gate electrode on the gate region of this transistor region via a gate oxide film, and a step of forming a required transistor region. It consists of a step of forming a resist with holes only in the gate electrode, and a step of implanting -conductivity type ions.

E) Embodiment FIGS. 1 to 4 are cross-sectional views showing the method for fixing data in a semiconductor ROM according to the present invention in the order of steps, and the present invention will be explained in detail using these figures.

First, using a conventional method, a transistor region * 1 that will become a memory cell is formed on a silicon substrate (1) of one conductivity type, for example, P type.
21 +21... and field oxide film 131 +3
1... and each transistor region 121+21.
An impurity layer of the opposite conductivity type, that is, N type, is placed at a predetermined location in
1141... is provided, and then a high melting point metal (5), such as MO, which will become the gate 1R pole, is deposited to a thickness of about 100 OA, as shown in the fJ1 diagram. At this time, if necessary, acceptor atoms, such as flies, are implanted into all gate regions M 161 +61 . . . to make all transistors of enhancement type.

Next, the high melting point metal is etched and the gate electrode (7
After forming 1+71..., field oxide film (3)
Drill contact holes 181 +81... (second
figure). Next, a photoresist (9) with a thickness of about 1μ is applied to the substrate (
1) Apply to the entire surface (l 31'4), with a prescribed mask (
gate electrode (not shown) of the required transistor region (2) where data is to be changed by exposure tip and development using
7)...The upper resist (9) is removed and an injection hole is provided (FIG. 4). In this state, when donor atoms such as As and P are implanted with high energy of about i 5 Q KeVO, the gate region (
6)..., gate electrode (7)..., gate oxidation N
A sufficient amount of ion implantation is performed through flG. At this time, since the gate electrode is formed of a high melting point metal as described above, it will not be melted and destroyed by the energy of ion implantation. In addition, in the areas covered with resist (9), this resist (9) completely blocks donor atoms,
Donor atoms are not implanted into the gate region (6). The ROM is then completed using conventional processing steps.

In this embodiment, all transistors that become memory cells are initially set to the enhancement type, and later donor atoms are implanted into the gate regions of the required transistors to change the transistors to the depletion type, thereby fixing the data in the ROM. but,
On the contrary, it is also possible to initially set all transistors to the depletion type, and later change them to the enhancement type by injecting acceptor atoms.

f) Effects of the Invention As described above, the data fixing method of the semiconductor read-only memory of the present invention involves forming the gate 11i poles on the gate regions of all the transistors on the substrate, and then forming holes only on the gate electrodes of the required transistors. Since a perforated resist is provided and ions of one conductivity type are implanted at high energy, a sufficient number of ions are implanted into the required gate region through the gate electrode. P 8 G
There is no step of removing ffl or covering the gate electrode with an insulating film again after ion implantation (a data fixing method is provided that does not require a small number of steps throughout the entire ROM manufacturing process, and productivity can be improved. There is no risk of damaging the gate electrode when removing the P2O film on the gate electrode, and a highly reliable product can be provided.

[Brief explanation of the drawing]

1 to 4 are cross-sectional views showing a method for fixing data in a semiconductor read-only memory according to the present invention. (21 (21...transistor region, (5)...high melting point metal, (6)(6)...gate region, +7)17
1...Gate electrode, (9)...Resist. Figure 1 Figure 2 Figure 3 Figure 4 +1i1111

Claims (1)

[Claims] 1) In a method of fixing data by varying the threshold voltages of transistors that become memory cells in a memory dedicated to continuous semiconductor production, after forming gate electrodes on the gate regions of all transistors on the substrate, 1. A data fixing method for a memory dedicated to semiconductor continuous generation, characterized in that a resist with holes is provided only on the gate electrode of a transistor, and ions of a - conductivity type are injected into the required gate region through the gate electrode.