JPS59123279A - Manufacture of photoelectric conversion device - Google Patents
Manufacture of photoelectric conversion deviceInfo
- Publication number
- JPS59123279A JPS59123279A JP57230768A JP23076882A JPS59123279A JP S59123279 A JPS59123279 A JP S59123279A JP 57230768 A JP57230768 A JP 57230768A JP 23076882 A JP23076882 A JP 23076882A JP S59123279 A JPS59123279 A JP S59123279A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- electrode
- photoelectric conversion
- semiconductor
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000004065 semiconductor Substances 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims abstract description 8
- 239000013078 crystal Substances 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims abstract description 7
- 239000011521 glass Substances 0.000 claims description 10
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 9
- 229910001887 tin oxide Inorganic materials 0.000 claims description 8
- 239000007921 spray Substances 0.000 claims description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000007788 liquid Substances 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 150000003606 tin compounds Chemical class 0.000 claims 1
- 102100037676 CCAAT/enhancer-binding protein zeta Human genes 0.000 abstract 1
- 101000880588 Homo sapiens CCAAT/enhancer-binding protein zeta Proteins 0.000 abstract 1
- 239000012808 vapor phase Substances 0.000 description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 5
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- HPGGPRDJHPYFRM-UHFFFAOYSA-J tin(iv) chloride Chemical compound Cl[Sn](Cl)(Cl)Cl HPGGPRDJHPYFRM-UHFFFAOYSA-J 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 230000001443 photoexcitation Effects 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 241000251468 Actinopterygii Species 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- -1 indium oxide tin oxide compound Chemical class 0.000 description 1
- PSCMQHVBLHHWTO-UHFFFAOYSA-K indium(iii) chloride Chemical compound Cl[In](Cl)Cl PSCMQHVBLHHWTO-UHFFFAOYSA-K 0.000 description 1
- 230000005923 long-lasting effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 229910001134 stannide Inorganic materials 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Abstract
Description
【発明の詳細な説明】
本発明は、透光性基板の主面上に透光性導電膜よシなる
第1の電極と、該電極上KP工NまたはPN接合を少な
くとも1つ有する、光照射によシ光起電力を発生する非
単結晶半導体と、該半導体上に第2の電極(裏面電極)
を有する光電変換装置(以下PVOという)K関する。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a first electrode comprising a transparent conductive film on the main surface of a transparent substrate, and at least one KP junction or PN junction on the electrode. A non-single crystal semiconductor that generates photovoltaic force upon irradiation, and a second electrode (back electrode) on the semiconductor.
The present invention relates to a photoelectric conversion device (hereinafter referred to as PVO) K having the following.
本発明はこの透光性基板上の主面に凹凸を有することに
より、その表面積を大きくシ、光に対しては長光旙とな
し、キャリア特にホールに対しては短掲とならしめるこ
とによシ、光照射光面側の光゛iK変換効率を向上させ
ることを目的としている。The present invention provides unevenness on the main surface of the light-transmitting substrate, thereby increasing its surface area, making it long-lasting for light and short for carriers, especially holes. In addition, the purpose is to improve the light iK conversion efficiency on the light irradiation surface side.
本発明はかかる凹凸を有さしめるため、特にその凸部の
高低差を300〜4000X好ましくは800〜200
0Xとし、さらにこの凸部は円形状を有し、その平均直
径は200〜2oooiを有することを特徴としている
。In order to provide such unevenness, the present invention has a height difference of 300 to 4000X, preferably 800 to 2000.
0X, and the convex portion has a circular shape with an average diameter of 200 to 2oooi.
本発明はかかる凸部の延面積/凹部の延面積は0.2〜
5好ましくは0.5〜2であることを目的としている。In the present invention, the total area of the convex portion/the total area of the concave portion is 0.2 to
5, preferably 0.5 to 2.
このようにすることによシ、表面での入射光の乱散孔せ
しめることによシ、透光性基板上の第1の電極を構成す
る透光性導電膜(以下OTFという)と半導体との界面
での反射を少なくシ、加えて基板とCT11′との界面
での反射を少なくすることができる。その結果入射光の
反射量をこれまでの20〜30チより6〜8%Kまで下
げることができるようになシ、そのため変換効率を10
〜15チも向上させることができた。By doing this, the light-transmitting conductive film (hereinafter referred to as OTF) constituting the first electrode on the light-transmitting substrate and the semiconductor can be made to have holes for scattering the incident light on the surface. In addition, reflection at the interface between the substrate and CT 11' can be reduced. As a result, it has become possible to reduce the amount of reflected incident light to 6-8%K compared to the conventional 20-30K, which reduces the conversion efficiency by 10K.
I was able to improve my score by ~15 inches.
さらに本発明は半導体中に入射した光の短波長での量子
効率を向上させることを特徴としている。Furthermore, the present invention is characterized by improving the quantum efficiency of light incident on the semiconductor at short wavelengths.
即ち500nm以下の短波長に対する光路長を長くし、
かつこの光励起で発生した電子・ホール対のうちの一方
特に好ましくはホールのドリフトする拡散長を短くする
ことによシ、キャリアのライフタイムよシ十分短い時間
K OTFを到達せしめることにより、その量子効率を
400nmにて従来の60チ、500nmVcて80チ
であったものを、400nmにて85%、500nmK
て95%にまで高めることができた。その結果変換効率
も15〜20チも従来に比べて高くすることができた0
これらの効果が複合化して従来の構造ではAMl(10
0mW/c m)の照射下で一1慢までしか得られなか
ったものを、−気に’lO〜11.5%Kまで高めるこ
とができた。That is, by increasing the optical path length for short wavelengths of 500 nm or less,
In addition, by shortening the diffusion length of one of the electron-hole pairs generated by this photoexcitation, particularly preferably the hole, the quantum The efficiency was 85% at 400nm and 500nmK compared to the conventional 60chi at 400nm and 80chi at 500nmVc.
We were able to increase this to 95%. As a result, we were able to increase the conversion efficiency by 15 to 20 inches compared to the conventional structure.
Under irradiation of 0 mW/cm), it was possible to increase the temperature up to -11.5%K.
本発明は透光性基板上にマスク材を粒状に形成し、これ
をマスクとして基板をエツチングして凹部を作9、結果
として凸部の平均直径は200〜2000λであってか
つその高低差を300〜4oooi好ましくは800〜
2000大有せしめ、その直径以上を有して繊維状に設
けたものである。In the present invention, a mask material is formed in the form of particles on a transparent substrate, and the substrate is etched using this as a mask to form concave portions9.As a result, the average diameter of the convex portions is 200 to 2000λ and the difference in height is small. 300-4oooi preferably 800-
It has a diameter of 2,000 mm or more and is provided in the form of a fiber.
本発明はかかる目的のため、スプレー法にて酸化スズを
粒状に選択的に形成し、ガラス基板をフッ酸によりエツ
チングしたものである。このためこの凹凸面の作製に従
来の集積回路等で用いられるフォトエツチング工程を用
いることがないため特にこのフt″LでPVOの製造コ
スト高を誘発することがないという製造工程上の大きな
特徴を有する。For this purpose, the present invention involves selectively forming tin oxide into particles by a spray method, and then etching the glass substrate with hydrofluoric acid. Therefore, a major feature of the manufacturing process is that the photoetching process used in conventional integrated circuits, etc., is not used to create this uneven surface, so there is no increase in the manufacturing cost of PVO especially with this foot''L. has.
−ム蒸着法またはスプレー法で1層または2層に形成す
ることが知られている。このOTFをスプレー法で形成
する場合、工TO(酸化インジューム酸化スズ化合物)
(3)を1500〜2000Hの1500〜2000λ
の平均厚さに形成し、さらにこの上面に酸化スズ(4)
を200〜600λの厚さに形成する。するとこのOT
F’の表面は0.2〜0.1μの平均粒径を有する四〇
→、凸(11を構成させることができる。このため半導
体即ちP型半導体例えばS i x O,−、、(Oイ
X<’1) (5)、工廠半導体(6)、N型半導体(
))よシなるP工N接合を有する非単結晶半導体(4)
を積層して設け、さらに第2の電極(8)を形成する時
、入射光(10)を半導体中でal)の如くにΦ・1′
3ことが可能である。- It is known to form one layer or two layers by a vapor deposition method or a spray method. When forming this OTF by a spray method, TO (indium oxide tin oxide compound)
(3) 1500-2000λ of 1500-2000H
tin oxide (4) on the top surface.
is formed to a thickness of 200 to 600λ. Then this OT
The surface of F' can have a convex shape (11) with an average grain size of 0.2 to 0.1 μm. Therefore, a semiconductor, that is, a P-type semiconductor, e.g., S i x O,−, (O iX<'1) (5), factory semiconductor (6), N-type semiconductor (
)) Non-single crystal semiconductor with good P-N junction (4)
When forming the second electrode (8), the incident light (10) is radiated into the semiconductor like Φ・1'
3 things are possible.
その結果半導体中で入射光121)を乱反射させること
ができるため、その特に長波長光を有効に用いることが
できるととが知られている。It is known that as a result, the incident light 121) can be diffusely reflected in the semiconductor, so that particularly long wavelength light can be effectively used.
しかしかかる従来例においては、その工程が単にスプレ
ー法によるヂイポジツションのクラスタでできた凸部表
面を用いるのみのため凹凸表面のなめらかなうろこ状(
電子顕微鏡でみると魚のうろこの如き形状を有するため
うろこ状という)の曲面を有するのみであシ、さらにこ
の形状を積極的r用いることが求められている。However, in such a conventional example, the process simply uses a convex surface made of clusters of positions by spraying, so the uneven surface has a smooth scaly shape (
When viewed under an electron microscope, it has a curved surface similar to that of a fish scale (so called scaly), and there is a need to actively utilize this shape.
かかる従来方法ではその光電変換効率(以下単に効率と
いう)は’7%(’7〜1.9%)までであシ、最高マ
、93チまでし゛か得られなかった。In such a conventional method, the photoelectric conversion efficiency (hereinafter simply referred to as efficiency) was only up to 7% (7 to 1.9%), and the maximum was only 93 cm.
本発明はかかる長波長光を乱反射させることによp 6
00nm以上の長波長光の量子効率を高めるのみではな
く、短波長光を有効に用い、加えて基板−0TF界面、
0TF−半導体界面での屈折率の差による反射を複反射
せしめることによりさらに短隻
のw″1よシ1.5〜IKまで高めたことを特徴として
いる。The present invention provides p6 by diffusely reflecting such long wavelength light.
In addition to increasing the quantum efficiency of long wavelength light of 00 nm or more, it also effectively uses short wavelength light, and in addition, the substrate-0TF interface,
It is characterized by further increasing the short length w''1 to 1.5 to IK by double reflecting the reflection due to the difference in refractive index at the 0TF-semiconductor interface.
特に300〜500nmの短波長光は半導体中で200
0大まで90チ以上が光電変換するが、このうらのキャ
リアであるホールは平坦面電極では40チ以上電極Kま
で到達することができない。即ち光路長(オプティカル
レングスOL)/キャリアの拡散長(ティフュージョン
・レングスDL) a チO/D I においては、
光励起されたキャリアはその光が侵入+’ilf項lコ
−べらな曝(
したと同じ長さを電極まで拡散j)で棲う欧Mにしかし
本発明に詮いてはとのO/D1.5〜7一般には2〜・
4とすることができるため、結果としての300〜50
0nmKおける量子効率を向上させることが可能となつ
令。In particular, short wavelength light of 300 to 500 nm has a wavelength of 200 nm in semiconductors.
Although 90 inches or more are photoelectrically converted up to 0, the holes, which are carriers on the other side, cannot reach the 40 inches or more electrode K with a flat surface electrode. In other words, optical path length (optical length OL)/carrier diffusion length (tiffusion length DL) a tiO/DI,
The photoexcited carriers live in the O/D1 where the light penetrates +'ilf term l coveler exposure (diffuses the same length to the electrode).However, according to the present invention, the O/D1. 5-7 Generally 2-・
4, so the resulting 300-50
It is now possible to improve quantum efficiency at 0 nmK.
第2図は本発明のア■0のたて断面図を示している。図
面において透光性基板(1)はここではガラスを用いた
。さらにこの基板の主面は凸部04、凹部(1ユを有し
、凸部においては円形または円形状の表面を有し、その
直径は200〜2600^好ましくは1000〜150
0Aを有し、また凸部凹部の高低差は300〜400O
A一般には1000〜2000^であった。さらにこの
凸部の上部は半球状を有せしめ、この凸部の端部での被
膜の異常成長を防止した。さらにこの凹凸表面上のOT
F (2)を1500〜200OAの厚さとし、その
表面は酸化スズを主成分としている。FIG. 2 shows a vertical sectional view of A0 of the present invention. In the drawings, glass is used here as the transparent substrate (1). Further, the main surface of this substrate has a convex portion 04 and a concave portion (1 U), and the convex portion has a circular or circular surface, and the diameter thereof is 200 to 2600^ preferably 1000 to 150 mm.
0A, and the height difference between the convex and concave parts is 300~400O
A Generally it was 1000-2000^. Furthermore, the upper part of this convex part was made to have a hemispherical shape to prevent abnormal growth of the coating at the end of this convex part. Furthermore, OT on this uneven surface
F (2) has a thickness of 1500 to 200 OA, and its surface is mainly composed of tin oxide.
さらにこのOTF K密接してプラズマOVD法で得ら
れたP型非単結晶半導体例えば約100λの厚さのS
i x O,−、、<O< X<’1例えばx = 0
.8)’ (5)を有し、この上面をホウ素が10〜1
0 cm添加された工型半導体例えばグロー放電法に
よシ作られた水素またはハロゲン元素が添加されたアモ
ルファスまたはセミアモルファス珪素半導体を0.4〜
O11μの厚さを有し、さらに約100λの厚さのN型
の多結晶または微結晶の珪素半導体(7)よシなる1つ
のP工N接合を有する非単結晶半導体(4)を有し、さ
らにこの上面に電子ビーム蒸着法によシ第2の0TF(
9)例えば工TOを900〜1300λの平均厚さ好ま
しくは1050大の厚さに形成し、その上面の反射用電
極Uつはアルミニュームまたは銀を主成分として設けら
れている。Furthermore, this OTF K is closely attached to a P-type non-single-crystal semiconductor obtained by plasma OVD, for example, S with a thickness of about 100λ.
i x O,-,, <O<X<'1 e.g. x = 0
.. 8)' (5), and the upper surface is covered with 10 to 1 boron.
For example, an amorphous or semi-amorphous silicon semiconductor doped with hydrogen or a halogen element made by a glow discharge method is
a non-monocrystalline semiconductor (4) having one P-N junction, such as an N-type polycrystalline or microcrystalline silicon semiconductor (7) having a thickness of O11μ and further having a thickness of approximately 100λ; , and then a second 0TF (
9) For example, TO is formed to have an average thickness of 900 to 1300 λ, preferably 1050 λ, and the reflective electrode U on the upper surface thereof is provided with aluminum or silver as a main component.
かかる構造において得られた特性を第1図の従来構造と
比較すると以下の如くである。The characteristics obtained in this structure are compared with the conventional structure shown in FIG. 1 as follows.
従来例 本発明
開放電圧(V) 0.84 0.92短絡電流
(mA/c m) 15゜3 19゜8曲線因子
(%)61゜7 〜6日、Q変換効率(%)
7゜9312゜O’7上記効率は面積1゜05 c m
L(3゜5mmX3cm)gおいてAM 1 (100
mW/c m)の照射光を照射した場合の特性である。Conventional example Invention open circuit voltage (V) 0.84 0.92 Short circuit current (mA/cm) 15°3 19°8 Fill factor (%) 61°7 ~6 days, Q conversion efficiency (%)
7゜9312゜O'7 The above efficiency has an area of 1゜05 cm
AM 1 (100
This is the characteristic when irradiated with irradiation light of mW/cm).
このことよシ、本発明においては従来よシも50%もそ
の効率を向上させることができるという大きな特徴を有
する。In view of this, the present invention has the great feature of being able to improve efficiency by 50% compared to the conventional method.
第3図は本発明の効果を示す概要である。FIG. 3 is a summary showing the effects of the present invention.
図面においてガラス基板(1)の凸部α→、凹部α転O
T F (2)、P層(5)、1層(6)、N層(7)
よシなるP工N接合を有する半導体(4)裏面電極(8
)を有する。In the drawing, the convex part α → and the concave part α turn O of the glass substrate (1)
T F (2), P layer (5), 1 layer (6), N layer (7)
Semiconductor with good P-N junction (4) Back electrode (8
).
図面において入射光(1ののうぢ0うは基板−0TF界
面にて反射−するが、再び他のガラス−〇TF界面に至
シ、その結果再び外部に反射させることなく ab、鱒
と半導体中に93−以上の光が入射してしまう。即ち反
射は大気−ガラス界面のに)のみに実質的にすることが
できる。In the drawing, the incident light (No. 93 or more light enters into the glass, ie, reflection can be effected only at the air-glass interface.
また入射光(1アの場合、ガラス−0TF界面で−の反
射を有するため、これが反射光として残シ、いずれにし
ても従来例に比べてその反射率をきわめて少なくできる
のは明らかである。Furthermore, since the incident light (1A) has - reflection at the glass-0TF interface, this remains as reflected light.In any case, it is clear that the reflectance can be extremely reduced compared to the conventional example.
に入りこんでしまう。I get into it.
また半導体中では光励起によって発生した電子αへホー
ル(1′I)において、それは凹部a4の中央部(ト)
を通って(最も電子にとって最も安定な−t 4itf
L−’V)第2の電極(8)K至る。電子は拡散長が
ホールに比べて1000倍もあるため、1層(6)が0
.3〜0゜8μ例えば0.5μあってもそのドリフトは
問題ない。In addition, in a semiconductor, a hole (1'I) to an electron α generated by photoexcitation is located at the center (t) of the recess a4.
(the most stable for electrons -t 4itf
L-'V) to the second electrode (8)K. Since the diffusion length of electrons is 1000 times longer than that of holes, one layer (6) is 0.
.. Even if it is 3 to 0°8μ, for example 0.5μ, there is no problem with the drift.
他方電子の1/1000程度しかないホールはそのドリ
フト距離が(ロ)とOTFのすぐ近くにあるため、結果
として再結合中心に捕獲され消滅することがまぬがれる
。このためoL/DL21特に2〜10とする本発明は
きイめて重要なものであることがわかる。On the other hand, holes, which are only about 1/1000 of electrons, have a drift distance (b) that is very close to the OTF, and as a result, they are prevented from being captured by the recombination center and annihilated. For this reason, it can be seen that the present invention, in which oL/DL21 is particularly set to 2 to 10, is extremely important.
さらにこの基板での凹凸の表面がプラズマOVDまたは
LPOVDで作られる半導体(4)の表面(半導体(7
) −電極(8)界面)をも合わせて凹凸を誘発し、こ
の凹凸面が200〜2000Xもの高低差を有するため
、裏面での長波長光α喧の反射光(ハ)もその光路を長
くすることができる。このため裏面電極界面ですことが
できる。特に600nm以上の長波長光をよ)長時間(
長光路)半導体中にとじこめておくことができ、長波長
領域での量子効率の向上を促すことができた。Furthermore, the uneven surface of this substrate is the surface of the semiconductor (4) made by plasma OVD or LPOVD (semiconductor (7)
) - electrode (8) interface) to induce unevenness, and since this uneven surface has a height difference of 200 to 2000X, the reflected light (c) of long wavelength light α on the back surface also lengthens its optical path. can do. Therefore, it can be done at the back electrode interface. Especially for long wavelength light of 600nm or more) for a long time (
(Long optical path) It was possible to confine it in a semiconductor, and it was possible to promote improvement of quantum efficiency in the long wavelength region.
この主面として金属を用いず0TIII’のみとすると
長波長光を裏面に放出せしめることができ、この裏面上
方に太陽熱利用の装置を併用することが他の重要な応用
である。If no metal is used as the main surface and only 0TIII' is used, long-wavelength light can be emitted to the back surface, and another important application is to use a solar heat utilization device above the back surface.
この長波長光に関しては、第2図に示す如く、裏面電極
をOTFと反射用電極とすることによ)さらにその反射
効率を高めることができるのは当然である。Regarding this long wavelength light, it is natural that the reflection efficiency can be further improved by using the back electrode as an OTF and a reflecting electrode as shown in FIG.
第4図は本発明のpvaを作るための製造工程を示した
ものである。FIG. 4 shows the manufacturing process for making the PVA of the present invention.
図面での工程を記すO
g4図(4)はガラス基板例えば白板ガラス厚さ1゜2
mmを用いた。この上面にスプレー法にて塩化スズを島
状に形成した。この塩化スズは空気中で450〜600
°C例えば500°Cで30分〜2時間焼成した。する
とこのスズ化物は安定外酸化スズに変成し、基板(1)
主面上に島状のクラスタ状(ハ)を形成せしめた。この
クラスタは直径200人〜0.5μを有し、その一部は
島が連続していてもよい。Figure (4) shows the process in the drawing.
mm was used. Tin chloride was formed into islands on the upper surface by a spray method. This tin chloride has a concentration of 450 to 600 in the air.
It was baked at 500°C for 30 minutes to 2 hours. Then, this stannide metamorphoses into stable tin oxide and forms the substrate (1).
Island-like clusters (c) were formed on the main surface. This cluster has a diameter of 200 to 0.5μ, some of which may be continuous islands.
かくすることによシ酸化スズマスクを作った。In this way, a tin oxide mask was made.
どのマスクはシランとアンモニアと(Z’) ’700
〜800°Cの温度での気相法によシ窒化珪素を島状に
形成させることも有効でおる。この気相法は大気圧で行
ない、クラスタ構造を作ってもよ込。Which mask is made with silane and ammonia (Z') '700
It is also effective to form silicon nitride into islands by a vapor phase method at a temperature of ~800°C. This gas phase method is performed at atmospheric pressure and can create a cluster structure.
またこのマスク材については、シランのみを気相法で作
シ、シリコンを島状に形成させることも有効である。か
くして島状のマスク(ハ)を酸化スズ窒化珪素または珪
素で形成させた。Regarding this mask material, it is also effective to produce only silane by a vapor phase method and form silicon into islands. In this way, an island-shaped mask (c) was formed of tin oxide, silicon nitride, or silicon.
この後このマスクを有する基板をフッ酸中に浸とうした
。この浸とうけガラスのエツチングを選択的に行なうこ
とによシ繊維状の凸部を有せしめることができた。かく
してこのエツチング時間を5〜25分と制御することに
よシ、凹凸部の高低差を300〜400OA例えば20
00iとした。さらにこの後マスク材をO′F++02
のプラズマエツチングまたはフッ酸−硫酸混合液にて除
去した0さらにガラスを1/10に水で希釈したフッ酸
で軽くエツチングし、凸部の端部を曲面とし凸部を半球
状とした。Thereafter, the substrate with this mask was immersed in hydrofluoric acid. By selectively etching the immersed glass, it was possible to form fibrous convex portions. Thus, by controlling the etching time to 5 to 25 minutes, the difference in height of the uneven portion can be reduced to 300 to 400 OA, for example, 20 OA.
It was set to 00i. Furthermore, after this, apply the mask material to O'F++02.
The glass was then etched lightly with hydrofluoric acid diluted to 1/10 with water to make the ends of the protrusions curved and hemispherical.
さらにこの上面に第4図φ)で示す如く、第1のOT
F(2)を電子ビーム蒸着法またはプラズマ気相法によ
し形成した。例えばプラズマ気相法においては、塩化イ
ンジュームと塩化スズとを酸化物気体と互いに反応炉内
に導入して、13゜56MHzのプラズマ反応で0.0
5〜1tOrrの圧力にて行ない、1000−2000
^の膜厚に形成した。さらにこの形成膜を真空中で30
0〜500°Cで加熱し、さらにとの工TOの上面K
200〜500^の厚さに酸化スズを主成分とするOT
Fを減圧気相法にて形成せしめた。Furthermore, as shown in FIG. 4 φ) on this upper surface, the first OT
F(2) was formed using an electron beam evaporation method or a plasma vapor phase method. For example, in the plasma vapor phase method, indium chloride and tin chloride are mutually introduced into a reactor together with an oxide gas, and a plasma reaction of 13° 56 MHz results in 0.0
Performed at a pressure of 5 to 1 tOrr, 1000 to 2000
It was formed to a film thickness of ^. Furthermore, this formed film was heated in vacuum for 30 minutes.
Heat at 0 to 500°C, and then
OT whose main component is tin oxide with a thickness of 200~500^
F was formed by a reduced pressure gas phase method.
このOTFの形成にはOF、Brを含有したSnO〜を
酸化物気体とともに450〜600°0例えば500°
0で1〜3 t o r rで1000〜2500^の
厚さに形成してもよいO
さらにこの後第4図(0)に示す如く、プラズマ気相法
によシ、シランとメタンとによp F31xO,−イ(
o<x<x)を形成した。さらK B7H,を0.5〜
IPPM添加してシランを公金・クプラズマ気相法で0
.4〜0.8μ例えば0.5μの厚さに形成した。この
時は曲線を有し、その高低差は1oooi近きになって
いた。さらKN型半導体をPFvB i H,=’1
%。To form this OTF, OF, SnO~ containing Br, is heated at 450 to 600°0, for example, 500°, together with an oxide gas.
It may be formed to a thickness of 1000 to 2500^ at 0 and 1 to 3 t o r r.Furthermore, as shown in Fig. 4 (0), silane and methane are formed by a plasma vapor phase method. Yop F31xO, -i (
o<x<x). Sara K B7H, 0.5~
IPPM is added and silane is removed by public money/kuplasma vapor phase method.
.. It is formed to have a thickness of 4 to 0.8 microns, for example 0.5 microns. At this time, it had a curved line, and the difference in height was nearly 1 oooi. Furthermore, the KN type semiconductor is PFvB i H,='1
%.
5IVH210としてプラズマ気相法で作った。5IVH210 by plasma vapor phase method.
この後第2の0TF(9)を1Toを公知の電子ビーム
蒸着法で900−1300^例えば平均1o5oiの厚
さに形成させた。さらに反射用のアルミニュームを主成
分とする電極(1つを真空蒸着法によシOVD法によシ
形成させた。Thereafter, a second 0TF (9) was formed using a known electron beam evaporation method to have a thickness of 900-1300^, for example, 1o5oi on average. Furthermore, an electrode (one of which was formed by a vacuum evaporation method and an OVD method) mainly composed of aluminum for reflection was formed.
かくの如くにして第4図(0)の構造を得た。In this manner, the structure shown in FIG. 4(0) was obtained.
この第4図(0)で得られた特性を第2図に対応して示
しである〇
以上の説明よシ明らかな如く、透光性基板上に島状マス
クを形成し、はらにこのマスクを用いて基板を選択的に
エツチングすることによシ、入射光面側に凹凸面を有せ
しめることができた0本発明においてP工Nを1つ有す
る半導体ではなくP工NP工Ne1・P工N接合を有す
るタンデム構造としても有効である。The characteristics obtained in FIG. 4 (0) are shown in correspondence with FIG. By selectively etching the substrate using a substrate, it was possible to have an uneven surface on the side of the incident light surface. It is also effective as a tandem structure with an N junction.
また半導体はプラズマ気相法による珪素を主成分とする
弁単結晶#−尋体とした。しかし5iXGe+−((0
<X < 1) S i X S nH−x (0<
X < ’l) S 1jN4−x (3どX<、4)
としてもよい。Further, the semiconductor was made into a valve single-crystal body made of silicon as a main component by plasma vapor phase method. However, 5iXGe+-((0
<X < 1) S i X S nH-x (0 <
X <'l) S 1jN4-x (3doX<, 4)
You can also use it as
以上の説明よシ明らかなように、本発明は透光性基板と
して0.5〜3mmの厚さのガラス板を用いた。しかし
この基板として1〜10μの厚さの可曲性のガラス(石
英)を用いても有効である。さらにこの基板として透光
性のポリイミド、ポリアミド等の有機樹脂であってもよ
い。As is clear from the above description, the present invention uses a glass plate with a thickness of 0.5 to 3 mm as a transparent substrate. However, it is also effective to use flexible glass (quartz) with a thickness of 1 to 10 microns as the substrate. Furthermore, this substrate may be made of a transparent organic resin such as polyimide or polyamide.
第1図は従来の光電変換装置のたて断面図を示す。 第2図は本発明の光電変換装置を示す。 第3図は本発明の別の光電変換装置を示す。 第4図は本発明の光電変換装置の作製方法を示*1図 FIG. 1 shows a vertical sectional view of a conventional photoelectric conversion device. FIG. 2 shows a photoelectric conversion device of the present invention. FIG. 3 shows another photoelectric conversion device of the present invention. Figure 4 shows the method for manufacturing the photoelectric conversion device of the present invention *Figure 1
Claims (1)
工程と、前記基板を選択的にエツチングして凹凸表面を
形成する工程と、該凹凸表面上に透光性導電膜を有する
第1の電極を形成する工程と、PiNまたはPN接合を
少々くとも1つ有する非単結晶半導体を形成する工程と
、該半導体上に第2の電極を形成する工程とを有するこ
とを特徴とする光電変換装1、置作製方法。 2、特許;:l’j求の範囲第1項において、ガラスを
主成分とする透光性基板上にスプレー法にてスズ化物を
形成し、酸化雰囲気にて加熱焼成して酸化スズをマスク
材を形成する工程と、前記基板を酸素液体にて選択的に
エツチングをして四部を形成する工程とを有することを
特徴とする光電変換装置作製方法。[Scope of Claims] 1. A step of selectively forming a granular mask material on a light-transmitting substrate, a step of selectively etching the substrate to form an uneven surface, and a step of forming a light-transmitting mask material on the uneven surface. a step of forming a first electrode having a conductive film; a step of forming a non-single crystal semiconductor having at least one PiN or PN junction; and a step of forming a second electrode on the semiconductor. A photoelectric conversion device 1 and a method for manufacturing the device. 2. Patent;:l'j In the first item, a tin compound is formed by a spray method on a transparent substrate mainly composed of glass, and the tin oxide is masked by heating and baking in an oxidizing atmosphere. 1. A method for manufacturing a photoelectric conversion device, comprising the steps of: forming a material; and selectively etching the substrate with an oxygen liquid to form four parts.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57230768A JPS59123279A (en) | 1982-12-28 | 1982-12-28 | Manufacture of photoelectric conversion device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57230768A JPS59123279A (en) | 1982-12-28 | 1982-12-28 | Manufacture of photoelectric conversion device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59123279A true JPS59123279A (en) | 1984-07-17 |
Family
ID=16912954
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57230768A Pending JPS59123279A (en) | 1982-12-28 | 1982-12-28 | Manufacture of photoelectric conversion device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59123279A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5102832A (en) * | 1991-02-11 | 1992-04-07 | Micron Technology, Inc. | Methods for texturizing polysilicon |
US5244842A (en) * | 1991-12-17 | 1993-09-14 | Micron Technology, Inc. | Method of increasing capacitance by surface roughening in semiconductor wafer processing |
US5248621A (en) * | 1990-10-23 | 1993-09-28 | Canon Kabushiki Kaisha | Method for producing solar cell devices of crystalline material |
US5466626A (en) * | 1993-12-16 | 1995-11-14 | International Business Machines Corporation | Micro mask comprising agglomerated material |
USRE35420E (en) * | 1991-02-11 | 1997-01-07 | Micron Technology, Inc. | Method of increasing capacitance by surface roughening in semiconductor wafer processing |
DE10229231A1 (en) * | 2002-06-28 | 2004-01-15 | Osram Opto Semiconductors Gmbh | Radiation-emitting and/or -receiving semiconductor chip used in LEDs has a radiation coupling and/or decoupling microstructure arranged in a material layer of the semiconductor chip using a mask material which dampens the material layer |
JP2005510884A (en) * | 2001-11-29 | 2005-04-21 | オリジン エナジー ソーラー ピーティーワイ リミテッド | Semiconductor texturing process |
JP2009117503A (en) * | 2007-11-05 | 2009-05-28 | Mitsubishi Electric Corp | Method of roughening substrate and method of manufacturing photoelectromotive force device using the same |
DE112010002936T5 (en) | 2009-07-14 | 2012-09-20 | Mitsubishi Electric Corporation | A method of roughening a substrate surface, a method of manufacturing a photovoltaic device, and a photovoltaic device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55105382A (en) * | 1979-02-05 | 1980-08-12 | Ibm | Method of roughening surface of silicon substrate |
JPS5749278A (en) * | 1980-09-08 | 1982-03-23 | Mitsubishi Electric Corp | Amorphous silicone solar cell |
-
1982
- 1982-12-28 JP JP57230768A patent/JPS59123279A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55105382A (en) * | 1979-02-05 | 1980-08-12 | Ibm | Method of roughening surface of silicon substrate |
JPS5749278A (en) * | 1980-09-08 | 1982-03-23 | Mitsubishi Electric Corp | Amorphous silicone solar cell |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5248621A (en) * | 1990-10-23 | 1993-09-28 | Canon Kabushiki Kaisha | Method for producing solar cell devices of crystalline material |
US5102832A (en) * | 1991-02-11 | 1992-04-07 | Micron Technology, Inc. | Methods for texturizing polysilicon |
USRE35420E (en) * | 1991-02-11 | 1997-01-07 | Micron Technology, Inc. | Method of increasing capacitance by surface roughening in semiconductor wafer processing |
US5244842A (en) * | 1991-12-17 | 1993-09-14 | Micron Technology, Inc. | Method of increasing capacitance by surface roughening in semiconductor wafer processing |
US6074926A (en) * | 1991-12-17 | 2000-06-13 | Micron Technology, Inc. | Method of increasing capacitance by surface roughening in semiconductor wafer processing |
US5466626A (en) * | 1993-12-16 | 1995-11-14 | International Business Machines Corporation | Micro mask comprising agglomerated material |
JP2005510884A (en) * | 2001-11-29 | 2005-04-21 | オリジン エナジー ソーラー ピーティーワイ リミテッド | Semiconductor texturing process |
DE10229231A1 (en) * | 2002-06-28 | 2004-01-15 | Osram Opto Semiconductors Gmbh | Radiation-emitting and/or -receiving semiconductor chip used in LEDs has a radiation coupling and/or decoupling microstructure arranged in a material layer of the semiconductor chip using a mask material which dampens the material layer |
DE10229231B4 (en) * | 2002-06-28 | 2005-03-17 | Osram Opto Semiconductors Gmbh | A method of manufacturing a radiation emitting and / or receiving semiconductor chip having a radiation input and / or output microstructure |
DE10229231B9 (en) * | 2002-06-28 | 2006-05-11 | Osram Opto Semiconductors Gmbh | A method of manufacturing a radiation emitting and / or receiving semiconductor chip having a radiation input and / or output microstructure |
JP2009117503A (en) * | 2007-11-05 | 2009-05-28 | Mitsubishi Electric Corp | Method of roughening substrate and method of manufacturing photoelectromotive force device using the same |
DE112010002936T5 (en) | 2009-07-14 | 2012-09-20 | Mitsubishi Electric Corporation | A method of roughening a substrate surface, a method of manufacturing a photovoltaic device, and a photovoltaic device |
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