JPS5912024B2 - thyristor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thyristor, particularly a thyristor with an auxiliary thyristor.

An example of a conventional thyristor is shown in FIG.

Figure A is a sectional view, and Figure A is a plan view. The thyristor shown in FIG. 1 has, for example, a first semiconductor region 11 of P conductivity type, a second semiconductor region 12 of N conductivity type, a third semiconductor region 13 of P conductivity type, and a third semiconductor region 13 in this third semiconductor region. It consists of a main emitter region 14 and an auxiliary emitter region 15, both of Nf conductivity type, formed from the surface thereof,
The electrode 15' of the auxiliary emitter region extends over the third semiconductor region in such a way that this region is short-circuited with the third semiconductor region on the side facing the main emitter region. 14' is called a cathode and is an electrode of the main emitter region 14;
0 In this example, no extension onto the third semiconductor region is shown on the side opposite the auxiliary emitter region.

Reference numeral 13' denotes an electrode called a gate, which is independently provided in the third semiconductor region on the side opposite to the main emitter region of the auxiliary emitter region.

On the outside of the first semiconductor region 11, an electrode 11', which is made of tungsten and is called an anode, is provided over the entire area via a layer 15 of aluminum 11''.This thyristor is formed as follows.

In FIG. 1, potassium is diffused onto both surfaces of the N-conductivity type 20 silicon wafer 12, which will become the second semiconductor region, to form first and third P-conductivity type regions 11 and 13. A glass mask for exposure is applied from the surface into the third P conductivity type region 13 to form the main emitter region 14 and the auxiliary emitter region 1.
In each case, an N+ conductive 25 type region is formed by selectively diffusing phosphorus, for example. Thereafter, a tungsten anode 11' is installed on the surface of the first P conductivity type region 11 via an aluminum foil 11'' by non-rectifying alloying, and both main and auxiliary N conductivity type emitters are placed on the surface of the first P conductivity type region 11. 30
Aluminum is vapor-deposited on the surface of the third P conductivity type region 13 including the ivy region, and this aluminum is selectively etched with a mask to install the gate 13' and the electrode 15' of the main emitter 14ζ auxiliary emitter region. .

35 In this thyristor, when the gate and cathode are forward-biased, a starting gate current of usually several 100 mA first turns on the auxiliary thyristor whose auxiliary emitter region is the cathode-side emitter region, causing a turn-on current of several to several tens of amperes to flow.

Next, the large turn-on current of this auxiliary thyristor acts as a gate current for the main thyristor whose main emitter region is the cathode side emitter region. For example, a gate current of several hundred MA is expanded to a gate current of several tens of amperes. Therefore, the substantial gate current injected into the main emitter region becomes large, and if this is uniformly distributed in the main emitter region facing the auxiliary emitter region, a gate current of several hundred MA is sequentially applied to the opposing region of each main thyristor. Since the initial conduction region of the main thyristor is expanded when the main thyristor is turned on, the DVdt resistance can be improved and so-called hot spot destruction can be prevented. What is important in this case is that the distance Δx between the electrode of the auxiliary emitter region and the opposing main emitter region must be uniform throughout. △x
If they are uneven, the turn-on current of the auxiliary thyristor cannot transfer to the main thyristor and be uniformly distributed. As a result, the gate current to the main thyristor is biased and only a portion of the main thyristor is turned on by an extremely large gate current, causing an extremely large Di/Dt to flow and causing a hot spot in this area, making it impossible to prevent destruction. . The final, selective etching of the electrodes in the gate, main emitter and auxiliary emitter regions of the manufacturing process described above determines the uniformity of the aforementioned Δx in the thyristor.

The etching mask used in this selective etching is either a metal mask that covers the etched area and a wax mask that is sprayed onto the areas where each electrode is to be installed, or a photoresist mask that covers the areas where the electrodes are to be formed using a photo-etching method. Or apply an acid-resistant tape mask. A photoresist mask is used to obtain mask position accuracy with these masks, but in the case of high power devices such as thyristors that have a thick aluminum evaporated layer, the main emitter region is placed on the third semiconductor region in advance. It is difficult to read the positioning markers formed at the same time as the positioning markers, and the process is complicated. In the soubre method or the tape method, the mask position is determined by visual measurement, so it is difficult to obtain accurate mask positioning. Therefore, uniformity of Δx is difficult to obtain in this selective etching process, which has the drawback of causing variations in the amount of Di/DttJf. The present invention provides an improved thyristor that eliminates these drawbacks.

In other words, the first, second and third semiconductor regions, which have different conductivity types and are adjacent to each other with a bonding surface formed at the interface, and the third semiconductor region from the surface in the third semiconductor region have different conductivity types. a main emitter region and an auxiliary emitter region formed independently with different emitter regions, a current flow regulating layer formed between opposing emitter regions and having the same conductivity type as these emitter regions, and a third semiconductor region. a gate electrode formed;
A main emitter electrode that short-circuits a third semiconductor region farthest from the gate electrode and the main emitter region, and only connects the auxiliary emitter region, the current flow regulating layer, and the third semiconductor region that is continuous therebetween. This is a thyristor equipped with an auxiliary emitter electrode. An embodiment of the present invention will be described below with reference to FIG.

FIG. 2A is a sectional view, and FIG. 2A is a plan view. Figure 2 is A and both figures are drawn corresponding to Figure 1 A, Mouth, and the number attached to the leader line is equal to the number used in Figure 1 A, Mouth. It is synonymous when Therefore, the difference lies in the presence of a current flow regulating layer 26 and an electrode 256 provided across this current flow regulating layer and the auxiliary emitter region. In the case of the current thyristor, the current flow regulating layer 26 can be added to the mask pattern of the main emitter region 14 and the auxiliary emitter region 15, for example, in a selective diffusion process, and can be formed by diffusion at the same time.
Both the main and auxiliary emitter regions must be located in opposing regions and independently arranged. For example, in FIG. 2, after gallium is diffused on both surfaces of an N-conductivity type silicon wafer 22 that will become the second semiconductor region to form first and third P-conductivity regions 21 and 23, a third P-conductivity region is formed. For example, phosphorus is selectively diffused from the surface into the mold region, and at the same time, the main emitter region 24, the auxiliary emitter region 25, and the current flow path regulating layer 2 are formed.
6 can be formed. At this time, the mask pattern must be such that the current flow regulating layer can be formed independently in the opposing gap so as to serve as a blocking wall between both emitter regions. In accordance with this requirement, the current flow path regulating layer 26 in FIG. 2 is provided with sufficient planar expansion. Also, the etched pattern of aluminum deposited to form electrodes on both emitter regions and the side where the current flow regulating layer is distributed is the gate 23', the main emitter 2
4', the current regulating layer is provided with an electrode 256 that does not extend into the third semiconductor region on the side opposite the main emitter region short-circuited to the auxiliary emitter region;
This part has the same structure as the Chausette emitter,
The distance △x between the main emitter region and the current flow regulating layer is uniform throughout, and an excessive current does not flow into the main thyristor, and there is no variation in Di/Dt withstand capability, and the present invention does not cause false ignition and has excellent characteristics. In such a diffused thyristor of this invention, the first
The Δx mentioned in the example is replaced in FIG. 2 by the distance between the current flow regulating layer and the main emitter region.

This is because when the auxiliary thyristor is turned on by the starting gate current in the same way as the example thyristor in Figure 1, this turn-off current approaches the current flow regulating layer whose depth is controlled with the same precision as the main emitter region. The current flows through the third semiconductor region with a constant lateral resistance, and then flows between the constant current flow regulating layer and the main emitter region to turn on the main thyristor. This interval ΔX depends on the manufacturing accuracy of the photo glass mask used in the selective diffusion, and since this mask accuracy is obtained within ±1.0 μm, there is almost no difference between positions or pellets. Therefore, the lateral resistance between the gate and the main emitter region is constant and does not vary depending on the position. FIG. 3 shows another embodiment of the invention. The numbers attached to the leader lines in FIG. 3 have the same meaning as the numbers used in FIG. 2 when the numbers in the first digit are the same. The one in FIG. 3 is a center gate type, in which a gate 33' is provided in the center, and a ring-shaped auxiliary emitter region 35, a current flow path regulating layer 36, a main emitter region 34, an auxiliary emitter region and a current flow path. An electrode 356 that short-circuits the regulation layer and a main emitter electrode 34' are formed. Since this thyristor is turned on from the center of the main emitter region, the turn-on time TOn for turning on the entire surface is shortened, and the good symmetry improves heat dissipation. As described above, the thyristor of the present invention has good characteristics and is industrially useful.

[Brief explanation of the drawing]

Fig. 1 shows a conventional thyristor, A is a sectional view, Fig. 2 is a plan view, and Fig. 2 is an embodiment of the present invention, A is a sectional view, A is a plan view, and Fig. 2 is a sectional view. FIG. 3 is a sectional view of another embodiment of the invention. 21, 31... first semiconductor region, 22, 32...
... second semiconductor region, 23, 33 ... third semiconductor region, 24, 34 ... main emitter region, 25, 35 ... auxiliary emitter region, 26,3
6...Current flow path regulation layer, 23', 33t...
...Gate electrode, 24', 34'...Main emitter electrode, 256,356...Auxiliary emitter electrode.

Claims (1)

[Claims] 1. Each of the first, second and third semiconductor regions having different conductivity types and adjacent to each other with a bonding surface formed at the interface, and the third semiconductor region from the surface in the third semiconductor region have conductivity types. a main emitter region and an auxiliary emitter region formed independently with different emitter regions, a current flow regulating layer formed between opposing emitter regions and having the same conductivity type as these emitter regions, and a third semiconductor region. a gate electrode to be formed; a main emitter electrode that short-circuits the main emitter region and a third semiconductor region that is farthest from the gate electrode; A thyristor comprising an auxiliary emitter electrode that connects only three semiconductor regions.