JPS59119747A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To contrive to improve the manufacturing yield and the reliability of a device by using an inorganic insulation film for a plating mask at the time of forming a bump. CONSTITUTION:An Al wiring pad 3 is provided, via an SiO2 film 2, on an Si substrate 1 finished in element formation, covered with a PSG4, window is opened 5, and a Ti 6 and Pd7 are successively adhered, thus forming an alloying blocking layer 8. Next, the mask of the inorganic insulation film 9 such as PSG is provided by a CVD method, and a window 10 is superposed on the window 5. The main surface is covered with a resist 11, and the back surface is polished, then the resist is removed, and the Au bump 12 is formed, with the film 8 as a cathode, by using an Au plating bath. At this time, the plating mask of the inorganic inorganic insulation film 9 has withstand voltage higher than that of Au plating solution, and cracks do not generate during plating treatment for a long time. The devce is completed by removing the mask 9 by etching and successively removing the Pd7 and the Ti6 by etching. Since the substrate is polished before forming the pump, the cracks of the substrate decrease, and the plating solution does not infiltrate into an undesired part, resulting, in the improvement of the yield and the reliability.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor chip having a metal panda mounted on a tape carrier type semiconductor device or the like.

(b) Prior Art and Problems The metal bumps made of gold (Au) or the like in the semiconductor chip described above are formed by electroplating through a mask film having d-holes over the bump formation region.

Conventionally, a resist film has been used as a mask during the electroplating described above, but the conventional manufacturing method using the resist film as a plating mask has the following problems (1) and (2). Ta.

(1) Because the resist film has low resistance to ordinary A11 plating solutions whose main ingredients are cyanide gold potash, etc., the mask may crack during plating9, and the plating solution may seep through the cracks, resulting in failure. Gold adheres to necessary locations, causing electrical leakage and lowering manufacturing yield and reliability.

(2) Semiconductor chips are formed to a predetermined thickness by grinding the back surface of the substrate. Since 7II must be performed after the bump is completed, the unevenness formed on the main surface side by the bump increases substrate cracking during back grinding, reducing manufacturing yields t and b.0 In addition, the above problem As pointed out in point 2), the reason why the back side of the substrate must be ground after the bumps are completed is that after forming a plating mask made of resist, a thick protective resist film is formed on the main surface, and the back side is ground. This is because it is difficult to perform grinding and then peel off only the resist film for protecting the main surface to expose the plating mask made of resist. After finishing the back grinding, it is also possible to form an opening in the main surface protection resist film to expose the bump formation area and use the main surface protection resist film as a plating mask. In this case, the main surface protection resist film ij 20
In addition to being formed as thick as ~30 [μm], the alignment accuracy between the groove forming area and the opening is insufficient due to warpage caused by grinding, making it impractical.

(C) Purpose of the Invention The present invention provides a method of manufacturing a semiconductor device equipped with metal bumps, in which an inorganic insulating film is used as a plating mask when forming the bumps, and the object thereof is to The aim is to eliminate the above-mentioned problems and improve the manufacturing yield and reliability of the semiconductor device.

(d) Structure of the Invention That is, the present invention is a method for manufacturing a semiconductor device having metal bumps, in which a semiconductor substrate is formed with a surface protection insulating film having a first opening exposing a wiring pad portion. on the main surface,
forming a conductive film for alloying prevention, forming a plating mask film made of an inorganic insulating film on the conductive film and having a second opening exposing the upper region of the first opening; The main surface is covered with a resist film, the back side of the semiconductor substrate is ground, the resist film is removed, and the alloyed ischemic conductor film exposed in the second opening of the plating mask film is covered with a resist film. It is characterized by comprising a step of forming a metal bump using an electroplating method, removing the plating mask film, and selectively etching away the exposed area of the conductive film for alloying prevention using the metal bump as a mask. shall be.

(e) Embodiment of the Invention The present invention will be described in detail with reference to an embodiment of the present invention with reference to process cross-sectional views shown in FIGS. 1 to 6. Areas are represented by the same symbol.

When forming a semiconductor chip having gold (Au) bumps by the method of the present invention, an interlayer insulating film 2 is disposed on a semiconductor substrate 1 on which elements (not shown) have been formed. A surface protection insulating film made of phosphosilicate glass (PSG) or the like is formed on the main surface of a normal substrate to be processed, on which aluminum wiring (not shown) and aluminum (Az) wiring pads 3 are arranged. 4, first, by using a normal photolithography technique, a first opening 5 is formed to expose the surface of the area where the Au bump on the surface of the At wiring board 3 is to be mounted. (FIG. 1) Reference) Next, using a normal sputtering technique, a layer with a thickness of, for example, 3000 [
:^] titanium (Ti) layer 6 and thickness 3000
A conductor film 8 for alloying prevention is formed of a palladium (Pd 2 ) layer 7 of about [8]. The conductive film for alloying prevention is made of titanium nitride (TiN) with a thickness of about 100 [λ].
It may also be formed by a film.

(See Figure 2) Next, a plating mask film consisting of an inorganic insulating film 9 of eg cinsilicate glass (PEG), silicon dioxide (SiOz), etc. is formed on the main surface by using the usual chemical vapor deposition (CVD) method. Then, a second opening is formed in the inorganic insulating film 9 by a normal photolithography technique to expose the upper surface of the alloying prevention conductive film 8 in the upper region of the first opening 5. A hole 10 is formed.

(See FIG. 3) Next, a resist film 11 for protecting the main surface having a thickness of about 20 to 30 [μm] is applied and formed on the main surface, and the back surface of the substrate is polished by ordinary grinding means. The thickness of the semiconductor substrate 1 is, for example, from 500 to 600 [μm] to 300 to 40 [μm].
Thin it to about 0 [μ vote]. Note that the bottom surface of the substrate before grinding is shown by a dotted line. (Refer to Fig. 4) Then, resist film 1
After removing 1 with a solvent or the like, a plating mask film made of the inorganic insulating film 9 is formed by using an ordinary gold plating bath containing, for example, cyanogen-gold potash as a main component, and using the alloying prevention conductor film 8 as a cathode. selectively electrodepositing Au on the surface of the alloying-blocking conductor film 8 exposed in the second opening 10;
Au bumps 12 having a thickness of, for example, about 20 to 30 [μm] are formed in this region. (See FIG. 5) Note that the plating mask film made of the inorganic insulating film 9 has extremely low resistance to Au plating solution, so that no cracks or the like will be formed even if the plating process is performed for a long time.

Next, the sea urchin is processed using the conventional method of etching or drying.
After removing the plating mask film consisting of the inorganic insulating film 9 by etching, the Pd layer 7 of the exposed conductor film 8 for alloying prevention is removed using aqua regia, and the 11 layer 6 is removed using the Au bumps 12 as a mask. By dissolving and removing with a mixture of oxalic acid and hydrogen peroxide, 11 layers 6 and P are formed on the At wiring pad 3.
A is mounted through an alloying prevention conductive film 8 consisting of the d layer 7 and is electrically insulated from the p-shuichi by the surface protection insulating film 4.
U-bumps 12 are formed (see FIG. 6), and a normal dicing process is then carried out to complete a semiconductor chip having a predetermined thickness and provided with Au bumps as resuscitation bodies.

(f) Effects of the Invention As shown in the above embodiments, in the method of the present invention, a plating mask for forming metal bumps is formed of an inorganic insulating film such as P2O. Therefore, after applying the resist eyelid film on the plating mask and performing back grinding, it is possible to remove only the resist eyelid film without deforming the plating mask. Therefore, according to the present invention, since the back side of the substrate can be ground before forming bumps, cracks in the substrate are reduced, and the manufacturing yield of semiconductor devices having bumps is improved.

In addition, in the present invention, since an inorganic insulating film with high resistance to plating solutions is used for the plating mask, the plating solution does not infiltrate into unnecessary areas, which also improves manufacturing yield and reliability. do.

The present invention can also be applied to manufacturing semiconductor devices having metal bumps other than all metal bumps.

[Brief explanation of the drawing]

1 to 6 are process cross-sectional views in one embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 2 is an interlayer insulating film, 3 is an aluminum wiring board, 4 is a surface protection insulating film, and 5 is a first
, 6 is a titanium layer, 7 is a palladium layer, 8 is a conductive film for alloying prevention, 9 is an inorganic insulating film, 10 is a! 2 indicates an opening, 11 indicates a resist film, and 12 indicates a gold bump. -21:

Claims (1)

[Claims] A conductive film for alloying prevention is formed on the surface of the semiconductor substrate on which a surface protection insulating film having a first opening exposing a wiring pad portion is formed, and an inorganic insulating film is formed on the conductive film. A plating mask film having a second aperture exposing the upper region of the first aperture is formed, the plating mask film is covered with a resist film, and the back side of the semiconductor substrate is ground, and the resist film is removed. is removed, and gold N is deposited by electroplating on the alloying inhibiting conductor film exposed in the second opening of the plating mask film.
A method for manufacturing a semiconductor device having the f2 feature, comprising the steps of forming a bump, removing the mask film, and selectively etching away the exposed region of the conductive film for alloying prevention using the metal bump as a mask. .