JPS59115545A - Semiconductor element mounting substrate - Google Patents

Abstract

PURPOSE:To obtain a semiconductor element mounting substrate which has preferable heat sink instead of ceramic substrate by uniformly dispersing Cu of the prescribed amount, powder sintering an Mo alloy in which thermal expansion coefficient and thermal conductivity are specified as a base metal, and covering the surface with a coating formed of an inorganic material of the prescribed thickness having electric insulation. CONSTITUTION:5-30wt% of Cu is uniformly dispersed, an Mo alloy in which its thermal expansion coefficient is specified to 5.0-8.0X10<-6>cm/cm. deg.C and its thermal conductivity is specified to 0.38cal/cm.sec. deg.C or larger is powder sintered as a semiconductor element mounting base metal 1. Then, an Al2O3 layer 2 of 0.2-20mum of thickness is covered by ion plating on the upper and side faces of the base metal as an element mounting substrate 3. Subsequently, a semiconductor element 6 is secured onto the substrate 3 through a metallized layer 4 and an Au plating layer 5. Thus, the thermal expansion coefficient is particularly set similarly to the GaAs element, thereby coping with high density and large size.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a substrate for mounting a semiconductor element of an integrated circuit device, which is capable of efficiently dissipating heat generated in a semiconductor element, and also reduces thermal expansion with the element, which is an inherent property of the substrate material. The present invention provides a substrate for mounting a semiconductor element having similar coefficients and having electrical insulation properties.

For integrated circuits that require high reliability, packaging methods such as low-melting glass, ceramic packages, and multilayer ceramic packages have traditionally been used.

In this case, the semiconductor element is generally mounted on the ceramic substrate via a metal rising layer or a plating layer for adhesion.

This substrate is required not only to have properties as part of a package material that itself performs a hermetic sealing function, but also to have properties such as electrical insulation and a small mismatch in thermal expansion coefficient with the semiconductor element. For this reason, conventionally A 1120
Sintered ceramic materials such as a, B e O, 2M g O, and S Io 2 are widely used.

However, in recent years, integrated circuit elements have become denser and larger, leading to an increase in the amount of heat generated from the semiconductor elements, and demands on substrate materials for heat dissipation are becoming greater. For this reason, the material of the lead frame used in the IC of the resin mold quib varies from Ni alloy to carbon.
It is being converted to u-alloy. Heat dissipation performance is similarly strongly required for integrated circuits in low-melting point glass-ceramic packages and multilayer ceramic packages, but A7!203 and 2M
However, this method has the drawbacks of being expensive and toxic. In addition, Aβ,03, which is the most commonly used material, has malfunctions in integrated circuits caused by the irradiation effect on semiconductor elements due to the alpha rays generated from U mixed in during molding and sintering, and this demand for high performance and high reliability has been met. As the situation continues to grow, it is becoming a major problem.

The present invention aims to eliminate such drawbacks and provide a substrate for mounting semiconductor elements with good heat dissipation properties, which can be used as an alternative to the conventional heptadramic substrate.

That is, the present invention contains 5 to 30 wt% of Cu and has a thermal expansion coefficient of 5.0 to 8.0 x 10'cm/ctn,'G
, thermal conductivity is 0.38 cal 7cm, sec
0, which is made of an inorganic substance having electrical insulation properties on at least a part of the surface of a base metal made of a Mo alloy of 10 or more;
This is a substrate for mounting a semiconductor element, characterized by having a coating layer of 1 to 20 μm.

FIG. 1 is a cross-sectional view of a semiconductor device on which a semiconductor element is mounted using the substrate of the present invention, l is a metal plate whose thermal expansion coefficient approximates that of the element, and 2 is a coating layer coated on the surface of the metal plate. Then, the substrate 3 is formed by both.

4 is a metal rising layer, 5 is an Au plating layer, and a semiconductor element 6 is mounted thereon.

In the present invention, the thermal expansion coefficient of the base metal is 5.0 to 8.
．． The reason for limiting it to 0X10-6 is the mounted semiconductor element S.
i and GaAs, as well as other envelope materials that are often used in combination, such as Al2O3 heptaramic (thermal expansion coefficient 6.5-7.0X10'), to approximate the thermal expansion coefficient, and to eliminate thermal expansion mismatch. This is to reduce the influence of stress caused by.

Also, the thermal conductivity is 0.38 cal/an, sec, 'G
The reason for the above limitation is to obtain a thermal resistance that does not deteriorate the characteristics of a high-speed IC whose power consumption exceeds 8W.

In addition, Cu-Mo alloy is used as the base metal, and C
The reason why the amount of uO is set to 5 to 30 wt% is that the alloy can obtain the above-mentioned thermal properties and can be manufactured industrially.

Preferably, the base metal is produced by powder metallurgy. This is because it is difficult to produce an alloy containing components with large differences in melting point and specific gravity using other methods.

Further, it is preferable that Cu present in Mo is uniformly present in Mo. This is to prevent variations in properties such as warpage during heating, and it is preferable to use Mo powder with a particle size in the range of 0.5 to 10 μm.

In addition to a certain amount of Cu, the next inorganic substances to be coated on the surface of the base metal to improve various properties are BN,
A71203. AAN, Si3N, , Y, 03゜2Mg
0. SiO, diamond, etc. are effective and may be appropriately selected and combined depending on the required characteristics of the circuit board.

As a method of coating diamonds and ceramics,
Preferably, a vapor phase plating method such as physical vapor deposition (PVD) or chemical vapor deposition (CVD) is used.

In addition, when applying the coating layer, it is also possible to coat the base metal with a thin layer of metal such as N1 in order to make the surface condition uniform and stable. It is effective for improving

The reason why the thickness of the coating layer is limited to 0.1 to 20 μm is that if it is less than this, the required electrical insulation cannot be obtained, and if it is more than this, the cost for coating becomes extremely high, so it is not practical from an economic point of view. This is because there is a lack of

Next, an example will be described.

EXAMPLE A substrate for mounting a semiconductor element coated with a lI2O3 thin film for mounting a GaAs semiconductor element was prepared by the ion plating method as follows.

As the metal substrate, a CuMo alloy (thermal expansion coefficient 7.0×10′) containing 20 wt% Cu was used in order to approximate the thermal expansion coefficient to GaAs. Ion blasting for forming the coating layer was carried out by the following method.

That is, an Al2O2 sintered body was used as the raw material and evaporated by electron beam heating. A high frequency (13,56 MHz) of 100 to 200 W is applied at an oxygen pressure of 4 x 10' Torr to ionize a part of the evaporated substance, and the substrate is heated to 200°C.
A[203] was heated to a thickness of 2.0 μm.

As a result of the above, a substrate for mounting a semiconductor element, which is coated with a transparent insulating thin film having a dielectric strength characteristic of 300 mm or more with good adhesion, has a thermal expansion coefficient similar to that of the GaAs element on which it is mounted, and has excellent heat dissipation properties. I was able to do it.

A composite substrate made of a certain Cu-Mo alloy as a base metal and coated with an inorganic material of a certain thickness is as follows:
In addition to Si integrated circuits, GaAs integrated circuits, which are expected to be put into practical use in the future, are compatible with the ever-increasing density and larger size of semiconductor devices. .

It can also be used as a mounting substrate for optical devices such as InP and solar cells, and its effects are great.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor device using a substrate according to the present invention. 1: CuMo alloy plate, 2: Covering layer, 3: Semiconductor element mounting substrate, 4α metal rising layer, 5: Au plating layer, 6: Semiconductor element.

Claims (3)

[Claims] (1) Contains 5 to 30 wt% of Cu and has a thermal expansion coefficient of 5
．． A base metal made of a Mo alloy having a thermal conductivity of 0 to 8.0X10'cm/cTn,'G or more than 0.38ca110n, sec,'G, and at least a part of the surface thereof is made of an inorganic material having electrical insulation properties. 0, 1-2
A substrate for mounting a semiconductor element, characterized by having a coating layer of 0 pm. (2) The substrate for mounting a semiconductor element according to claim (1), wherein the base metal is an alloy manufactured by a powder sintering method. (3) Claim 2Mp characterized in that Cu in the base metal is uniformly present in Mo.
O0Si02. Claim No.
The substrate for a semiconductor device according to item 1), item (2), or item (3).