JPH03177382A - Surface modification of aluminum nitride substrate - Google Patents
Surface modification of aluminum nitride substrateInfo
- Publication number
- JPH03177382A JPH03177382A JP1313511A JP31351189A JPH03177382A JP H03177382 A JPH03177382 A JP H03177382A JP 1313511 A JP1313511 A JP 1313511A JP 31351189 A JP31351189 A JP 31351189A JP H03177382 A JPH03177382 A JP H03177382A
- Authority
- JP
- Japan
- Prior art keywords
- aluminum nitride
- nitride substrate
- oxide
- surface modification
- ain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 23
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 title claims abstract description 8
- 238000012986 modification Methods 0.000 title claims description 6
- 230000004048 modification Effects 0.000 title claims description 6
- 229910052574 oxide ceramic Inorganic materials 0.000 claims abstract description 11
- 239000011224 oxide ceramic Substances 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims abstract description 10
- 238000004544 sputter deposition Methods 0.000 claims abstract description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 238000005566 electron beam evaporation Methods 0.000 claims description 4
- 238000007733 ion plating Methods 0.000 claims description 4
- 239000011347 resin Substances 0.000 abstract description 17
- 229920005989 resin Polymers 0.000 abstract description 17
- 238000010849 ion bombardment Methods 0.000 abstract description 2
- 238000010894 electron beam technology Methods 0.000 abstract 1
- 238000007740 vapor deposition Methods 0.000 abstract 1
- 239000000919 ceramic Substances 0.000 description 18
- 230000017525 heat dissipation Effects 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 239000010408 film Substances 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 230000000052 comparative effect Effects 0.000 description 5
- 239000013078 crystal Substances 0.000 description 5
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910001080 W alloy Inorganic materials 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、高集積回路や高電力消費回路を有する半導体
装置に用いる窒化アルミニウム基板の表面改質方法に関
するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for surface modification of an aluminum nitride substrate used in a semiconductor device having a highly integrated circuit or a high power consumption circuit.
［従来の技術］
熱伝導性と電気絶縁性に優れ、しかも熱膨脹係数がＳｉ
単結晶の値に近い材料は、半導体素子の実装基板などに
古くから望まれていた。この要求を満足する材料は従来
存在せず、アルミナ、ベリリア、ダイヤモンド、Ｃｕ−
Ｗ合金が使用されてきた。この中、アルミナは熱伝導率
が小さく、熱膨脹係数がＳｉ単結晶の約１．５倍と大き
く、ベリリアは熱伝導率は大きいが熱膨脹係数がＳｉ単
結晶の約２倍もある。又、ダイヤモンドは高価である上
に大きな形状のものが得られないなどの欠点がある。Ｃ
ｕ−Ｗ合金は熱伝導率が高く、熱膨脹係数がＡｌ２Ｏ３
絶縁基板と合致する特許な基板材料ではあるが、導電性
をもつ欠点がある。又、新しいセラミックスとしてＳｉ
Ｃセラミックスが開発され、実装基板に使用されている
。このものは、熱伝導率、熱膨脹係数が小さく、半導体
チップ材のＳｉ単結晶に近い値をもっている。しかしな
がら、実装材料としては、誘電率、誘電損失が小さいこ
と、又、比較的機械加工性が良好で板厚を薄くできる等
による軽量化が図れることなどが要求特性としである。[Conventional technology] It has excellent thermal conductivity and electrical insulation, and has a coefficient of thermal expansion similar to that of Si.
Materials with values close to those of single crystals have long been desired for use in substrates for mounting semiconductor devices. There are currently no materials that meet this requirement, such as alumina, beryllia, diamond, Cu-
W alloy has been used. Among these, alumina has a low thermal conductivity and a high thermal expansion coefficient of about 1.5 times that of a Si single crystal, while beryllia has a high thermal conductivity but a thermal expansion coefficient of about twice that of a Si single crystal. Further, diamond has drawbacks such as being expensive and not being able to be produced in large shapes. C
u-W alloy has high thermal conductivity and thermal expansion coefficient of Al2O3
Although it is a proprietary substrate material compatible with insulating substrates, it has the disadvantage of being electrically conductive. In addition, Si as a new ceramic
C ceramics have been developed and are used for mounting substrates. This material has low thermal conductivity and coefficient of thermal expansion, and has values close to those of Si single crystal of semiconductor chip material. However, the required characteristics of the mounting material include low dielectric constant and low dielectric loss, relatively good machinability, and the ability to reduce weight by making the board thinner.
これらの諸特性をバランスよく満足する材料としてＡＩ
Ｎセラミックスが注目を浴びており、最も広い用途が期
待されている。すなわち、ＡＩＮセラミックスはＣｕな
みの高い熱伝導率をもつだけでなく、熱膨脹係数がＳｉ
単結晶に近い、誘電率か低い、比重が小さく、軽量、曲
げ強度か大きいといった特徴がある。史には大型チップ
でもダイ付けしやすい特徴もある。AI is a material that satisfies these properties in a well-balanced manner.
N-ceramics are attracting attention and are expected to have the widest range of applications. In other words, AIN ceramics not only has a high thermal conductivity comparable to Cu, but also has a coefficient of thermal expansion similar to that of Si.
It has characteristics such as being close to a single crystal, having a low dielectric constant, low specific gravity, light weight, and high bending strength. Fumi also has features that make it easy to attach die even with large chips.
［発明が解決しようとする課題］
ＡＩＮセラミックスは、放熱用の金属体あるいはシリコ
ンチップと熱伝導性の良好な樹脂と接合して使用される
が、ＡＩＮセラミックスと樹脂とは虞れ性が悪く、樹脂
を硬化させて接合しても密着性が悪いため、シリコンチ
ップで発生した熱を効率よく放熱用金属体に放散できな
くなり、熱の蓄積によって半導体装置の誤動作を招く等
の欠点があった。[Problems to be Solved by the Invention] AIN ceramics are used by bonding a metal body or silicon chip for heat dissipation with a resin having good thermal conductivity. Even when the resin is cured and bonded, the adhesion is poor, making it impossible to efficiently dissipate the heat generated by the silicon chip to the heat dissipating metal body, resulting in drawbacks such as heat accumulation leading to malfunction of the semiconductor device.
最近、ＩＣを中心とする半導体チップの高集積化及び小
型軽量化の傾向に伴ない、パッケージは薄く、小型にな
り、半導体チップの発熱量は益々僧大しているので、放
熱性は重要な課題である。Recently, with the trend toward higher integration, smaller size, and lighter weight of semiconductor chips, mainly ICs, packages have become thinner and smaller, and the amount of heat generated by semiconductor chips is increasing, so heat dissipation is an important issue. be.
そこで、本発明は放熱性に富むＡＩＮセラミックス基板
を提供することを特徴とする特に、大きな発熱を伴うも
ので放熱を水冷式で行う大型コンピュータ用のチップ搭
載基板に適するＡＩＮセラミックス基板の提供か目的で
ある。SUMMARY OF THE INVENTION Therefore, the present invention is characterized by providing an AIN ceramic substrate with excellent heat dissipation properties.In particular, an object of the present invention is to provide an AIN ceramic substrate suitable for a chip-mounted substrate for a large-sized computer that generates a large amount of heat and uses a water-cooled method for heat dissipation. It is.
［課題を解決するための手段］
本発明は、少なくとも片面に電子ビーム蒸着法、イオン
プレーティング法及びスパッタリング法のいずれかの方
性により酸化物セラミックス層を形成する窒化アルミウ
ム基板の表面改質方法である。[Means for Solving the Problems] The present invention provides a method for surface modification of an aluminum nitride substrate in which an oxide ceramic layer is formed on at least one surface by one of electron beam evaporation, ion plating, and sputtering. It is.
上記電子ビーム蒸着法、イオンプレーティング法及びス
パッタリング法は従来技術をそのまま適用することがで
きる。減圧ＣＶＤ法や常圧ＣＶＤ法により酸化物セラミ
ックス薄膜層を形成することもできるが、この方性で作
成した膜はＡＩＮセラミックス材との密着力が悪く好ま
しくない。Conventional techniques can be applied as they are to the electron beam evaporation method, ion plating method, and sputtering method. Although the oxide ceramic thin film layer can be formed by low pressure CVD method or normal pressure CVD method, the film formed by this method has poor adhesion with the AIN ceramic material and is not preferred.
酸化物セラミックス層の膜厚は０．０２〜１μｍの範囲
が適当である。１０ｍを超えると実際使用時のヒートサ
イクルによる熱衝撃によりクラックを発生したり、成膜
時の内部応力により膜ハガレが生成し、信頼性にかける
原因となる。The appropriate thickness of the oxide ceramic layer is in the range of 0.02 to 1 μm. If the length exceeds 10 m, cracks may occur due to thermal shock due to heat cycles during actual use, and film peeling may occur due to internal stress during film formation, which may impair reliability.
又、膜厚が０．０２μｍ未満では、樹脂との濡れ性を改
善することはできない。特に好ましい範囲は０．０５〜
０．５ μｍである。Furthermore, if the film thickness is less than 0.02 μm, the wettability with the resin cannot be improved. A particularly preferable range is 0.05 to
It is 0.5 μm.
又、酸化物セラミックス層の膜厚が厚くなると熱伝導率
がＡＩＮに比べて小さいために、ＩＣチップでの発熱を
熱伝導性樹脂あるいは放熱用金属体に伝えることができ
なくなり、熱の蓄積により半導体装置の誤動作を招くこ
とがあり好ましくない。Furthermore, as the thickness of the oxide ceramic layer increases, its thermal conductivity is lower than that of AIN, so the heat generated by the IC chip cannot be transferred to the thermally conductive resin or the heat dissipating metal body, resulting in heat accumulation. This is undesirable as it may cause malfunction of the semiconductor device.
［作 用］
非酸化物系のＡＩＮセラミックスは、酸化物粒子が混合
物として添加している樹脂とはべれ性が悪い。ここでい
う戊れ性とは接合直後だけでなく、実際に使用中でも安
定した接合状態を保持する性質のことを指す。[Function] Non-oxide-based AIN ceramics have poor compatibility with resins to which oxide particles are added as a mixture. The term "breakability" here refers to the property of maintaining a stable bonded state not only immediately after bonding but also during actual use.
通常樹脂中には樹脂だけでなく、フィラーとして熱膨脹
係数や熱伝導性を調整するために、酸化物系セラミック
ス粉末が混合されているのが普通である。Usually, in addition to resin, oxide-based ceramic powder is mixed as a filler in order to adjust the coefficient of thermal expansion and thermal conductivity.
本発明で得られる基板はＡＩＮセラミックス表面に酸化
物セラミックス層が形成されており、これが前記樹脂中
の酸化物と同様成分であるために、必然的に酸化物セラ
ミックスが形成されていないＡＩＮセラミックスより、
樹脂との濡れ性が非常に良好で、かつ、酸化物セラミッ
クスと樹脂との熱膨脹係数を近似させることができるた
め、極めて良好な密着強度が得られる。The substrate obtained by the present invention has an oxide ceramic layer formed on the surface of the AIN ceramic, and since this is the same component as the oxide in the resin, it is naturally better than the AIN ceramic layer on which the oxide ceramic is not formed. ,
It has very good wettability with the resin and can approximate the thermal expansion coefficients of the oxide ceramic and the resin, so it can provide very good adhesion strength.
［実施例］
次に実施例並びに比較例によって本発明を具体的に説明
する。[Example] Next, the present invention will be specifically described with reference to Examples and Comparative Examples.
実施例Ｉ
ＡＩＮセラミックス基板の放熱用金属体と熱伝導性樹脂
と接する側の表面を初期真空度８×１０’ Ｔｏｒｒ、
導入Ａ−ｒガス圧５Ｘ １０−’ Ｔｏｒｒｓ基板温度
２５０℃にて高周波プラズマによるイオンボンバードメ
ントにより表面清浄化を行った後、続いて電子ビーム蒸
着法により成膜速度３０Ｘ／ｓｅｅで０．２μｍの膜厚
になるよう制御して酸化ケイ素層を形成した。Example I The surface of the AIN ceramic substrate in contact with the heat-dissipating metal body and the thermally conductive resin was kept at an initial vacuum level of 8×10' Torr,
After surface cleaning was performed by ion bombardment using high-frequency plasma at an introduced A-r gas pressure of 5X 10-' Torrs and a substrate temperature of 250°C, a film of 0.2 μm was then deposited by electron beam evaporation at a deposition rate of 30X/see. A silicon oxide layer was formed by controlling the film thickness.
第１図は、このようにして得た基板の実装例を示し、図
中 ｌはＡＩＮセラミックス、２は酸化ケイ素層、３は
放熱用金属体、４は熱伝導性樹脂、５はメタライジング
層、Ｂはシリコンチップである。Figure 1 shows an example of mounting the board thus obtained, in which l is AIN ceramics, 2 is a silicon oxide layer, 3 is a metal body for heat dissipation, 4 is a thermally conductive resin, and 5 is a metallizing layer. , B are silicon chips.
実施例２
ＡＩＮセラミックス基板の放熱用金属体（Ａ１合金）と
熱伝導性樹脂と接する側の表面を、初期真空度２Ｘ １
０’ Ｔｏｒｒ、導入０２ガス圧４Ｘ ｔｏ’ Ｔｏｒ
ｒｓ基板温度３００℃、成膜速度３５Ｘ／ｓｅｅのイオ
ンプレーティング法で、０．３μ−の膜厚になるよう制
御してアルミナ層を形成した。Example 2 The surface of the AIN ceramic substrate in contact with the heat dissipation metal body (A1 alloy) and the thermally conductive resin was heated to an initial degree of vacuum of 2×1.
0' Torr, introduction 02 gas pressure 4X to' Torr
An alumina layer was formed using an ion plating method at a rs substrate temperature of 300° C. and a film formation rate of 35×/see, controlling the film thickness to be 0.3 μm.
このようにして得た基板を第１図に示すように実装した
。ただし、この場合２はアルミナ層である。The substrate thus obtained was mounted as shown in FIG. However, in this case, 2 is an alumina layer.
比較例
第２図に示すように第１図における酸化物（酸化ケイ素
、アルミナ）層２を備えていない従来例を比較例とした
。Comparative Example As shown in FIG. 2, the conventional example shown in FIG. 1 without the oxide (silicon oxide, alumina) layer 2 was used as a comparative example.
以上の実施例１．２及び比較例の３種の試作品に気（口
中での熱衝！ｌ（１サイクルニ一６５℃×１０分→２５
℃×５分−１５０℃×ｌＯ分）を ２００サイクル与え
たところ、比較例では、初期は何ともなかったが、サイ
クルをくり返すにつれて徐々に樹脂が放熱用金属体上に
流れ出し、ＡＩＮセラミックス ｌと放熱用金属体３と
の間隙が不均一となる現象がみられた。２００サイクル
後には、ＡＩＮセラミックス１と放熱用金属体３との間
に樹脂のない空間が発生していた。これに対して、実施
例１．２の試作品では何の異常も認められなかった。The above three prototypes of Example 1.2 and Comparative Example were heated (hot shock in the mouth! 1 cycle at 65°C x 10 minutes → 25
℃ × 5 minutes - 150℃ × 10 minutes) was applied for 200 cycles. In the comparative example, there was no problem at the beginning, but as the cycles were repeated, the resin gradually flowed onto the heat dissipation metal body, and the AIN ceramics l. A phenomenon was observed in which the gap with the heat dissipating metal body 3 became non-uniform. After 200 cycles, a space without resin was generated between the AIN ceramic 1 and the heat dissipation metal body 3. On the other hand, no abnormality was observed in the prototype of Example 1.2.
［発明の効果］
本発明によれば、熱放散性にすぐれ、熱膨脹係数が半導
体チップのそれに近いＡＩＮセラミックスの性質を損う
ことなく、水冷放熱用の金属体と接合することが可能な
、樹脂との濡れ性の改善されたＡＩＮ基板を提供するこ
とができる。[Effects of the Invention] According to the present invention, a resin that has excellent heat dissipation properties and can be bonded to a metal body for water-cooled heat dissipation without impairing the properties of AIN ceramics whose coefficient of thermal expansion is close to that of a semiconductor chip. It is possible to provide an AIN substrate with improved wettability with.
第１図は本発明で得られた基板の実装例の説明図、第２
図は従来の実装例の説明図である。
１・・・ＡＩＮセラミックス、
２・・・酸化物（酸化ケイ素、アルミナ）膜、３・・・
放熱用金属体、４・・・熱伝導性樹脂、５・・・メタラ
イジング層、６・・・シリコンチップ。Figure 1 is an explanatory diagram of an example of mounting a board obtained by the present invention, Figure 2
The figure is an explanatory diagram of a conventional implementation example. 1...AIN ceramics, 2...Oxide (silicon oxide, alumina) film, 3...
Heat dissipation metal body, 4... thermally conductive resin, 5... metallizing layer, 6... silicon chip.
Claims (3)
ーティング法及びスパッタリング法のいずれかの方法に
より酸化物セラミック層を形成することを特徴とする窒
化アルミウム基板の表面改質方法。(1) A method for surface modification of an aluminum nitride substrate, which comprises forming an oxide ceramic layer on at least one surface by any one of electron beam evaporation, ion plating, and sputtering.
ある請求項（１）記載の窒化アルミニウム基板の表面改
質方法。(2) The method for surface modification of an aluminum nitride substrate according to claim (1), wherein the oxide ceramic layer has a thickness of 0.02 to 1 μm.
１）又は（２）記載の窒化アルミニウム基板の表面改質
方法。(3) Claim in which the oxide is silicon oxide or alumina (
The method for surface modification of an aluminum nitride substrate according to 1) or (2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1313511A JPH03177382A (en) | 1989-12-04 | 1989-12-04 | Surface modification of aluminum nitride substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1313511A JPH03177382A (en) | 1989-12-04 | 1989-12-04 | Surface modification of aluminum nitride substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03177382A true JPH03177382A (en) | 1991-08-01 |
Family
ID=18042195
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1313511A Pending JPH03177382A (en) | 1989-12-04 | 1989-12-04 | Surface modification of aluminum nitride substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03177382A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005041720A (en) * | 2003-07-24 | 2005-02-17 | Noritake Co Ltd | Porous ceramic film and method for producing the same |
-
1989
- 1989-12-04 JP JP1313511A patent/JPH03177382A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005041720A (en) * | 2003-07-24 | 2005-02-17 | Noritake Co Ltd | Porous ceramic film and method for producing the same |
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