JPH0754834B2 - Method for manufacturing diamond film semiconductor substrate - Google Patents
Method for manufacturing diamond film semiconductor substrateInfo
- Publication number
- JPH0754834B2 JPH0754834B2 JP61067631A JP6763186A JPH0754834B2 JP H0754834 B2 JPH0754834 B2 JP H0754834B2 JP 61067631 A JP61067631 A JP 61067631A JP 6763186 A JP6763186 A JP 6763186A JP H0754834 B2 JPH0754834 B2 JP H0754834B2
- Authority
- JP
- Japan
- Prior art keywords
- diamond film
- diamond
- substrate
- semiconductor substrate
- heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3732—Diamonds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Inorganic Insulating Materials (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、従来にない高い熱伝導性をもち、電気絶縁性
が高いダイヤモンド膜半導体基板の製造方法に関するも
のである。TECHNICAL FIELD The present invention relates to a method for producing a diamond film semiconductor substrate having high heat conductivity and high electric insulation which has never been obtained.
本発明は、高集積化、高出力化する半導体集積回路にお
ける高密度電流による回路及び回路基板の蓄熱による回
路の破壊を起こさないようにするため、発生した熱を素
早く効率良く基板から放出することを目的に、熱伝導性
の良いダイヤモンド膜を安価にコーティングした基板に
関するものである。又、合成したダイヤモンド膜の密着
性を上げ、熱の伝導性を良くするために、ダイヤモンド
膜の片側に鑞材あるいは金属コーティングを施すことを
特徴としている。The present invention quickly and efficiently dissipates generated heat from a substrate in order to prevent destruction of the circuit due to high-density current and the circuit due to heat accumulation of the circuit substrate in a semiconductor integrated circuit that is highly integrated and has high output. For this purpose, the present invention relates to a substrate coated with a diamond film having good thermal conductivity at low cost. In addition, a brazing material or a metal coating is applied to one side of the diamond film in order to improve the adhesion of the synthesized diamond film and improve the heat conductivity.
半導体集積回路素子はメモリ素子の大容量化に代表され
るように、高集積化の傾向にあるため、回路から発生す
る単位面積あたりの熱量が従来に比べ多くなってきた。
また、回路基板の軽薄短小化につれ、回路の素子化が進
み大出力、大電流が要求され同様に半導体回路からの熱
発生が問題となっている。Since the semiconductor integrated circuit device tends to be highly integrated, as typified by increasing the capacity of a memory device, the amount of heat generated from the circuit per unit area has become larger than in the past.
In addition, as the circuit board becomes lighter, thinner, shorter, and smaller, the circuit elements are becoming more advanced, and a large output and a large current are required. Similarly, heat generation from the semiconductor circuit becomes a problem.
従来、熱発生の大きいあるいは熱に弱い半導体の放熱帯
として、一部において、現存する物質の中で熱伝導性が
最も良い天然のダイヤモンド薄片が用いられる。Conventionally, as a heat radiation band of a semiconductor that generates a large amount of heat or is weak to heat, a natural diamond flake having the highest thermal conductivity among existing substances is used in some cases.
この時のダイヤモンド薄片は、ダイヤモンド塊をスライ
ス研磨してチップ化するため、半導体本来のコストに比
較して著しく高価となるので、現状ではその使用が限ら
れている。一般的には、ダイヤモンドに比べて熱伝導性
は劣るがコスト面で有利な金属、例えばCu、Alやセラミ
ック、例えばSiC、AlNなどが用いられている。しかしな
がら、これら従来材料は表１に示すようにダイヤモンド
に比べると熱伝導性が悪く放熱量に制限があるため、半
導体の性能に限界があると同時に金属については絶縁性
がないため素子と基板との絶縁を図るため素子と基板の
間に絶縁体を設ける必要性から構造が複雑となり、熱伝
導性がさらに損なわれる欠点があった。At this time, the diamond flakes are extremely expensive compared to the original cost of the semiconductor because the diamond lumps are slice-polished into chips, and thus their use is limited at present. Generally, metals such as Cu, Al and ceramics such as SiC and AlN, which are inferior in thermal conductivity to diamond but are advantageous in cost, are used. However, as shown in Table 1, these conventional materials have poor thermal conductivity as compared with diamond and are limited in the amount of heat radiation, so that there is a limit to the performance of semiconductors and at the same time there is no insulating property with respect to metals, so that the elements and substrate Since it is necessary to provide an insulator between the element and the substrate in order to insulate the structure, the structure becomes complicated and the thermal conductivity is further impaired.
〔問題点を解決するための手段〕 本発明はこれらの問題点を解決するために、天然ダイヤ
モンドと同等の熱伝導性を有した人工ダイヤモンド膜の
半導体基板構造を提供すること目的としたものである。 [Means for Solving Problems] In order to solve these problems, the present invention aims to provide a semiconductor substrate structure of an artificial diamond film having thermal conductivity equivalent to that of natural diamond. is there.
人工的にダイヤモンド膜を合成する手段には、直流プラ
ズマ、高周波プラズマ、マイクロ波プラズマ、イオンビ
ーム蒸着、イオン化蒸着法等があるが、いずれの合成法
によっても本発明品の一部を構成する人工ダイヤモンド
膜は作製可能である。Means for artificially synthesizing a diamond film include direct current plasma, high frequency plasma, microwave plasma, ion beam deposition, ionization deposition and the like, and any synthetic method constitutes a part of the product of the present invention. A diamond film can be produced.
例えば、第１図に示すように、Si基板１上にダイヤモン
ド膜２をマイクロ波プラズマ法によって合成する。マイ
クロ波プラズマ法によって得られたダイヤモンド膜の表
面は、多結晶組織で形成されているため、凹凸が著し
い。特にダイヤモンドの結晶性が良い程その傾向は顕著
であり、熱伝導率、電気絶縁性も良くなる。それ故、熱
伝導性、電気絶縁性が良い半導体基板としてのダイヤモ
ンド膜を得ると、その性能が良い程表面の凹凸が著しく
なるので、素子が発生する熱をダイヤモンド膜を通して
ヒートシンクへ効率よく逃すためにはダイヤモンド膜と
素子あるいはヒートシンクとを密着よく接触する必要が
ある。本発明のもう１つの特徴は、ダイヤモンド膜と素
子あるいはヒートシンクとを密着よく接触するために、
凹凸の激しい側に金属コーティング、又はこれに鑞材を
施した面と、滑らかなダイヤモンド面とを有するダイヤ
モンド膜を含むダイヤモンド膜製半導体基板である。For example, as shown in FIG. 1, a diamond film 2 is synthesized on a Si substrate 1 by a microwave plasma method. Since the surface of the diamond film obtained by the microwave plasma method has a polycrystalline structure, the surface is highly uneven. In particular, the better the crystallinity of diamond, the more remarkable the tendency, and the better the thermal conductivity and the electrical insulation. Therefore, when a diamond film as a semiconductor substrate with good thermal conductivity and electrical insulation is obtained, the higher the performance, the more marked the surface irregularities, so that the heat generated by the element can be efficiently released to the heat sink through the diamond film. It is necessary to closely contact the diamond film with the element or heat sink. Another feature of the present invention is that the diamond film and the element or heat sink are in close contact with each other,
A diamond film semiconductor substrate including a diamond film having a metal coating or a brazing material surface on a side having a large degree of unevenness and a smooth diamond surface.
上述の如く構成することにより、高集積化、高出力化さ
れた半導体素子によって発生する熱は、速やかに外部へ
放熱され、半導体素子が蓄熱することなく長期に経って
安定して使用できる。With the above-described configuration, the heat generated by the highly integrated and high-powered semiconductor element is quickly radiated to the outside, and the semiconductor element can be stably used for a long period of time without accumulating heat.
以下、本発明のレーザー発光ダイオードの実施例を図面
によって説明する。Hereinafter, embodiments of the laser light emitting diode of the present invention will be described with reference to the drawings.
第１図に示すように厚さ300μのシリコン基板１を用意
し、この基板の表面をH2SO4＋H2O2の混酸溶液中で十分
洗浄し、プラズマCVDにて、CH4＋H2の混合ガス中で、シ
リコン基板に厚さ４μのダイヤモンド膜２を析出させ
る。前述のように、ダイヤモンド膜の合成法はその他の
方法を用いたり、基板についてもシリコンのほか金属、
合金やセラミックスなどの材料を用いても同様の結果が
得られる。得られたダイヤモンド膜の上に、Auあるい
は、Au−Snあるいは、Au−Siの金属３を３μｍ蒸着し
（第２図）ヒートシンク４と接触させる（第３図）。あ
るいは、金属コーティングの後、ヒートシンク材との密
着性を良くし、熱の伝達効率を上げるため、銀ろうある
いはニッケルろうあるいは金ろうあるいはパラジウムろ
うあるいは銅合金ろうのいずれかを施した後ヒートシン
クを接触させる。その後、加熱雰囲気中にて、ダイヤモ
ンド膜、金属コーティングあるいは鑞材、ヒートシンク
を十分密着よく接合させる。その後、HF＋HNO3の混酸溶
液中に30分浸漬し、シリコン基板を溶解し、ダイヤモン
ド膜面を露出させる（第４図）。シリコン基板の除去方
法は化学的溶解だけでなく、酸素雰囲気プラズマエッチ
ングやArエッチングのような物理的エッチング法でも除
去することは可能である。As shown in FIG. 1, a silicon substrate 1 having a thickness of 300 μ is prepared, the surface of this substrate is thoroughly washed in a mixed acid solution of H 2 SO 4 + H 2 O 2 , and plasma CVD is used to remove CH 4 + H 2 A diamond film 2 having a thickness of 4 μ is deposited on a silicon substrate in a mixed gas. As mentioned above, other methods are used for synthesizing the diamond film, and for the substrate, not only silicon but also metal,
Similar results can be obtained using materials such as alloys and ceramics. Au, Au—Sn, or Au—Si metal 3 is vapor-deposited on the obtained diamond film to a thickness of 3 μm (FIG. 2) and brought into contact with the heat sink 4 (FIG. 3). Alternatively, after the metal coating, in order to improve the adhesion with the heat sink material and improve the heat transfer efficiency, either silver brazing, nickel brazing, gold brazing, palladium brazing, or copper alloy brazing is applied, and then the heat sink is contacted. Let After that, the diamond film, the metal coating or the brazing material, and the heat sink are bonded in a heating atmosphere with sufficient adhesion. Then, it is immersed in a mixed acid solution of HF + HNO 3 for 30 minutes to dissolve the silicon substrate and expose the diamond film surface (Fig. 4). The silicon substrate can be removed not only by chemical dissolution but also by physical etching such as oxygen atmosphere plasma etching or Ar etching.
混酸溶液から取り出した後、純水で十分洗浄した後、乾
燥する。After being taken out from the mixed acid solution, it is thoroughly washed with pure water and then dried.
得られたダイヤモンドの膜面は、滑らかな基板の接触し
ていた面のため、熱を伝えるには十分滑らかなダイヤモ
ンド面が得られている。つづいて第５図に示すように、
AuあるいはAu−SnあるいはAu−Siを0.3μｍ金属コーテ
ィングしさらに第６図に示すようにレーザー発光素子を
蒸着膜の上に載せ接合させる。最後に、素子及び基板を
金線で配線し、レーザー発光ダイオードが完成する。こ
のように得られたレーザー発光ダイオードの基本的性能
として、寿命と発光量との関係を第８図に示す。これよ
り、本発明で得られたレーザー発光ダイオードは、従来
品に比べて寿命が５倍以上あることがわかる。第７図
に、レーザー発光ダイオードの断面図を示す。Since the obtained diamond film surface was the surface that was in contact with the smooth substrate, a sufficiently smooth diamond surface was obtained to transfer heat. Then, as shown in FIG.
Au, Au-Sn, or Au-Si is coated with a metal having a thickness of 0.3 [mu] m, and a laser light emitting device is placed on the vapor deposition film and bonded as shown in FIG. Finally, the element and the substrate are wired with a gold wire to complete the laser light emitting diode. As a basic performance of the laser light emitting diode thus obtained, FIG. 8 shows the relationship between the life and the light emission amount. From this, it is understood that the laser light emitting diode obtained by the present invention has a life of 5 times or more as compared with the conventional product. FIG. 7 shows a sectional view of the laser light emitting diode.
第９図に、本発明によるダイヤモンド薄膜製半導体基板
からなるパワーICのパッケージ構造を示す、製造方法
は、前実施例と同様であるが、第５図における金属コー
ティングとしてPb−Snを用いることもできる。このよう
にして得られたパワーICは、従来品に比べて構造が簡単
でありコストが安くなり、熱の発生も従来品に比べて30
％増えても素子の機能は損なわれないため、より高パワ
ーのICを設計することが可能となった。FIG. 9 shows the package structure of the power IC made of the diamond thin film semiconductor substrate according to the present invention. The manufacturing method is the same as in the previous embodiment, but Pb—Sn may be used as the metal coating in FIG. it can. The power IC obtained in this way has a simpler structure and lower cost than conventional products, and heat generation is 30% less than conventional products.
Since the function of the element is not impaired even if it increases by%, it has become possible to design a higher power IC.
その他、マイクロ波発振素子、ハイブリッドIC素子、高
密度化された超LSIなど、高エネルギーを発生し熱量を
多く出す素子の基板として用いることができることはい
うまでもない。In addition, it goes without saying that it can be used as a substrate for an element that generates high energy and generates a large amount of heat, such as a microwave oscillation element, a hybrid IC element, and a densified VLSI.
以上の如く本発明によって得られたダイヤモンド膜製半
導体基板によって、高パワー、高エネルギーを発生する
素子が従来に比べて、長期にわたって安定して高性能が
得られるようになった。As described above, with the diamond film semiconductor substrate obtained by the present invention, an element that generates high power and high energy can stably obtain high performance over a long period of time as compared with the conventional device.
このことにより、半導体の高機能化が図れ、低コスト、
コンパクト化が可能となった。よって本発明の工業価値
は大きい。As a result, the functionality of the semiconductor can be improved and the cost can be reduced.
It has become possible to make it compact. Therefore, the industrial value of the present invention is great.
第１図乃至第６図は本発明の製造工程を示す説明断面
図、第７図は本発明の実施例、レーザー発光ダイオード
の断面図、第８図はレーザー発光ダイオードの発光特
性、第９図は本発明の実施例、パワーICの断面図であ
る。 １……シリコン基板 ２……ダイヤモンド膜 ３……金属（Au、Au−Sn） ４……ヒートシンク ５……AuあるいはAu−Sn ６……レーザー発光ダイオード素子 ７……電極 ８……ｐ−GaAs層 ９……ｎ−GaAs層 10……電極 11……リードフレーム 12……パワーIC素子 13……封止ガラス1 to 6 are explanatory sectional views showing manufacturing steps of the present invention, FIG. 7 is an embodiment of the present invention, a sectional view of a laser light emitting diode, FIG. 8 is a light emitting characteristic of the laser light emitting diode, and FIG. FIG. 3 is a cross-sectional view of a power IC according to an embodiment of the present invention. 1 ... Silicon substrate 2 ... Diamond film 3 ... Metal (Au, Au-Sn) 4 ... Heat sink 5 ... Au or Au-Sn 6 ... Laser light emitting diode element 7 ... Electrode 8 ... p-GaAs Layer 9 ... n-GaAs layer 10 ... Electrode 11 ... Lead frame 12 ... Power IC element 13 ... Sealing glass
Claims (1)
材料よりなる、平滑な面を有する基板の表面に、人工ダ
イヤモンド合成法によりダイヤモンド膜を成形し、前記
ダイヤモンド膜の上に金属コーティングを施し、又は、
これに鑞材を施してダイヤモンド膜とヒートシンクとを
接合し、その後、ダイヤモンド膜から前記基板を溶解あ
るいはエッチング等により除去して、平滑なダイヤモン
ド膜を形成し、前記ダイヤモンド膜に金属コーティング
を施して、前記ダイヤモンド膜と半導体素子とを接合し
たことを特徴とするダイヤモンド膜製半導体基板の製造
方法。1. A diamond film is formed on the surface of a substrate made of silicon or a metal / alloy and a ceramic material having a smooth surface by an artificial diamond synthesis method, and a metal coating is applied on the diamond film, or
A brazing material is applied to this to bond the diamond film and the heat sink, and then the substrate is removed from the diamond film by dissolution or etching to form a smooth diamond film, and the diamond film is metal-coated. A method for manufacturing a diamond film semiconductor substrate, characterized in that the diamond film and a semiconductor element are bonded together.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61067631A JPH0754834B2 (en) | 1986-03-26 | 1986-03-26 | Method for manufacturing diamond film semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61067631A JPH0754834B2 (en) | 1986-03-26 | 1986-03-26 | Method for manufacturing diamond film semiconductor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62224048A JPS62224048A (en) | 1987-10-02 |
| JPH0754834B2 true JPH0754834B2 (en) | 1995-06-07 |
Family
ID=13350526
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61067631A Expired - Lifetime JPH0754834B2 (en) | 1986-03-26 | 1986-03-26 | Method for manufacturing diamond film semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0754834B2 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2689986B2 (en) * | 1988-07-13 | 1997-12-10 | 富士通株式会社 | Electronic equipment |
| US4981818A (en) * | 1990-02-13 | 1991-01-01 | General Electric Company | Polycrystalline CVD diamond substrate for single crystal epitaxial growth of semiconductors |
| JP2000174166A (en) * | 1998-10-02 | 2000-06-23 | Sumitomo Electric Ind Ltd | Semiconductor mounting package |
| WO2001031082A1 (en) * | 1999-10-28 | 2001-05-03 | P1 Diamond, Inc. | Improved diamond thermal management components |
| US6656444B1 (en) | 2000-10-27 | 2003-12-02 | P1 Diamond, Inc. | Methods for synthesizing high-efficiency diamond and material and diamond material produced thereby |
| EP1410437A2 (en) | 2001-01-22 | 2004-04-21 | Morgan Chemical Products, Inc. | Cvd diamond enhanced microprocessor cooling system |
| CN111009496B (en) * | 2019-12-31 | 2021-07-06 | 长春理工大学 | Semiconductor substrate with high thermal conductivity and preparation method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57675B2 (en) * | 1972-08-19 | 1982-01-07 |
-
1986
- 1986-03-26 JP JP61067631A patent/JPH0754834B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62224048A (en) | 1987-10-02 |
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