JP2004083964A - Copper-based heat radiation board and production method therefor - Google Patents

Copper-based heat radiation board and production method therefor Download PDF

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Publication number
JP2004083964A
JP2004083964A JP2002244515A JP2002244515A JP2004083964A JP 2004083964 A JP2004083964 A JP 2004083964A JP 2002244515 A JP2002244515 A JP 2002244515A JP 2002244515 A JP2002244515 A JP 2002244515A JP 2004083964 A JP2004083964 A JP 2004083964A
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copper
stress relaxation
relaxation layer
heat radiation
thermal expansion
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Noriyuki Watabe
渡部 典行
Yasuo Kondo
近藤 保夫
Takashi Suzumura
鈴村 隆志
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Hitachi Cable Ltd
Hitachi Ltd
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Hitachi Cable Ltd
Hitachi Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

<P>PROBLEM TO BE SOLVED: To increase the joining reliability of a heat radiation board and to reduce the deformation of the heat radiation board caused by its warpage by thermally spraying the surface of a Cu board with a powdery mixture consisting of Cu and Cu<SB>2</SB>O particles to form a heat radiation board provided with a stress relaxation layer with a composite structure of Cu-Cu<SB>2</SB>O having thermal expansion and a Young's modulus lower than those of Cu, and thus reducing thermal stress generated on temperature cycles in a joining stage with a power element or a ceramic insulating board and in use. <P>SOLUTION: In the heat radiation board, the surface of a Cu board is thermally sprayed with a powdery mixture consisting of Cu and Cu<SB>2</SB>O particles, and is provided with a stress relaxation layer with a composite structure of Cu and Cu<SB>2</SB>O having thermal expansion and a Young's modulus lower than those of Cu. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、放熱板及びその製造方法に関する。
【0002】
【従来の技術】
電力変換のため、各種のオン,オフ機能を持つパワー半導体素子が用いられている。この半導体素子としては、pn接合体を内蔵し、一方向のみの導電性をもつ整流ダイオードをはじめ、種々のpn接合の組合せ構造により、サイリスタ,バイポーラトランジスタ,MOSFET等が実用化され、更には絶縁ゲート型バイポーラトランジスタ(IGBT)やゲート信号によりターンオフ機能を併せもつゲートターンオフサイリスタ(GTO)も開発されている。
【0003】
これらの電力用半導体素子は、通電により発熱し、その高容量化,高速化に伴い発熱量も増大する傾向にある。発熱に起因する半導体素子の特性劣化,短寿命化を防止するためには、放熱部を設け、半導体素子及びその近傍での温度上昇を抑制する必要がある。一般に、パワー半導体素子を備える半導体装置の放熱部材は、直接あるいはAlNなどのセラミック絶縁板を介して、熱膨張率が2.6×10−6〜3.6×10−6/℃ のSi素子や5.7×10−6〜6.9×10−6のGaAs素子と接合されるため、熱膨張係数がこれに近い放熱部材が望まれる。
【0004】
銅は、熱伝導率が393W/m・Kと大きく、かつ低価格であるため、放熱部材として良く用いられているが、300℃における熱膨張率が17×10−6/℃と大きいため、高容量すなわち半導体素子からの発熱量が大きな半導体装置に対しては、SiやGaAsに近い熱膨張係数をもつAl−SiC,Cu−Mo合金あるいはCu−W合金等が多用される様になってきた。
【0005】
【発明が解決しようとする課題】
銅は、低コストで高熱伝導性を有しているが、熱膨張係数が大きいために、近年の半導体素子からの発熱量の増大に対して対応が困難になっている。すなわち、半導体素子あるいはセラミック絶縁板との熱膨張差に起因して、はんだ接合時の熱応力あるいは使用時における熱サイクルによる熱応力により、放熱板の反り変形やはんだ層からの剥離あるいはセラミック絶縁板の破壊などの問題を生じている。
【0006】
一方、SiやGaAsに近い熱膨張係数をもつAl−SiC,Cu−Mo合金あるいはCu−W合金等は、熱伝達係数と熱伝導率を任意にコントロールすることが困難であるとともに、加工性に乏しくコストが高いという問題がある。
【0007】
以上の課題に対して、発明者らは、パワー素子から発生する熱をより効率良く系外に放散するための放熱板には、高熱伝導性を有する銅(Cu)が好適であり、パワー素子あるいはセラミック絶縁板との熱膨張係数差に起因する熱応力の軽減は、Cuよりも熱膨張係数及びヤング率が小さい物質からなる応力緩和層をパワー素子あるいはセラミック絶縁板との接合界面に形成することが有効である考えられた。
【0008】
以上、本願発明の目的は、加工性に富み、接合信頼性の高い放熱板を提供することにある。
【0009】
【課題を解決するための手段】
本発明は上記の課題を考慮してなされたものである。
【0010】
本発明に係わる銅系放熱板は、銅(Cu)もしくは銅(Cu)合金の表面に、それよりも熱膨張係数及びヤング率が小さく、室温から300℃における熱膨張係数が8×10−6/℃〜14×10−6/℃、ヤング率が35MPa〜95MPaであり、CuO を20〜60体積%含み、残部が銅(Cu)と不可避的不純物からなり、CuとCuO 粒子との複合組織を有する応力緩和層が形成されていることを特徴とする。
【0011】
本発明に係わる銅系放熱板の製造方法は、銅(Cu)粉末とCuO 粉末からなる混合粉末を用いて、銅(Cu)もしくは銅(Cu)合金の表面に溶射を行うことにより、CuとCuO 粒子との複合組織からなる応力緩和層を一体形成することを特徴とする。
【0012】
また、本発明に係わる銅系放熱板の製造方法は、銅(Cu)粉末とCuO 粉末からなる混合粉末を用いて、銅(Cu)もしくは銅(Cu)合金の表面に溶射を行い、CuとCuO 粒子との複合組織からなる応力緩和層を一体形成した後に、800℃から1000℃に加熱して、前記応力緩和層の緻密化及びCuO 粒子の粒状化を図ることを特徴とする。
【0013】
本発明に係わる銅系放熱板表面に形成される応力緩和層の組成として、CuとCuO 粒子から構成される表1のごとき組成を用いることにより、パワー素子或いはセラミック絶縁基板と放熱板の熱膨張係数差を小さくすることができるため、半導体装置製造のはんだ工程や使用中の温度変化時に発生する熱応力を低減でき、接合信頼性が高くなる。また、放熱板の反りによる変形も低減できる。さらに、CuとCuO 粒子から構成される材料はヤング率がCuの0.3〜0.6倍程度であるため、パワー素子或いはセラミック絶縁基板−放熱板接合部分の熱応力緩和が更に助長され、接合部分やセラミックの劣化が避けられる。
【0014】
ここで、応力緩和層はCuにCuO を20〜60体積%含有する組成が好適であり、室温から300℃における熱膨張係数が8×10−6/℃〜14×10−6/℃、ヤング率が35MPa〜95MPaの特性を示す。CuO 量が20体積%以下では、熱膨張係数,ヤング率ともに大きくなり、応力緩和の効果が得られず、60体積%以上の場合は、熱伝導率が小さくなり、熱拡散が阻害され、放熱板としての性能が損なわれるために好ましくない。
【0015】
また、応力緩和層の組成及び厚さはパワー素子の発熱量,放熱板の大きさと厚さによって選択される。
【0016】
本発明の放熱板の応力緩和層は、図1に示すように、応力緩和層2が溶射によってCu板1表面に直接形成,接合されるため接合強度が高く、熱ストレスに対する接合信頼性が向上するとともに、Cu板1の高い熱伝導性の効果によって放熱効率が確保される。
【0017】
前述の溶射による方法で形成された応力緩和層は、800℃〜1000℃の温度で熱処理することによって焼結が進行し、緻密化が図られ、さらにCuO の粒状化が生じて熱伝導率が向上する。
【0018】
【表1】

Figure 2004083964
【0019】
【発明の実施の形態】
本願発明の実施形態について、実施例及び図面を用いて具体的に説明する。
【0020】
(実施例1)
まず、本実施例に係るCuとCuO 粉末から構成される混合粉末の溶射による応力緩和層ついて図2に基づいて述べる。図2において、被溶射材のCu板1には100mm×60mm×3mmtの無酸素銅を用い、応力緩和層2を構成する溶射材料の組成はCu−50体積%CuO とした。Cu粉末及びCuO の平均粒径はそれぞれ20μm,50μmとし、ボールミルで均一に混合した後に用いた。
【0021】
溶射は大気プラズマ溶射とし、厚さ0.8mm の溶射層を形成した。この時の溶射条件は、プラズマ出力が60kW(800A,75V)及びプラズマガスがAr+H である。また、溶射距離は100mmとし、粉末供給量は33g/min、成膜速度は約20μm/パスである。
【0022】
得られた溶射層(応力緩和層2)は、ミクロ組織観察の結果、図2に示すように緻密であり、CuとCuO の混合粉末が溶射時に粒子表面が溶融しつつ飛行し、Cu板に衝撃的に衝突するために、Cu板1との接合界面にはポロシティ等の欠陥も観察されず、健全であった。
【0023】
(実施例2)
図3は、実施例1と同一の条件でCu板1表面に溶射して応力緩和層2を形成した後、900℃に加熱して層の緻密化を図るとともに、CuO を粒状化したもののミクロ組織である。組織中の黒い部分がCuO 相、白い部分がCu相であり、熱処理によってCuOが粒状化したことがわかる。また、CuとCuOの混合粉末は、溶射時に粒子表面が溶融しつつ飛行し、Cu板に堆積する際に急冷凝固されるために、組織が微細である。この結果、強度が向上した。
【0024】
溶射層についてX線回折により酸化物の同定を行った結果、検出された回折ピークはCuO のみであり、溶射層はCuとCuO 粒子からなる複合組織であることを確認した。
【0025】
本実施例では、Cu板への溶射について示したが、Cu合金についても同様の結果が得られる。また、溶射の雰囲気は大気中の他に、不活性ガス中あるいは真空中であっても良い。
【0026】
(実施例3)
図4は、本実施例に係る放熱板を用いたパワー半導体装置の断面図である。半導体素子101は例えばIGBTやパワーMOSであり、セラミック絶縁基板109,放熱板110上に搭載されている。半導体素子101の裏面は半田などの接合材102によってセラミック絶縁基板109上の表面金属配線パターンである金属層106に接続されている。チップ表面側はAl等からなる太線のワイヤ103によってチップ表面電極とセラミック絶縁基板上の金属配線パターンである金属層111が接続された構造となっている。チップ表面はゲル又はモールドレジン105によりコーティングされ、各電極端子は外部引き出し端子に接続され、これらはプラスチック製のケース104内に実装されている。本発明においては、これらのモールドレジン105とケース104が一体材料で構成されたトランスファモールド構造でもよい。このようなパワー半導体モジュールが熱伝導グリース等を介して電力変換器の共通ヒートシンク上に実装され、適宜配線バーを接続することにより電力変換装置が構成されている。本実施例の特徴とするところはパワー半導体モジュールの裏面側で放熱を行う部分の構造に関するものである。すなわち、セラミック絶縁基板109裏面の金属層107は、Cuよりなる放熱板110表面に溶射によって一体成形されたCuとCuO からなる応力緩和層113を介して、放熱板110とはんだ接合(図示せず)された構造となっている。セラミック絶縁基板109は例えばAlNからなり、表裏面にはCuからなる金属層106,107,111があらかじめ銀ローなどの公知の方法で接合されている。
【0027】
以上のように、応力緩和層113としてCu−CuO 複合材を用いているためセラミック絶縁基板109との熱膨張係数差が小さいことにより、また、ヤング率もCuの0.3〜0.6倍程度であるため、熱膨張係数差が無視できない値である場合においても、接合界面に発生する熱応力が減少してセラミック側への応力が緩和され、セラミックの割れや剥離等が避けられる。
【0028】
尚、セラミック絶縁基板はAlNの外にAl,Siなど他の材質でも本発明の構造が適用できるのは言うまでもない。
【0029】
また、本実施例でも放熱板の形状が平板について述べたが、放熱板の背面に複数の冷却用のフィンを設けたヒートシンク及びそれを用いたパワー半導体装置に対しても適用が可能であることは言うまでもない。
【0030】
以上、本実施例によれば、Cu板表面にCuとCuO 粒子からなる混合粉末を溶射して、Cuよりも低熱膨張で、かつヤング率の低いCuとCuO の複合組織を有する応力緩和層を設けた放熱板とすることにより、パワー素子あるいはセラミック絶縁板との接合工程及び使用時の温度サイクルで発生する熱応力を軽減できるので、接合信頼性が高くなる。また、放熱板の反りによる変形も低減できる。
【0031】
【発明の効果】
以上、本発明により、加工性に富み、接合信頼性の高い放熱板を提供することができる。
【図面の簡単な説明】
【図1】本発明に係る銅系放熱板の概略図。
【図2】本発明の実施例1に係る応力緩和層とCu板の接合部断面のミクロ組織を示す光学顕微鏡写真。
【図3】本発明の実施例2に係る応力緩和層とCu板の接合部断面のミクロ組織を示す光学顕微鏡写真。
【図4】本発明の実施例3に係る半導体装置の断面図。
【符号の説明】
1,5,112…Cu板、2,3,113…応力緩和層、4…応力緩和層とCu板の接合面、101…半導体素子、102…接合材、103…ワイヤ、104…ケース、105…ゲル又はモールドレジン、106,107,111…金属層、108…金属層と放熱板の接合面、109…セラミック絶縁基板、110…放熱板。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a heat sink and a method for manufacturing the same.
[0002]
[Prior art]
For power conversion, various power semiconductor elements having on / off functions are used. As this semiconductor device, a rectifier diode having a built-in pn junction and having conductivity in only one direction, and a thyristor, a bipolar transistor, a MOSFET, and the like are put into practical use by a combination structure of various pn junctions. A gate type bipolar transistor (IGBT) and a gate turn-off thyristor (GTO) having a turn-off function by a gate signal have also been developed.
[0003]
These power semiconductor elements generate heat when energized, and the amount of heat generated tends to increase as their capacity and speed increase. In order to prevent the deterioration of the characteristics of the semiconductor element and the shortening of the life of the semiconductor element due to the heat generation, it is necessary to provide a heat radiating section to suppress the temperature rise in the semiconductor element and its vicinity. Generally, a heat radiating member of a semiconductor device including a power semiconductor element is a Si element having a thermal expansion coefficient of 2.6 × 10 −6 to 3.6 × 10 −6 / ° C. directly or through a ceramic insulating plate such as AlN. And a radiating member having a thermal expansion coefficient close to that of the GaAs element of 5.7 × 10 −6 to 6.9 × 10 −6 is desired.
[0004]
Copper is often used as a heat dissipating member because it has a large thermal conductivity of 393 W / m · K and is inexpensive. However, since its thermal expansion coefficient at 300 ° C. is as large as 17 × 10 −6 / ° C., For a semiconductor device having a high capacity, that is, a large amount of heat generated from a semiconductor element, an Al-SiC, Cu-Mo alloy, Cu-W alloy, or the like having a thermal expansion coefficient close to that of Si or GaAs is frequently used. Was.
[0005]
[Problems to be solved by the invention]
Copper has high thermal conductivity at low cost, but has a large coefficient of thermal expansion, which makes it difficult to cope with the recent increase in the amount of heat generated from semiconductor elements. In other words, due to the difference in thermal expansion between the semiconductor element and the ceramic insulating plate, the heat stress at the time of soldering or the thermal stress at the time of use causes thermal deformation of the heat sink, peeling from the solder layer or ceramic insulating plate. This causes problems such as destruction.
[0006]
On the other hand, Al—SiC, Cu—Mo alloy, Cu—W alloy, or the like having a thermal expansion coefficient close to that of Si or GaAs is difficult to arbitrarily control the heat transfer coefficient and the thermal conductivity, and has poor workability. There is a problem that the cost is high.
[0007]
In order to solve the above problem, the present inventors have proposed that a heat radiation plate for more efficiently dissipating heat generated from a power element to the outside of the system is made of copper (Cu) having high thermal conductivity. Alternatively, the thermal stress caused by the difference in thermal expansion coefficient from the ceramic insulating plate can be reduced by forming a stress relaxation layer made of a substance having a smaller thermal expansion coefficient and a lower Young's modulus than Cu at the bonding interface with the power element or the ceramic insulating plate. It was considered effective.
[0008]
As described above, an object of the present invention is to provide a heat sink having high workability and high bonding reliability.
[0009]
[Means for Solving the Problems]
The present invention has been made in view of the above problems.
[0010]
The copper-based heat radiating plate according to the present invention has a smaller thermal expansion coefficient and a lower Young's modulus on the surface of copper (Cu) or a copper (Cu) alloy, and has a thermal expansion coefficient of 8 × 10 −6 from room temperature to 300 ° C. / ° C. to 14 × 10 −6 / ° C., Young's modulus is 35 MPa to 95 MPa, contains 20 to 60% by volume of Cu 2 O, and the balance consists of copper (Cu) and unavoidable impurities, and Cu and Cu 2 O particles And a stress relaxation layer having a composite structure with the above.
[0011]
The method for producing a copper-based heat radiating plate according to the present invention comprises spraying a surface of copper (Cu) or a copper (Cu) alloy using a mixed powder composed of copper (Cu) powder and Cu 2 O powder. It is characterized in that a stress relaxation layer composed of a composite structure of Cu and Cu 2 O particles is integrally formed.
[0012]
Further, in the method for manufacturing a copper-based heat sink according to the present invention, thermal spraying is performed on the surface of copper (Cu) or a copper (Cu) alloy using a mixed powder composed of copper (Cu) powder and Cu 2 O powder. After integrally forming a stress relaxation layer composed of a composite structure of Cu and Cu 2 O particles, the stress relaxation layer is heated to 800 ° C. to 1000 ° C. to densify the stress relaxation layer and granulate the Cu 2 O particles. Features.
[0013]
By using the composition shown in Table 1 composed of Cu and Cu 2 O particles as the composition of the stress relaxation layer formed on the surface of the copper-based heat radiating plate according to the present invention, the power device or the ceramic insulating substrate and the heat radiating plate can be used. Since the difference in the coefficient of thermal expansion can be reduced, the thermal stress generated at the time of a temperature change during the soldering process or during use in the manufacture of a semiconductor device can be reduced, and the bonding reliability can be increased. In addition, deformation due to warpage of the heat sink can be reduced. Further, since the material composed of Cu and Cu 2 O particles has a Young's modulus of about 0.3 to 0.6 times that of Cu, thermal stress relaxation of the power element or the joint portion between the ceramic insulating substrate and the heat sink is further promoted. Thus, deterioration of the joint and the ceramic can be avoided.
[0014]
Here, the stress relaxation layer is preferably composed of Cu containing 20 to 60% by volume of Cu 2 O, and has a coefficient of thermal expansion from room temperature to 300 ° C. of 8 × 10 −6 / ° C. to 14 × 10 −6 / ° C. , And a Young's modulus of 35 MPa to 95 MPa. When the amount of Cu 2 O is 20% by volume or less, both the coefficient of thermal expansion and the Young's modulus increase, and the effect of stress relaxation cannot be obtained. When the amount is 60% by volume or more, the thermal conductivity decreases and thermal diffusion is hindered. This is not preferable because the performance as a heat sink is impaired.
[0015]
The composition and thickness of the stress relaxation layer are selected according to the heat value of the power element and the size and thickness of the heat sink.
[0016]
As shown in FIG. 1, the stress relaxation layer of the heat sink of the present invention has a high bonding strength because the stress relaxation layer 2 is directly formed and bonded on the surface of the Cu plate 1 by thermal spraying, thereby improving the bonding reliability against thermal stress. At the same time, the heat dissipation efficiency is ensured by the high thermal conductivity of the Cu plate 1.
[0017]
The stress relaxation layer formed by the above-described thermal spraying method is subjected to heat treatment at a temperature of 800 ° C. to 1000 ° C., whereby sintering progresses, densification is achieved, and further, Cu 2 O is granulated, resulting in heat conduction. The rate is improved.
[0018]
[Table 1]
Figure 2004083964
[0019]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiments of the present invention will be specifically described with reference to examples and drawings.
[0020]
(Example 1)
First, a stress relaxation layer formed by thermal spraying a mixed powder composed of Cu and Cu 2 O powder according to the present embodiment will be described with reference to FIG. In FIG. 2, oxygen-free copper of 100 mm × 60 mm × 3 mmt was used for the Cu plate 1 as the material to be sprayed, and the composition of the thermal spray material constituting the stress relaxation layer 2 was Cu-50 volume% Cu 2 O 2 . The average particle diameters of Cu powder and Cu 2 O were set to 20 μm and 50 μm, respectively, and used after being uniformly mixed by a ball mill.
[0021]
The thermal spraying was air plasma spraying, and a sprayed layer having a thickness of 0.8 mm was formed. The thermal spraying conditions at this time are a plasma output of 60 kW (800 A, 75 V) and a plasma gas of Ar + H 2 . The spraying distance is 100 mm, the powder supply amount is 33 g / min, and the film forming speed is about 20 μm / pass.
[0022]
As a result of microstructure observation, the obtained sprayed layer (stress relaxation layer 2) is dense as shown in FIG. 2, and the mixed powder of Cu and Cu 2 O flies while the particle surface is melted at the time of spraying. Since the plate impacted the plate, no defect such as porosity was observed at the joint interface with the Cu plate 1 and the plate was sound.
[0023]
(Example 2)
FIG. 3 shows that the stress relaxation layer 2 was formed by spraying on the surface of the Cu plate 1 under the same conditions as in Example 1 and then heated to 900 ° C. to densify the layer and granulate Cu 2 O. The microstructure of the thing. The black part in the structure is the Cu 2 O phase and the white part is the Cu phase, which indicates that the Cu 2 O was granulated by the heat treatment. Further, the mixed powder of Cu and Cu 2 O has a fine structure because the particle surface flies while melting during spraying and is rapidly solidified when deposited on a Cu plate. As a result, the strength was improved.
[0024]
As a result of identifying the oxide on the sprayed layer by X-ray diffraction, the detected diffraction peak was only Cu 2 O, and it was confirmed that the sprayed layer was a composite structure composed of Cu and Cu 2 O particles.
[0025]
In this embodiment, the thermal spraying on the Cu plate is described, but the same result can be obtained with the Cu alloy. The spraying atmosphere may be an inert gas or a vacuum in addition to the air.
[0026]
(Example 3)
FIG. 4 is a cross-sectional view of a power semiconductor device using the heat sink according to the present embodiment. The semiconductor element 101 is, for example, an IGBT or a power MOS, and is mounted on the ceramic insulating substrate 109 and the heat sink 110. The back surface of the semiconductor element 101 is connected to a metal layer 106 as a surface metal wiring pattern on a ceramic insulating substrate 109 by a bonding material 102 such as solder. The chip surface has a structure in which a chip surface electrode and a metal layer 111 which is a metal wiring pattern on a ceramic insulating substrate are connected by a thick wire 103 made of Al or the like. The chip surface is coated with a gel or mold resin 105, and each electrode terminal is connected to an external lead terminal, and these are mounted in a plastic case 104. In the present invention, a transfer mold structure in which the mold resin 105 and the case 104 are formed of an integral material may be used. Such a power semiconductor module is mounted on a common heat sink of a power converter via heat conductive grease or the like, and a power conversion device is configured by connecting wiring bars as appropriate. The feature of the present embodiment relates to the structure of a portion for radiating heat on the back surface side of the power semiconductor module. That is, the metal layer 107 on the back surface of the ceramic insulating substrate 109 is soldered to the heat radiating plate 110 via the stress relaxation layer 113 made of Cu and Cu 2 O integrally formed by spraying on the surface of the heat radiating plate 110 made of Cu (FIG. (Not shown). The ceramic insulating substrate 109 is made of, for example, AlN, and metal layers 106, 107, and 111 made of Cu are previously bonded to the front and back surfaces by a known method such as silver baking.
[0027]
As described above, since the Cu—Cu 2 O composite material is used for the stress relaxation layer 113, the difference in thermal expansion coefficient from the ceramic insulating substrate 109 is small, and the Young's modulus is 0.3 to 0. Since it is about six times, even when the difference in thermal expansion coefficient is a value that cannot be ignored, the thermal stress generated at the bonding interface is reduced, the stress on the ceramic side is relaxed, and cracking and peeling of the ceramic can be avoided. .
[0028]
It goes without saying that the structure of the present invention can be applied to other materials such as Al 2 O 3 and Si 3 N 4 as well as AlN.
[0029]
Also, in this embodiment, the shape of the heat radiating plate is described as a flat plate. Needless to say.
[0030]
As described above, according to the present embodiment, a mixed powder composed of Cu and Cu 2 O particles is sprayed on the surface of a Cu plate to have a composite structure of Cu and Cu 2 O having a lower thermal expansion than Cu and a lower Young's modulus. By using a heat radiating plate provided with a stress relaxation layer, thermal stress generated in the temperature cycle during the bonding step with the power element or the ceramic insulating plate and during use can be reduced, and the bonding reliability is increased. In addition, deformation due to warpage of the heat sink can be reduced.
[0031]
【The invention's effect】
As described above, according to the present invention, it is possible to provide a heat radiating plate having excellent workability and high bonding reliability.
[Brief description of the drawings]
FIG. 1 is a schematic view of a copper-based heat sink according to the present invention.
FIG. 2 is an optical microscope photograph showing a microstructure of a cross section of a joint between a stress relaxation layer and a Cu plate according to Example 1 of the present invention.
FIG. 3 is an optical microscope photograph showing a microstructure of a cross section of a joint between a stress relaxation layer and a Cu plate according to Example 2 of the present invention.
FIG. 4 is a sectional view of a semiconductor device according to a third embodiment of the present invention.
[Explanation of symbols]
1, 5, 112: Cu plate, 2, 3, 113: stress relaxation layer, 4: joint surface between stress relaxation layer and Cu plate, 101: semiconductor element, 102: joining material, 103: wire, 104: case, 105 ... Gel or mold resin, 106, 107, 111 ... metal layer, 108 ... joining surface of metal layer and heat sink, 109 ... ceramic insulating substrate, 110 ... heat sink.

Claims (5)

銅(Cu)もしくは銅(Cu)合金の層と、前記層より熱膨張係数及びヤング率が小さい応力緩和層とが一体形成されていることを特徴とする銅系放熱板。A copper-based heat radiating plate, wherein a copper (Cu) or copper (Cu) alloy layer and a stress relaxation layer having a smaller coefficient of thermal expansion and a smaller Young's modulus than the layer are integrally formed. 前記応力緩和層は、室温から300℃における熱膨張係数が8×10−6/℃〜14×10−6/℃、ヤング率が35MPa〜95MPaであることを特徴とする銅系放熱板。The copper-based heat sink, wherein the stress relaxation layer has a coefficient of thermal expansion from room temperature to 300 ° C. of 8 × 10 −6 / ° C. to 14 × 10 −6 / ° C. and a Young's modulus of 35 MPa to 95 MPa. 前記応力緩和層は、CuO を20〜60体積%含み、残部が銅(Cu)と不可避的不純物からなり、CuとCuO 粒子との複合組織を有することを特徴とする請求項1又は2記載の銅系放熱板。It said stress relaxing layer comprises a Cu 2 O 20 to 60 vol%, claim the balance being copper (Cu) from unavoidable impurities, and having a composite structure of Cu and Cu 2 O particle 1 Or the copper-based heat sink according to 2. 銅(Cu)若しくは銅(Cu)合金の表面に銅(Cu)粉末及びCuO 粉末からなる混合粉末を溶射し、応力緩和層を前記銅若しくは銅合金と一体形成することを特徴とする銅系放熱板の製造方法。Copper, wherein a mixed powder composed of copper (Cu) powder and Cu 2 O powder is sprayed on the surface of copper (Cu) or copper (Cu) alloy to form a stress relaxation layer integrally with the copper or copper alloy. Manufacturing method of heat sink. 銅(Cu)若しくは銅(Cu)合金の表面に銅(Cu)粉末及びCuO 粉末からなる混合粉末を溶射し、応力緩和層を前記銅若しくは銅合金と一体形成する工程と、
前記応力緩和層を加熱する工程と、を有することを特徴とする銅系放熱板の製造方法。
Spraying a mixed powder of copper (Cu) powder and Cu 2 O powder on the surface of copper (Cu) or a copper (Cu) alloy to form a stress relaxation layer integrally with the copper or copper alloy;
Heating the stress relieving layer.
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Publication number Priority date Publication date Assignee Title
EP1951927A1 (en) * 2005-10-27 2008-08-06 The University of British Columbia Fabrication of electrode structures by thermal spraying
JP2009016527A (en) * 2007-07-04 2009-01-22 Toyota Motor Corp Power module, heat radiation plate thereof, and manufacturing method of substrate with joining ceramic layer
WO2011142013A1 (en) * 2010-05-12 2011-11-17 トヨタ自動車株式会社 Semiconductor device
JP2016074935A (en) * 2014-10-03 2016-05-12 富士電機株式会社 Composite powder material for flame spray and flame sprayed insulation base plate
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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1951927A1 (en) * 2005-10-27 2008-08-06 The University of British Columbia Fabrication of electrode structures by thermal spraying
EP1951927A4 (en) * 2005-10-27 2010-12-08 Univ British Columbia Fabrication of electrode structures by thermal spraying
JP2009016527A (en) * 2007-07-04 2009-01-22 Toyota Motor Corp Power module, heat radiation plate thereof, and manufacturing method of substrate with joining ceramic layer
WO2011142013A1 (en) * 2010-05-12 2011-11-17 トヨタ自動車株式会社 Semiconductor device
CN102893389A (en) * 2010-05-12 2013-01-23 丰田自动车株式会社 Semiconductor device
JP5316637B2 (en) * 2010-05-12 2013-10-16 トヨタ自動車株式会社 Semiconductor device
KR101401764B1 (en) 2010-05-12 2014-05-30 도요타지도샤가부시키가이샤 Semiconductor device
US8815646B2 (en) 2010-05-12 2014-08-26 Toyota Jidosha Kabushiki Kaisha Semiconductor device adapted to improve heat dissipation
JP2016074935A (en) * 2014-10-03 2016-05-12 富士電機株式会社 Composite powder material for flame spray and flame sprayed insulation base plate
JP2020505788A (en) * 2017-01-18 2020-02-20 サフラン Method of manufacturing an electronic power module by additive manufacturing and related substrates and modules
JP7034177B2 (en) 2017-01-18 2022-03-11 サフラン How to make electronic power modules by additive manufacturing and related boards and modules

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