JPS59112664A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the characteristic of a semiconductor device from being deteriorated by protecting an InP by an InGaAs until the second growth is started when providing a multilayer structure of InP/InGaAsP series, vanishing it by a melting back, and superposing the second layer. CONSTITUTION:After an n type InP buffer layer 12, an N type In0.67Ga0.33As0.76 P0.30 light absorption layer 13 and an N type InP multiplier layer 14 are superposed on an N type InP substrate 11, an In0.53Ga0.47As film 21 is formed on the surface shortly in approx. one second under the prescribed conditions. A resist mask is covered on a laminate, to which the film 21 is attached, Si ions are implanted to a region 14', and annealed. The layer 14 is protected due to the presence of the film 21 against contamination or deterioration of the surface upon heat treating. Then, after it is sufficiently cleaned with organic solvent, the upper layers of the film 21 and the layer 14 are melt back by selecting the conditions, an N type InP film 15 is superposed, a P<+> type layer 15 is formed, and a P-N junction of a photoreceptor is formed. An SiO2 film 16 is covered, a positive electrode 18 is attached to the entire back surface of a negative electrode 17 and a substrate 1 to complete it. According to this structure, a multilayered semiconductor device can be obtained without causing undesired crystal state.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. For details, see Insoum Phosphorus (InP)/Insium Potassium Arsenic IJ
In a method for manufacturing a semiconductor device having an InGaAsP-based layer structure, a desired layer structure is formed in two divided growth steps, and between the two growth steps, the first growth step is performed. If there is another process that exposes the surface of the layer formed by the process to the outside air, there is a method that can prevent deterioration of the layer interface and realize a good layer structure based on this interruption of growth. Regarding improvements.

(2) Background of the technology When manufacturing a semiconductor device with a multilayer structure of indium phosphide (InP)/indium potassium arsenide phosphide (InGaAsP) using the liquid phase epitaxy epitaxy method (hereinafter referred to as LPE method), the device Due to structural requirements, it may be necessary to divide the growth into two parts.

For example, there is a case where it is necessary to selectively form a high concentration region inside a specific semiconductor layer having a multilayer structure. In this case, as a matter of course, after the desired number of layers have been formed in the first LPE growth process, the growth process is temporarily interrupted, impurities are introduced by ion implantation, etc. The multilayer structure is completed by a second growth step using the L Pg method again. Therefore, due to such interruption of the growth process and another process performed during the interruption period, the top layer of the stack formed in the first growth process and the layer formed in the second growth process are However, it is desirable to prevent this deterioration as much as possible.

(3) Comparative advantages with conventional technology A specific example of a semiconductor device having the above manufacturing process is an avalanche photodiode (hereinafter referred to as API).
That's what it means. ). FIG. 1 is a sectional view showing an example of the basic structure of an APD. In the figure, j is a substrate made of mouth-type indium phosphide (mouth 1 mouth P), 2 is a buffer layer made of n-type indium phosphide (mouth InP), and 3 is 0-type indium gallium arsenide: / (n1nGaAs
4.5 is a carrier multiplication layer made of n-type indium phosphide (ninP);
' is formed in the region corresponding to the light receiving part in layer 4.
5' is a ρ high concentration region formed by diffusion, which constitutes a light receiving section, and a ρn junction is formed at the interface between 5' and 5. Also, 6 is silicon dioxide (8
7υ2), where 7.8 is negative,
It is a positive electrode.

In the prior art, this layer structure 1.2.3.4.4',
In order to realize 5.5', first, the buffer layer 2, the light absorption layer 3, and the lower layer 4 of the carrier multiplication layer are formed on the substrate 1 using the LPE method, and the first growth process is completed. Once, L
The substrate is taken out from the Pg apparatus, and silicon (Si) ions are selectively implanted from the surface of the lower layer 4 of the uppermost layer, a carrier multiplication layer made of type 1 indium phosphide (nInP), to form an n-type high concentration region 4. ′ and then,
The second growth process was performed using the LPE method again.
There is a method in which an upper layer 5 of a multiplication layer made of type indium phosphide (-nlnP) is formed, and a p-type impurity is further diffused into this layer 5 to form a p-type high concentration region 5' constituting a light receiving section. It was used.

However, in the above manufacturing method, after the first growth step, the top layer of n-type i/noumrin (n
The surface of the lower layer 4 of the carrier multiplication layer (InP) becomes contaminated during the masking process associated with ion implantation, and deteriorates during the annealing process to activate the implanted ions. Or, in many cases, phosphorus (P) is sublimated in the temperature raising step prior to the second growth step, resulting in negative effects such as creating vacancies in the crystal. At this time, if the second growth process is performed in the same state, 1
The interface between the top layer after the second growth process (lower layer 4 of the carrier multiplication layer in the above case) and the first layer (upper layer 5 of the multiplication layer in the above case) at the start of the second growth process is defective. This has an adverse effect on the properties, and furthermore, the surface condition of the final layer after the second growth step is not necessarily good.

(4) Purpose of the Invention The purpose of the present invention is to eliminate this drawback.
An object of the present invention is to provide a method for manufacturing a semiconductor device including a step of manufacturing an InGaAs P )-based multilayer structure in two growth steps without causing an undesirable crystalline state.

(5) Structure of the Invention The above objects are (a) a first step of forming a first semiconductor layer of an indium phosphide layer whose upper layer is an indium phosphide layer; and a step of forming an indium phosphide layer on the first semiconductor layer. a second step of forming a second semiconductor layer, a step of forming an indium gallium arsenide thin layer at the final stage of the first step, the upper layer (b) The inflamm gallium arsenide thin layer and, if desired, the upper part of the upper layer are melted back at the beginning of the second step. In the configuration (a) above, the semiconductor device is a light receiving element, the upper layer is a multiplication layer, and ions are selectively added to a partial region of the multiplication layer after the first step. By including an injection process, it can be applied to APD, etc.

The inventor of the present invention believes that the reason for the above-mentioned drawbacks in the prior art is that after the first growth step, during the period when another step is being performed, the top layer of indium phosphide (Ir+
We believe that this is due to the fact that the P) layer is exposed on the surface, so we took some measures to remove this indium phosphide (InP) layer from the end of the first growth process until the start of the second growth process. I came up with the idea that the above drawbacks could be overcome by protecting it.

In order to embody this idea, we developed the above indium phosphide (
As a means of protecting the InP) layer, a thin layer is used that functions as a protective film formed on the surface of this layer, and as a material for forming this thin layer, incium potassium arsenide phosphorus, which has a small mixed crystal ratio of phosphorus, is used. (InGaAsP) is used,
Furthermore, if this thin layer is melted back and disappears at the start of the second growth process, interface deterioration due to interruption of growth can be effectively prevented, and it is as good as achieving the same multilayer structure in one process. It was experimentally confirmed that good characteristics could be obtained and the present invention was completed at °C.

Furthermore, when manufacturing a light receiving element such as an APD using the above method, the following requirements must be met for the material constituting the thin layer that functions as a protective film: In addition to achieving lattice matching with Lamlin (InP), (2) the formation of a resist film in the selection 1' ion implantation step performed when the growth is interrupted, etc. can be easily performed, and (3) the formation of a resist film in the second growth step. For example, when an unsaturated solution of indium (In) and phosphorus (P) is used at the beginning, it is easily melted back and disappears. Indium gallium arsenide phosphide (InGaA), which has a small mixed crystal ratio of phosphorus (P), satisfies these conditions.
sP), preferably inium potassium arsenic.

(InGaAs) especially InO, 53Gap, 47A
s is valid.

By using such a protective film, the top layer, indium phosphide (
The Ink) layer is not exposed to the outside air (and is always kept in a clean state; not only can it be removed, but also phosphorus (P) can be sublimated during the temperature increase process prior to the start of the second growth process). It is also possible to realize benefits such as effective prevention of

In addition, 2
In the second growth step, In/Ram (
In) and phosphorus (1), the degree of unsaturation can be adjusted by the storm of phosphorus (P), and furthermore, by controlling the meltback time, it is possible to control the degree of unsaturation by controlling the meltback time. Indium phosphide (InP), which is the top layer in the first growth step, can be removed by meltbacking or
) If there is a defect on the surface of the layer, it is possible to remove that part by melting it back together with the protective film.
It is more effective in improving characteristics.

(6) Example of Investigation Below, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be explained with reference to the present invention, and the structure of the present invention and the effect of having an internal structure will be clarified. do. - As an example, the manufacturing process of a planar APD that has a guard ring effect and receives light of 1.3 [μIn] will be described.

Refer to FIG. 2. The substrate 11 made of n-type indium phosphide (nInP) (
(a) A buffer layer made of n-type indium phosphide (nine) containing about 10 (cm) of n-type impurities and having a thickness of about 3.4 μlnl was formed on the 100) surface using the LPE method. 12, (b) n-type impurity 5X
n-type inium potassium arsenic phosphorus (nIn0.67Gao33Aso7o) containing about 1015 (can ”)
Po3o) and the thickness is 2. The light absorption layer 13 has a concentration of about 0 [μln], and
n-3] n-type indium phosphide (nlnP)
A lower layer 14 of the multiplication layer having a thickness of about 1.0 [μm] is sequentially formed. In this process each layer 12.1
The growth start temperatures of 3.14 are 656 ['C) and 6, respectively.
48 [0C], 646.5 ('CA Teari, cold M'
Speed i;! 0.71: "C/ +n1n)". Furthermore, the degree of supercooling of the melts used to obtain each layer was all 8 [°C].

Next, indium liumium
(1no5sGao47A,s) Surface protective film 2
form 1. The growth conditions are shown below.

Saturation temperature of solution 'J's = 650 [C] Growth temperature TG = 646 [C] Degree of supercooling
△'f'o = 4 CC] Growth period
t = l sec Under this condition, the growth time is 1
This is a very short time of seconds, which corresponds to the time it takes for the growth solution to pass through the surface of the laminate, and the thickness of the resulting protective film 2I is about 300 [λ] diameter. This layer thickness is a thickness that allows ion implantation in the next step, and if it becomes thicker than this, ion implantation will be hindered. With the above steps, the first growth process is completed. Note that the surface protective film 21 made of indium gallium arsenide (Ino5a Gao47As) is free of indium/gallium arsenide (Ino5a Gao47As) during the cooling process after the first growth.
It also functions as a protective film against lamulin (InP).

Refer to FIG. 3. The laminate 11.12.13.14.21 with the protective film 21 formed on the surface as described above is taken out of the growth apparatus, and the multiplication layer is Ion implantation is performed into a region 14' of the lower layer 14 corresponding to the light receiving portion. That is, after forming a renost film (not shown) on the entire surface of the surface protective layer 21, an opening is formed in a desired region, that is, a region for the light receiving part, using a photolithography method, and using the remaining renost as a mask, silicon (Sl) is formed. ) is implanted into the region 14' using an ion implantation method to a concentration of about 3 to 4×10 [can-3]. After that, in order to activate the implanted ions,
Heat treatment is performed at about 0 [0C] for about 1 hour.

In this process, the area where ion implantation was performed @ 14
Although the depth from the surface of ' is about 0.5Cμ+n,1, since the thickness of the surface protective film 21 is only about 300 [A], no disadvantage occurs at all.

Also, during this process, the protective film 21 is in direct contact with the outside air, and the lower layer 14 of the multiplication layer is always protected, so it is not affected by contamination or surface deterioration due to heat treatment. There isn't.

Refer to Figure 4 After completing the above steps, the laminate is thoroughly washed with a specific solvent, and then a second growth step is performed to remove 5 ll-type impurities.
An upper layer 15 of a multiplication layer of about 3 [μm] in thickness is formed of n-type innoum phosphorus (nInP) containing about 1015 [cm''] of Lower layer 1 of the multiplication layer made of membrane 21 and optionally indium phosphide (InP)
It is possible to remove the upper part of 4 by melting it back with an unsaturated solution consisting of indium [11]) and phosphorus (P). The melt-back conditions at the beginning of the second growth used in this example are shown below.

Saturation temperature of solution 'L"S = 649 [,"J
Meltback start temperature TM = 653 ((:
3 Unsaturation degree Th+-'L's = 41:
'C) Meltback time t = 4sec According to this condition, the thickness of the melted back layer is the same as that of the protective film 21 made of Ibenium potassium arsenide (Ino, 5sUao47As) and the underlying layer indium phosphide (Ino, 5sUao47As).
0 including the upper part of the lower layer 14 of the multiplication layer made of InP)
．． It is about 2 [μmr1]. It goes without saying that the thickness of the layer to be melted back can be set to a desired value by controlling the degree of unsaturation and the meltback time.

Following the meltback step, 0.7 ('C/+n1n
) with a cooling rate of n-type indium phosphide (nInP)
The second growth step is completed by growing the layer 15 to a thickness of about 3 [μ+n].

Finally, type 0 insoumlin (nl) was prepared using a known method.
, nP) layer 15] selectively diffusing cadmium (Cd), which behaves as a p-type impurity, to form a p-type high concentration diffusion layer 15', which is a light receiving part, and forming a pn junction in the light receiving part,
Furthermore, an insulating layer 1 made of silicon dioxide (Si02)
After forming 6, a negative electrode 17 is selectively formed in the pJ diffusion/715' region, and a positive electrode 18 is formed on the entire back surface of the substrate 1, thereby completing APL).

In the above process, the surface of the laminate was observed under a microscope after the second growth process, and it was found that the surface morphology was very good, with slight meltback occurring uniformly over the entire quadrature. confirmed.

In contrast, in the case of the prior art, that is, when the second growth step was performed without using a protective film, even if meltback was performed under the same meltback conditions as in this example,
It was confirmed that meltback was not performed uniformly and the surface morphology deteriorated after the second growth process7.
Furthermore, when we measured the reverse direction dark current of the APD manufactured in the above example, it was found that when the diode diameter was about 100 [μm] and the voltage near breakdown, the value in the conventional technology was about 1 [μA]. On the other hand, the value in this example was approximately 10 [A] diameter, indicating a significant improvement.

In this example, the case where the (100) plane was used as the growth plane was described, but the plane orientation is not limited to this, and other plane orientations such as (111) A plane, (111)
It goes without saying that exactly the same effect can be obtained even when eight sides are used.

According to the present invention, indium phosphide (
Ink) /InGaA
It is possible to provide a method for manufacturing a semiconductor device, which includes a step of manufacturing a multilayer structure based on sP) in two growth steps without causing an undesirable crystalline state.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an example of the basic structure of API), and FIGS. This is the next cross-section of the substrate. 1.11...Substrate (nlnP), 2.12...
...Buffer layer (nInP), 3.13...
...Light absorption layer (n1nGaAs P), 4.14...
・・・Lower layer of 1g layer (nInP), 4', 14'・
...N-type part concentration region corresponding to the light receiving part formed in the lower layer of the multiplication layer, 5.15 ... Multiplier layer upper cloth (nlnP), 5', 15'・・・・・・P-type high concentration region forming the light receiving part, 6.16 ・・・Insulating layer (Si(
J2), 7, 17... Negative electrode, 8, I
8...,...Positive electrode, 21...Surface maintenance film (Ino, s:+Gao41AS) which is the gist of this example
). 1 ・315

Claims (2)

[Claims] (1) A first step of forming a first indium phosphide semiconductor layer whose upper layer is an indium phosphide layer, and a second step of forming a second indium phosphide semiconductor layer on the first semiconductor layer. and a step of forming an indium potassium arsenide phosphide thin layer or an indium potassium arsenide thin layer at the final stage of the first step, and selectively implanting impurities into the upper layer. a step of melting back the indium potassium arsenide thin layer or the indium potassium arsenide thin layer and, if desired, the upper part of the upper layer at the beginning of the second step. Production method. (2) A patent in which the semiconductor device is a light receiving element, the upper layer is a multiplication layer, and an ion implantation step of selectively introducing impurities into a partial region of the multiplication layer after the first step is completed. A method for manufacturing a semiconductor device according to claim 1.