JPS59108134A - 入出力制御方式 - Google Patents

入出力制御方式

Info

Publication number
JPS59108134A
JPS59108134A JP21797982A JP21797982A JPS59108134A JP S59108134 A JPS59108134 A JP S59108134A JP 21797982 A JP21797982 A JP 21797982A JP 21797982 A JP21797982 A JP 21797982A JP S59108134 A JPS59108134 A JP S59108134A
Authority
JP
Japan
Prior art keywords
input
dma
output
register
data transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21797982A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6229831B2 (enrdf_load_stackoverflow
Inventor
Hajime Takagi
一 高木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP21797982A priority Critical patent/JPS59108134A/ja
Publication of JPS59108134A publication Critical patent/JPS59108134A/ja
Publication of JPS6229831B2 publication Critical patent/JPS6229831B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP21797982A 1982-12-13 1982-12-13 入出力制御方式 Granted JPS59108134A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21797982A JPS59108134A (ja) 1982-12-13 1982-12-13 入出力制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21797982A JPS59108134A (ja) 1982-12-13 1982-12-13 入出力制御方式

Publications (2)

Publication Number Publication Date
JPS59108134A true JPS59108134A (ja) 1984-06-22
JPS6229831B2 JPS6229831B2 (enrdf_load_stackoverflow) 1987-06-29

Family

ID=16712722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21797982A Granted JPS59108134A (ja) 1982-12-13 1982-12-13 入出力制御方式

Country Status (1)

Country Link
JP (1) JPS59108134A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61195042A (ja) * 1985-02-25 1986-08-29 アルカテル・エヌ・ブイ データ伝送制御装置
JPH0198048A (ja) * 1987-06-03 1989-04-17 Honeywell Bull Inc 周辺装置制御装置およびアダプタ・インターフェース

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61195042A (ja) * 1985-02-25 1986-08-29 アルカテル・エヌ・ブイ データ伝送制御装置
JPH0198048A (ja) * 1987-06-03 1989-04-17 Honeywell Bull Inc 周辺装置制御装置およびアダプタ・インターフェース

Also Published As

Publication number Publication date
JPS6229831B2 (enrdf_load_stackoverflow) 1987-06-29

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