JPS59105109A - Input/output unit for programmable controller - Google Patents

Abstract

PURPOSE:To improve the reliability of control by connecting a gate outputting a specific logical signal to a data bus and making a CPU unit read a specific logical status of an unused address. CONSTITUTION:The CPU unit 12 incorporating a CPU10 executing and operating a user program is provided with an I/O unit 18 through a data bus 14 and an address bus 16. An address signal from the CPU unit 12 specifies and activates an I/O device 22 selectively through a decoder 20 in the I/O unit 18 and the logical status (ON or OFF) of the I/O device 22 makes the CPU unit 12 execute operate and monitor a user's program. In this case, one Tn of output terminals of the decoder 20 is coupled with the data bus 14 through a gate 24 without being connected to the I/O device 22, and when an unused address is specified from the CPU unit 12, the terminal Tn outputs a specific (OFF) logical signal to the data bus 14 through the gate 24.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a programmable controller in which a CP
This article relates to improvements to the input/output interface that connects the U unit and input/output devices.

In a conventional zologram multiple controller, its input/output system is generally configured as shown in FIG. This programmable controller includes a CPU unit 12 that incorporates a CPU 10 that performs calculations necessary to execute a user program, and one or more input/output units 18 that are connected to a data bus 14 and an address bus 16 that also extend to the CPU unit 12. Be prepared.

The input/output unit 18 has a decoder 20 that decodes an address signal supplied to the CPU unit 12 via the address bus 16, and an input/output device 22 is connected to each decode output side of the decoder 20.

The address signal given from the CPU unit 12 is a signal that selectively specifies a large number of input/output devices 22. That is, this address signal is decoded by the decoder 20 in the input/output unit 18, a decode output corresponding to the designated input/output device 22 is generated, and the input/output device 22 is activated by the decoded output. and the logic state of its input/output device 22 (ON or 0FF)
is output toward the data bus 14. The CPU unit 12 reads the signal on the data bus 14, learns the virtual state of the specified input/output device 22, uses this information for execution calculations of the user zologram, and displays the data on the monitor.

The conventional input/output crab knit described above has the following problems. The input/output devices 22 connected to the input/output crab unit 20 are provided by the user according to the control purpose, and the input/output devices 22 are not necessarily connected to the number of output terminals of the decoder 20. In the usage of actual exclusion,
If the maximum number of input/output devices 22 is not connected to the input/output crab unit 18 and nothing is connected to the output terminal of the decoder 20,
7 I often don't listen.

In the conventional input/output crab unit 18, if the input/output device 22 is not connected to a certain output terminal of the decoder 20, the data bus 14 to which the input/output device 22 should be connected
The signal line is not connected to anything. Therefore, the CPU unit 12 specifies the unused address (the address to which the input/output device 22 is not connected) and
When the signal on the data bus 14 is read, the signal on the data bus 14 corresponding to the non-busy address becomes undefined (floating). This signal indeterminate state on the data bus 14 is very unstable, and there is a risk that the CPU unit 12 may mistakenly read it as "ON" or "OF 1", and perform sequence processing based on the incorrect input/output data. or
There was a risk that the display would be displayed on the monitor.

This invention has been made to solve the above-mentioned conventional problem, and its purpose is to solve the problem of the conventional problem described above.
To provide an input/output crab knit of a programmable controller capable of eliminating unstable elements of control and achieving highly reliable operation by reading a specific cooking state into a U unit.

In order to achieve the above object, the present invention provides the output i1j of the unconnected decoder of the human output device with a gate that becomes active upon receiving the decoded output and outputs a specific logic signal to the data bus. Features.

Hereinafter, preferred embodiments of the present invention will be described based on the drawings.

FIG. 2 shows the output system of a programmable controller to which the input/output crab knit according to the present invention is applied. Second
In the figure, the same parts as in FIG. 1 are denoted by the same reference numerals, and their explanation will be omitted.

In FIG. 2, l1ln indicates one of the many decode output terminals of the decoder 20, and input/output devices 22 are connected to other terminals other than this output terminal Tn.
No input/output device is connected to n. In the input/output crab knit 18 of this invention, the input/output device 22
(not the output terminal l1ln of the decoder 20)
For example, an input terminal of an open collector type gate 24 is connected to the input terminal 24, and the output @ll of this gate 24 is coupled to the data node 14 in the same manner as the other input/output devices 22.

Therefore, when an unused address is designated from the CPU unit 12, the decoded output of the decoder 20 is input to the gate 24, which becomes active, and the corresponding signal line of the data node 14 is connected to the OF signal line.
Outputs a determined specific logic signal F (logic O). Therefore, the CPU unit 12 reads the determined logic signal without any hesitation, and there is no unstable element as in the prior art.

As explained in detail above, due to the input/output crab unit of the programmable controller according to the present invention, some of the input/output devices are not connected (but this may be due to the CP
The reliability of the control by the U unit does not deteriorate, and the desired operation can always be achieved.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an input/output system of a conventional programmable controller, and FIG. 2 is a block diagram of an input/output system of a programmable controller according to an embodiment of the present invention. The same parts in each figure are given the same reference numerals, 10 is the CPU, 1 is
2 is a CPU unit, 14 is a data bus, 16 is an address bus, 18 is a human blade unit, 20 is a decoder, 2
2 is the entrance/exit gate, and 24 is the gate. Agent: Patent attorney Shin Kuzuno - (1 other person) Figure 1

Claims (1)

[Claims] (1) Decode the address signal from the cpty unit with a decoder, specify the corresponding input/output device with the decoded output, output the logical state of the input/output device to the data node, and send it to the CPU unit. In the programmable controller input/output crab knit,
A programmable controller characterized in that %9 is provided with a gate on the decode output side of the decoder to which the input/output device is not connected, which becomes active upon receiving the decode output and outputs a specific logic signal to the data bus. Crab knit in and out.