JPS5899857A - パイプライン処理方式のアクセス処理装置 - Google Patents

パイプライン処理方式のアクセス処理装置

Info

Publication number
JPS5899857A
JPS5899857A JP19674481A JP19674481A JPS5899857A JP S5899857 A JPS5899857 A JP S5899857A JP 19674481 A JP19674481 A JP 19674481A JP 19674481 A JP19674481 A JP 19674481A JP S5899857 A JPS5899857 A JP S5899857A
Authority
JP
Japan
Prior art keywords
data
clock
pipeline
address
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19674481A
Other languages
English (en)
Japanese (ja)
Other versions
JPS614132B2 (OSRAM
Inventor
Masanori Takahashi
正徳 高橋
Minoru Etsuno
越野　実
Akira Hattori
彰 服部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP19674481A priority Critical patent/JPS5899857A/ja
Publication of JPS5899857A publication Critical patent/JPS5899857A/ja
Publication of JPS614132B2 publication Critical patent/JPS614132B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
JP19674481A 1981-12-09 1981-12-09 パイプライン処理方式のアクセス処理装置 Granted JPS5899857A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19674481A JPS5899857A (ja) 1981-12-09 1981-12-09 パイプライン処理方式のアクセス処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19674481A JPS5899857A (ja) 1981-12-09 1981-12-09 パイプライン処理方式のアクセス処理装置

Publications (2)

Publication Number Publication Date
JPS5899857A true JPS5899857A (ja) 1983-06-14
JPS614132B2 JPS614132B2 (OSRAM) 1986-02-07

Family

ID=16362876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19674481A Granted JPS5899857A (ja) 1981-12-09 1981-12-09 パイプライン処理方式のアクセス処理装置

Country Status (1)

Country Link
JP (1) JPS5899857A (OSRAM)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0444136A (ja) * 1990-06-11 1992-02-13 Nec Corp メモリアクセス制御装置
JPH05204741A (ja) * 1992-01-29 1993-08-13 Fujitsu Ltd データ処理装置及びデータ処理方法
JPWO2008155802A1 (ja) * 2007-06-20 2010-08-26 富士通株式会社 キャッシュメモリ制御装置、およびパイプライン制御方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0444136A (ja) * 1990-06-11 1992-02-13 Nec Corp メモリアクセス制御装置
JPH05204741A (ja) * 1992-01-29 1993-08-13 Fujitsu Ltd データ処理装置及びデータ処理方法
JPWO2008155802A1 (ja) * 2007-06-20 2010-08-26 富士通株式会社 キャッシュメモリ制御装置、およびパイプライン制御方法
US8327079B2 (en) 2007-06-20 2012-12-04 Fujitsu Limited Cache memory control device and pipeline control method

Also Published As

Publication number Publication date
JPS614132B2 (OSRAM) 1986-02-07

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