JPS5898933A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5898933A
JPS5898933A JP19786881A JP19786881A JPS5898933A JP S5898933 A JPS5898933 A JP S5898933A JP 19786881 A JP19786881 A JP 19786881A JP 19786881 A JP19786881 A JP 19786881A JP S5898933 A JPS5898933 A JP S5898933A
Authority
JP
Japan
Prior art keywords
film
vapor deposition
deposition method
semiconductor substrate
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19786881A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP19786881A priority Critical patent/JPS5898933A/en
Publication of JPS5898933A publication Critical patent/JPS5898933A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To reduce the boundary level density of a dielectric film by instantaneously emitting a light ray from the surface to the film accumulated on a semiconductor substrate by a chemical vapor deposition method (CVD). CONSTITUTION:A dielectric film 4 or the like such as an SiO2 film or an Si2N4 film or the like is accumulated by a chemical vapor deposition method or vacuum vapor deposition method or the like on upper or lower or both side surfaces of a semiconductor substrate 3 (or a semiconductor film). A light ray such as an ultraviolet ray or visible light ray or infrared ray or the like is emitted instantaneously within 10sec from the surface to the film 4. Accordingly, the boundary between the substrate 3 and the film 4 is instantaneously heated by this light annealing treatment, thereby reducing the boundary level density.

Description

【発明の詳細な説明】 本発明は、半導体装置の製造方法に関する。[Detailed description of the invention] The present invention relates to a method for manufacturing a semiconductor device.

従来、81半導体基**面に直接接する誘電体81o3
や815M4膜等の形W、は熱酸化あるいは熱窒化法に
よるのが通例とされている。その理由は、熱酸化あるい
は熱窒化処理が高量で行なわれ、形成された誘電体膜と
半導体基板との界面準位密度が非常に小さくなるからで
ある。
Conventionally, the dielectric material 81o3 is in direct contact with the 81 semiconductor substrate** surface.
Type W, such as 815M4 and 815M4 films, are usually formed by thermal oxidation or thermal nitridation. The reason for this is that thermal oxidation or thermal nitridation treatment is performed in large quantities, and the interface state density between the formed dielectric film and the semiconductor substrate becomes extremely small.

しかし、上記熱酸化法等による従来技術では、半導体基
板が長時間高iIに晒され九り、81以外の半導体基板
上に熱酸化膜を形成するのが困難になる等の欠点があっ
た。
However, the conventional techniques using the thermal oxidation method and the like have drawbacks such as exposing the semiconductor substrate to high iI for a long time and making it difficult to form a thermal oxide film on semiconductor substrates other than 81.

本発明は、かかる従来技術の欠点をなくシ、化学蒸着(
0’VD)法あるいは真空蒸着法で半導体基板上に堆積
した誘電体膜の界面準位密[會小さくする方法を提供す
ることt目的とする。
The present invention eliminates the drawbacks of the prior art and provides chemical vapor deposition (chemical vapor deposition).
It is an object of the present invention to provide a method for reducing the interface state density of a dielectric film deposited on a semiconductor substrate by a 0'VD method or a vacuum evaporation method.

上記目的1−*成するための本発明の基本的な榔WLは
、半導体基1#lまたは半導体膜の上面または下面ある
いは両面には、化学蒸着法(CVD)あるいは真空蒸着
法等で堆積され次誘電体談のいずれかの表面から光線を
照射することをlFIwlとする。
The basic WL of the present invention for achieving the above object 1-* is deposited on the top surface, bottom surface, or both surfaces of the semiconductor substrate 1#l or the semiconductor film by chemical vapor deposition (CVD), vacuum evaporation, etc. The irradiation of a light beam from any surface of the dielectric material is defined as lFIwl.

以下、本発明を実施例にそって詳細に説明する。Hereinafter, the present invention will be explained in detail with reference to Examples.

いま、日1ウェーハ上にモノ7ランの熱分解により40
℃で1171%oB101膜を形成し、酸素ガス雰囲気
の石英管中に該試料を設置し、a1O@mH面から波長
10μ溝程度の光線を出すランプで光照射1i10秒程
度行ない、8101とslの界面を少なくとも1200
膜程度に瞬時加熱すると、当初81とa1om界面の界
面単位密度がI X 10”/−以上あったものが、5
 X 10S@/jに低減することができる。
Currently, 40
A 1171% oB101 film was formed at ℃, the sample was placed in a quartz tube in an oxygen gas atmosphere, and light irradiation was carried out for about 10 seconds using a lamp that emits a light beam with a wavelength of about 10 μ from the a1O@mH surface. The interface is at least 1200
When instantaneously heated to the level of a film, the interface unit density at the interface between 81 and a1om was I
It can be reduced to X 10S@/j.

第1図は、前記光照射法の概略を示し穴もので、1Fi
石英管、2は試料台、Sは81ウエーハ、4はOVD・
8103膜、5はランプ、6はガス導入口である。
FIG. 1 shows an outline of the light irradiation method and is a hole type.
Quartz tube, 2 is sample stage, S is 81 wafer, 4 is OVD.
8103 membrane, 5 is a lamp, and 6 is a gas inlet.

さらに、B1ウェーハの両面KOVD@810諺膜管形
成した場合には、B1基重そのものは赤外線に対し透明
なため、上面810.と81および下面810sと81
の界面は共°に加熱され、界面単位密[1下げることが
できる。
Furthermore, when forming a double-sided KOVD@810 film tube on the B1 wafer, the top surface 810. and 81 and bottom surface 810s and 81
The interfaces of are heated together, and the interfacial unit density [1] can be lowered.

さらに、照射光の波長が短かい場合には、81のごく表
面を光加熱することとなり、やはり界面準位密IIは低
減できる。
Furthermore, if the wavelength of the irradiation light is short, the very surface of 81 will be optically heated, and the interface state density II can be reduced as well.

さらに、光源として炭酸ガス拳レーザーやカーボンΦに
一グーによる赤外線放射光を用いることもできる。
Further, as a light source, a carbon dioxide gas fist laser or infrared rays emitted from carbon Φ can also be used.

さらに1光照射にパルス状で、且つ+1秒程区の短時間
照射でも同等の効果がある。
Furthermore, the same effect can be obtained even when irradiating one light in a pulsed manner and irradiating for a short period of about +1 second.

以上の如く、光照射アニールにより堆積誘電体膜の界面
準位密度が小さくできることにより、半導体装置製造が
簡便になったり、elや化合物等の低融点半導体基板上
への誘電体膜パッジブイ7シヨンが、安定にかつ容易に
、可能となる効果がある。
As described above, the interface state density of the deposited dielectric film can be reduced by light irradiation annealing, which simplifies the manufacturing of semiconductor devices and makes it easier to apply dielectric films onto low-melting point semiconductor substrates such as EL and compounds. This has the effect of making it possible stably and easily.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明による光子ニール処理法の一実施例を
簡単に示しkものである。 1・・・石英管       2・・・支持台S・・・
81ウエーハ    4・・・誘電体膜5・・・光 源
       6・・・ガス導入口以上
FIG. 1 briefly shows one embodiment of the photon anneal processing method according to the present invention. 1...Quartz tube 2...Support stand S...
81 wafer 4...Dielectric film 5...Light source 6...Gas inlet or above

Claims (1)

【特許請求の範囲】[Claims] 半導体基板ま九は半導体膜の上面または下面、あるいは
両面には、化学蒸着法あるいは真空蒸着法等で堆積され
7’jS i Os膜あるいは8111i4膜等の誘電
体膜等が形成され、該誘電体膜のいずれかの!II向か
ら紫外線、可視光線あるいは赤外線等の光線t−10秒
以内の瞬時照射を行なうことを%黴とする半導体装置の
製造方法。
In the semiconductor substrate, a dielectric film such as a 7'jSiOs film or an 8111i4 film is formed on the upper surface, the lower surface, or both surfaces of the semiconductor film by a chemical vapor deposition method, a vacuum evaporation method, etc. One of the membranes! A method of manufacturing a semiconductor device which involves instantaneous irradiation of ultraviolet light, visible light, infrared light, etc. within t-10 seconds from the II direction.
JP19786881A 1981-12-09 1981-12-09 Manufacture of semiconductor device Pending JPS5898933A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19786881A JPS5898933A (en) 1981-12-09 1981-12-09 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19786881A JPS5898933A (en) 1981-12-09 1981-12-09 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5898933A true JPS5898933A (en) 1983-06-13

Family

ID=16381662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19786881A Pending JPS5898933A (en) 1981-12-09 1981-12-09 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5898933A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6142146A (en) * 1984-07-30 1986-02-28 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Method of treating wafer
US5387546A (en) * 1992-06-22 1995-02-07 Canon Sales Co., Inc. Method for manufacturing a semiconductor device
JPH07321061A (en) * 1994-10-03 1995-12-08 Sony Corp Manufacture of semiconductor device
US6168980B1 (en) 1992-08-27 2001-01-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55123133A (en) * 1979-03-16 1980-09-22 Agency Of Ind Science & Technol Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55123133A (en) * 1979-03-16 1980-09-22 Agency Of Ind Science & Technol Manufacture of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6142146A (en) * 1984-07-30 1986-02-28 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Method of treating wafer
JPH0317373B2 (en) * 1984-07-30 1991-03-07 Intaanashonaru Bijinesu Mashiinzu Corp
US5387546A (en) * 1992-06-22 1995-02-07 Canon Sales Co., Inc. Method for manufacturing a semiconductor device
US6168980B1 (en) 1992-08-27 2001-01-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
JPH07321061A (en) * 1994-10-03 1995-12-08 Sony Corp Manufacture of semiconductor device

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