JPS5895073U - hybrid integrated circuit - Google Patents

hybrid integrated circuit

Info

Publication number
JPS5895073U
JPS5895073U JP19050381U JP19050381U JPS5895073U JP S5895073 U JPS5895073 U JP S5895073U JP 19050381 U JP19050381 U JP 19050381U JP 19050381 U JP19050381 U JP 19050381U JP S5895073 U JPS5895073 U JP S5895073U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
insulating substrate
connector portion
hybrid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19050381U
Other languages
Japanese (ja)
Inventor
田代　忠文
明 岡本
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP19050381U priority Critical patent/JPS5895073U/en
Publication of JPS5895073U publication Critical patent/JPS5895073U/en
Pending legal-status Critical Current

Links

Landscapes

  • Combinations Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のハイブリッドＩＣの一例の正面図、第２
図は従来のハイブリッドＩＣの他の例の斜視図、第３図
は第１図に示したハイブリッドＩＣを搭載したプリント
基板の一例の斜視図、第４図は第２図に示したハイブリ
ッドＩＣを搭載したプリント基板の一例の斜視図、第５
図は本考案の一実施例の平面図、第６図は第５図に示し
た一実施例をソケットに差込んだ状態を示す斜視図であ
る。 １・・・・・・シングル・イン・ライン・パッケージ型
ハイブリッドＩＣ，ｌ’・・曲デュアル；コン・ライン
・パッケージ型ハブリッドＩＣ，２，２’・・・・・・
リード、３．３′・・・・・・プリント基板、４・・曲
絶縁基板、５・・・・・・コネクタ部、６・・藺導体ラ
ンド、７・・・・・・樹脂、８・・曲ソケット。Figure 1 is a front view of an example of a conventional hybrid IC, Figure 2 is a front view of an example of a conventional hybrid IC.
The figure is a perspective view of another example of a conventional hybrid IC, Figure 3 is a perspective view of an example of a printed circuit board on which the hybrid IC shown in Figure 1 is mounted, and Figure 4 is a perspective view of another example of the hybrid IC shown in Figure 2. Perspective view of an example of a mounted printed circuit board, No. 5
The figure is a plan view of one embodiment of the present invention, and FIG. 6 is a perspective view showing the embodiment shown in FIG. 5 inserted into a socket. 1...Single-in-line package type hybrid IC, l'...Song dual; Con line package type hybrid IC, 2,2'...
Lead, 3.3'...Printed circuit board, 4...Curved insulating board, 5...Connector part, 6...Conductor land, 7...Resin, 8... - Song socket.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁基板の一辺に該絶縁基板と一体化してコネクタ部を
設け、前記コネクタ部に平行かつ間隔を置いて複数の導
体ランドを設け、前記導体ランドと前記絶縁基板上の印
刷配線へを接続し、前記絶縁基板に回路部品を搭載接続
し、パッケージングしたことを特徴とする混成集積回路
。A connector portion is provided on one side of the insulating substrate integrally with the insulating substrate, a plurality of conductor lands are provided parallel to the connector portion at intervals, and the conductor lands are connected to printed wiring on the insulating substrate, A hybrid integrated circuit characterized in that circuit components are mounted and connected to the insulating substrate and packaged.
JP19050381U 1981-12-21 1981-12-21 hybrid integrated circuit Pending JPS5895073U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19050381U JPS5895073U (en) 1981-12-21 1981-12-21 hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19050381U JPS5895073U (en) 1981-12-21 1981-12-21 hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS5895073U true JPS5895073U (en) 1983-06-28

Family

ID=30104070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19050381U Pending JPS5895073U (en) 1981-12-21 1981-12-21 hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS5895073U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5146622B1 (en) * 1971-01-14 1976-12-10

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5146622B1 (en) * 1971-01-14 1976-12-10

Similar Documents

Publication Publication Date Title
JPS5895073U (en) hybrid integrated circuit
JPS5844871U (en) wiring board
JPS58118774U (en) electronic circuit package
JPS6115746U (en) Packages for integrated circuits
JPS596862U (en) bus extension board
JPS6066038U (en) IC socket for wrapping
JPS5856464U (en) printed wiring board
JPS5993082U (en) Connectors for electronic equipment
JPS58134873U (en) printed wiring board
JPS5892779U (en) terminal
JPS59115663U (en) Flat integrated circuit package
JPS58144846U (en) Packages for integrated circuits
JPS58111945U (en) semiconductor equipment
JPS5925484U (en) Electronic component mounted card inspection jig
JPS6061743U (en) integrated circuit package
JPS58114064U (en) printed wiring board
JPS5978660U (en) Printed circuit board connection device
JPS5918457U (en) printed wiring board
JPS606242U (en) hybrid integrated circuit
JPS5878678U (en) printed circuit board equipment
JPS59121856U (en) Printed board
JPS6081659U (en) semiconductor equipment
JPS5956756U (en) integrated circuit case
JPS6073277U (en) hybrid integrated circuit board
JPS6057163U (en) hybrid integrated circuit