JPS6061743U - integrated circuit package - Google Patents

integrated circuit package

Info

Publication number
JPS6061743U
JPS6061743U JP15353083U JP15353083U JPS6061743U JP S6061743 U JPS6061743 U JP S6061743U JP 15353083 U JP15353083 U JP 15353083U JP 15353083 U JP15353083 U JP 15353083U JP S6061743 U JPS6061743 U JP S6061743U
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit package
package
power supply
dual
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15353083U
Other languages
Japanese (ja)
Inventor
康之 清水
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP15353083U priority Critical patent/JPS6061743U/en
Publication of JPS6061743U publication Critical patent/JPS6061743U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案によるICパッケージの一実施例を示
す斜視図、第2図は第1図のICパッケージをプリント
板に実装した状態を示す平面図である。 1・・・・・・ICパッケージ、2・・・・・・電源用
メスピンコネクタ、3・・・・・・パワーブス、4・・
・・・・信号ピン、5・・・・・・プリント板。
FIG. 1 is a perspective view showing an embodiment of an IC package according to the present invention, and FIG. 2 is a plan view showing the IC package of FIG. 1 mounted on a printed board. 1...IC package, 2...female pin connector for power supply, 3...power bus, 4...
...Signal pin, 5...Printed board.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] デュアル・インライン・パッケージ形の集積回路パッケ
ージにおいて、電源用端子を該集積回路パッケージの上
面に設けたことを特徴とする集積回路パッケージ。
1. An integrated circuit package of dual in-line package type, characterized in that a power supply terminal is provided on the top surface of the integrated circuit package.
JP15353083U 1983-10-03 1983-10-03 integrated circuit package Pending JPS6061743U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15353083U JPS6061743U (en) 1983-10-03 1983-10-03 integrated circuit package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15353083U JPS6061743U (en) 1983-10-03 1983-10-03 integrated circuit package

Publications (1)

Publication Number Publication Date
JPS6061743U true JPS6061743U (en) 1985-04-30

Family

ID=30339651

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15353083U Pending JPS6061743U (en) 1983-10-03 1983-10-03 integrated circuit package

Country Status (1)

Country Link
JP (1) JPS6061743U (en)

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