JPS5894097U - Serial transmission system clock diagnostic device - Google Patents
Serial transmission system clock diagnostic deviceInfo
- Publication number
- JPS5894097U JPS5894097U JP18582981U JP18582981U JPS5894097U JP S5894097 U JPS5894097 U JP S5894097U JP 18582981 U JP18582981 U JP 18582981U JP 18582981 U JP18582981 U JP 18582981U JP S5894097 U JPS5894097 U JP S5894097U
- Authority
- JP
- Japan
- Prior art keywords
- serial transmission
- clock
- transmission system
- diagnostic device
- system clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
- Electric Clocks (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のシリアル伝送系の概略構成を示すブロッ
ク図、第２図は本発明のシリアル伝送系の一実施例の概
略構成を示すブロック図、第３図 ゛は第２図の実施
例に好適なりロック診断部のブロック図、第４図はクロ
ックが正常な場合のタロツク診断部の動作を示すタイム
チャート、第５図および第６図はクロックが異常な場合
のクロック診断部の動作を示すタイムチャートである。
？ＯＡ・・・・・・＃１装置、ＩＯＢ・・・・・・＃２
装置、２０・・・・・・シリアル伝送線、５ ａＡ、
５０Ｂ・・・・・・クロックジェネレータ、６０・・
・・・・クロック診断部、１ａ〜１１・・・・・・分周
カウンタ、５・・・・・・Ｄラッチ回路、６・・・・・
・ワンショット回路、７・・・・・・比較器、８・・・
・・・イニシャライズ回路。FIG. 1 is a block diagram showing a schematic configuration of a conventional serial transmission system, FIG. 2 is a block diagram showing a schematic configuration of an embodiment of the serial transmission system of the present invention, and FIG. 3 is an example of the embodiment shown in FIG. 2. Figure 4 is a time chart showing the operation of the lock diagnosis unit when the clock is normal, and Figures 5 and 6 are the operation of the clock diagnosis unit when the clock is abnormal. FIG. ? OA...#1 device, IOB...#2
Device, 20... Serial transmission line, 5 aA,
50B...Clock generator, 60...
...Clock diagnostic section, 1a to 11...Divide counter, 5...D latch circuit, 6...
・One-shot circuit, 7... Comparator, 8...
...Initialization circuit.
Claims (1)
、シリアル伝送によって行なうシリアル伝送系のクロッ
ク診断装置において、一方の装置のクロックに基づいて
基準時間パルスを発生する手段と、前記基準時間パルス
によって定められる基準時間の間に発生する他方の装置
のクロックの個数が、許容範囲か否かを判定する手段と
を具備し７たことを特徴とするシリアル伝送系のクロッ
ク診断装置。In a serial transmission type clock diagnosis device in which signal transmission between devices each having its own clock is carried out by serial transmission, means for generating a reference time pulse based on the clock of one device, and means for generating a reference time pulse based on the clock of one device, 7. A clock diagnostic device for a serial transmission system, comprising means for determining whether the number of clocks of the other device occurring during a predetermined reference time is within a permissible range.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18582981U JPS5894097U (en) | 1981-12-15 | 1981-12-15 | Serial transmission system clock diagnostic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18582981U JPS5894097U (en) | 1981-12-15 | 1981-12-15 | Serial transmission system clock diagnostic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5894097U true JPS5894097U (en) | 1983-06-25 |
Family
ID=30102640
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18582981U Pending JPS5894097U (en) | 1981-12-15 | 1981-12-15 | Serial transmission system clock diagnostic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5894097U (en) |
-
1981
- 1981-12-15 JP JP18582981U patent/JPS5894097U/en active Pending
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