JPS6020655U - Abnormality monitoring device for asynchronous bus-coupled computer system - Google Patents

Abnormality monitoring device for asynchronous bus-coupled computer system

Info

Publication number
JPS6020655U
JPS6020655U JP11127283U JP11127283U JPS6020655U JP S6020655 U JPS6020655 U JP S6020655U JP 11127283 U JP11127283 U JP 11127283U JP 11127283 U JP11127283 U JP 11127283U JP S6020655 U JPS6020655 U JP S6020655U
Authority
JP
Japan
Prior art keywords
computer system
abnormality
asynchronous bus
abnormality monitoring
monitoring device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11127283U
Other languages
Japanese (ja)
Other versions
JPH0313798Y2 (en
Inventor
和山　幸夫
八島　一成
Original Assignee
株式会社明電舎
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社明電舎 filed Critical 株式会社明電舎
Priority to JP11127283U priority Critical patent/JPS6020655U/en
Publication of JPS6020655U publication Critical patent/JPS6020655U/en
Application granted granted Critical
Publication of JPH0313798Y2 publication Critical patent/JPH0313798Y2/ja
Granted legal-status Critical Current

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Landscapes

  • Debugging And Monitoring (AREA)
  • Bus Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示すブロック図、第２図は
本考案における異常監視を説明するためのタイムチャー
ト、第３図は本考案における異常監視回路の要部具体的
回路図である。 １・・・ＣＰＵ、　２・・・メモリ、３・・・周辺装置
、４・・・非同期バス、５・・・異常監視回路、６・・
・デバイスコード用バス。Fig. 1 is a block diagram showing an embodiment of the invention, Fig. 2 is a time chart for explaining abnormality monitoring in the invention, and Fig. 3 is a specific circuit diagram of the main part of the abnormality monitoring circuit in the invention. be. 1... CPU, 2... Memory, 3... Peripheral device, 4... Asynchronous bus, 5... Abnormality monitoring circuit, 6...
- Bus for device code.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 非同期バスで結合されるデバイス間で所定のプロトコル
を持った制御信号を使って情報交換されるコンピュータ
システムにおいて、上記非同期バスに乗せられる制御信
号のタイミングプロトコルの異常でマスクデバイスとス
レーブデバイス間の情報交換の異常発牢を判別し、情報
交換時に該マスクデバイスから出力させるデバイスコー
ドを異常発生時に専用のバスから取込んで当該デバイス
を判別する異常監視回路を備えたことを特徴とする非同
期バス結合方式コンピュータシステムの異常監視装置。In a computer system where information is exchanged between devices connected via an asynchronous bus using control signals with a predetermined protocol, information between a mask device and a slave device may be lost due to an abnormality in the timing protocol of the control signal carried on the asynchronous bus. An asynchronous bus connection characterized in that it is equipped with an abnormality monitoring circuit that determines whether an abnormality has occurred in exchange, and when an abnormality occurs, reads a device code output from the masked device from a dedicated bus to identify the device. System computer system abnormality monitoring device.
JP11127283U 1983-07-18 1983-07-18 Abnormality monitoring device for asynchronous bus-coupled computer system Granted JPS6020655U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11127283U JPS6020655U (en) 1983-07-18 1983-07-18 Abnormality monitoring device for asynchronous bus-coupled computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11127283U JPS6020655U (en) 1983-07-18 1983-07-18 Abnormality monitoring device for asynchronous bus-coupled computer system

Publications (2)

Publication Number Publication Date
JPS6020655U true JPS6020655U (en) 1985-02-13
JPH0313798Y2 JPH0313798Y2 (en) 1991-03-28

Family

ID=30258435

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11127283U Granted JPS6020655U (en) 1983-07-18 1983-07-18 Abnormality monitoring device for asynchronous bus-coupled computer system

Country Status (1)

Country Link
JP (1) JPS6020655U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5460532A (en) * 1977-10-21 1979-05-16 Mitsubishi Electric Corp Bus checking system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5460532A (en) * 1977-10-21 1979-05-16 Mitsubishi Electric Corp Bus checking system

Also Published As

Publication number Publication date
JPH0313798Y2 (en) 1991-03-28

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