JPS589361A - Solid state image pickup element - Google Patents

Solid state image pickup element

Info

Publication number
JPS589361A
JPS589361A JP56105580A JP10558081A JPS589361A JP S589361 A JPS589361 A JP S589361A JP 56105580 A JP56105580 A JP 56105580A JP 10558081 A JP10558081 A JP 10558081A JP S589361 A JPS589361 A JP S589361A
Authority
JP
Japan
Prior art keywords
region
substrate
field oxide
film
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56105580A
Other languages
Japanese (ja)
Inventor
Toshiki Suzuki
鈴木 敏樹
Masayuki Hikiba
正行 引場
Koji Yamashita
浩二 山下
Koichi Mayama
真山 晃一
Michio Yamamura
道男 山村
Hideaki Nakanishi
秀明 中西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56105580A priority Critical patent/JPS589361A/en
Publication of JPS589361A publication Critical patent/JPS589361A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • H01L27/14654Blooming suppression

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To prevent vertical smears caused by leak of light by a method wherein the part of a well region just below a field oxide film is made thinner than other parts of the region, when a well region is diffusedly formed on a semiconductor substrate and a field oxide film is provided to divide said substrate and individual well regions after division are provided with a photoelectronic conversion element corresponding to a picture element. CONSTITUTION:A P type well region 2 is diffusedly formed on an N type Si substrate 1 and a thick field oxide film 6 divides the region 2 into a multiplicity of units. An element is constituted when an N type drain region 4 and a source region etc., not illustrated, are provided in the region 2 located on the both sides of the film 6. After this, a coverage is provided by an interlayer insulating film 7, an opening is provided, and Al wirings 9 are attached to the picture element region. In this construction, a part of the region 2 positioned under the film 6 is made thinner so that a depletion layer 13 formed by the region 2 and the substrate 1 reaches a location immediately below the film 6. Thereby the photoelectrons generated by leak of the light 11 are made to flow into the substrate 1 without reaching the region 4.

Description

【発明の詳細な説明】 本発明は、ウェル層を含む3層構造を有する固体撮像素
子に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device having a three-layer structure including a well layer.

従来用いられているこの種の固体撮像素子を鮪1#AK
示す。同図において、態形基板1の一生表面Kp形ウェ
ル層2を形成し、ζζに、1形のソース3およびドレイ
ン4ならびにゲート電極5からなるMOlt )ランジ
スタ詳が構成しである。前記ソース3は、p形つェル層
2と共に光ダイオードをも構成してシシ、この光ダイオ
ードと前記MoBトランジスタとからなる各光電変換素
子は、フィールド酸化膜6および層間絶縁膜7,8によ
シ互に絶縁されると共に、AI配線9によって接続され
ている。また、各フィールド酸化IIIの上方にあたる
層間絶縁膜−の上&1ムj層1・が設けである。
This type of solid-state image sensor that has been used conventionally is called Maguro 1#AK.
show. In the figure, a Kp type well layer 2 is formed on the entire surface of a shaped substrate 1, and a MOlt transistor consisting of a type 1 source 3, drain 4, and gate electrode 5 is constructed at ζζ. The source 3 also constitutes a photodiode together with the p-type well layer 2, and each photoelectric conversion element consisting of this photodiode and the MoB transistor is formed by a field oxide film 6 and interlayer insulating films 7, 8. They are insulated from each other and connected by AI wiring 9. Further, an interlayer insulating film 1 is provided above each field oxide III.

上記構成を有する固体撮像素子において、A1層10を
設けることKよシ、前記ソース3およびp形つェル層2
によって構成される光ダイオードの部分以外から1j!
1#光電変換素子に光が入〕込むことを防止する構造が
とられている。
In the solid-state imaging device having the above configuration, the A1 layer 10 is provided, the source 3 and the p-type well layer 2
1j from the part other than the photodiode formed by !
A structure is adopted to prevent light from entering the 1# photoelectric conversion element.

しかしながら、AI層10は、−直に入射して米る光に
対しては有効な防止手段となるが、第2図に示すように
斜め方向に入射し走光11 、11’は該A4層10を
避けて光電変換素子内に入ル込み、ドレイン4の近傍で
光電子12を発生させる。発生した光電子12は拡散な
いしドリフトによシトレイ74に入り込み、垂直スメア
を発生させる原因となっている。
However, although the AI layer 10 is an effective means for preventing light that is incident directly on the A4 layer 10, the light incident on the A4 layer 10 in an oblique direction as shown in FIG. The photoelectrons enter the photoelectric conversion element while avoiding the photoelectrons 12, and generate photoelectrons 12 near the drain 4. The generated photoelectrons 12 enter the tray 74 by diffusion or drift, causing vertical smear.

零発−はこのような状況に鑑みてなされたものであ〉、
その目的は漏れ光成分による垂直スメアを防止し九固体
撮像素子を提供することKToる。
The zero launch was made in view of this situation.
The purpose is to prevent vertical smear due to leakage light components and provide a solid-state image sensor.

このような目的を達成するために、本発明による固体撮
像素子は、フィールド酸化膜下のウェル層幅を、他部分
よりも薄く構成し九ものである。
In order to achieve such an object, the solid-state imaging device according to the present invention has a well layer width under the field oxide film that is thinner than other parts.

以下、実施例を用いて本発明による固体撮像素子を詳細
に説明する。
Hereinafter, the solid-state imaging device according to the present invention will be described in detail using Examples.

第3図は、本発明による固体撮像素子の一実施例を示す
断面図であシ、第2図と同一部分は同一記号を用いてそ
の詳細説明を省略する。第3図において、態形基板1の
上のシ形ウェル層2は、フィールド酸化膜6の下の部分
において他部分よシ薄く形成しである。このため、p形
つェル層2とn形基板1とKよって形成される空乏層1
3が、フィールド酸化膜6の直15下まで到達している
FIG. 3 is a sectional view showing an embodiment of the solid-state image sensing device according to the present invention, and the same parts as in FIG. 2 are denoted by the same symbols, and detailed explanation thereof will be omitted. In FIG. 3, the rectangular well layer 2 on the shaped substrate 1 is formed to be thinner in the portion below the field oxide film 6 than in other portions. Therefore, the depletion layer 1 formed by the p-type well layer 2, the n-type substrate 1, and K
3 has reached just 15 below the field oxide film 6.

上記構成を有する固体撮像素子において、空乏層ISK
は、n形基板1の方向にプラスの電界がかかつている。
In the solid-state imaging device having the above configuration, the depletion layer ISK
, a positive electric field is applied in the direction of the n-type substrate 1.

従って、漏れ光成分11によってp形つェル層2の内部
に発生し走光電子12は、この電界によってn形基板1
へ流れ込み、ドレイン4の側へは殆んど流れなくなる。
Therefore, phototravel electrons 12 generated inside the p-type well layer 2 due to the leakage light component 11 are transferred to the n-type substrate 1 by this electric field.
, and almost no flow to the drain 4 side.

このため、垂直スメアの発生が大幅に軽減できる。Therefore, the occurrence of vertical smear can be significantly reduced.

なお、上述した実施例においては態形基板1の上にp形
つェル層2を設叶、その上Km形ソース。
In the embodiment described above, the p-type well layer 2 is provided on the shaped substrate 1, and the Km-type source is formed on top of the p-type well layer 2.

ドレイン等を形成したn −p −n構造のものについ
てのみ説明し九が、導電形を逆にし九p−n−p構造の
吃のKついても全く同様に、漏れ光成分によって発生し
た電荷を基板側に吸収して垂直スメアを防止する効果が
得られることは言うまでもない。
We will only explain the n-p-n structure in which the drain etc. are formed, but even if the conductivity type is reversed and the conductivity type is reversed, the charge generated by the leaked light component will be treated in exactly the same way. It goes without saying that the effect of preventing vertical smear by absorbing it on the substrate side can be obtained.

以上説明したように1本発明による固体撮像素子によれ
ば、フィールド酸化膜下のウェル層幅を他部分よシも薄
く構成したことによシ、当該フィールド酸化膜上方にあ
るムj層を避けて入ル込んで来た漏れ光成分によ)嶋該
部分のウェル層に発生する電荷を、そζに発生する空乏
層を利用して11□ 基板側へ流出させてしまうことができる。従って、前記
漏れ電流成分によって発生した電荷がドレインに流れ込
むことを防止でき、垂直スメアを低減させることができ
るため、S/N比が大幅に増加して性能が向上するとい
う優れた効果を有する。
As explained above, according to the solid-state imaging device according to the present invention, the width of the well layer under the field oxide film is made thinner than other parts, so that the muj layer above the field oxide film can be avoided. Charges generated in the well layer at this portion due to the leaked light components entering the well layer can be caused to flow out to the substrate side by using the depletion layer generated there. Therefore, charges generated by the leakage current component can be prevented from flowing into the drain, and vertical smear can be reduced, resulting in an excellent effect of significantly increasing the S/N ratio and improving performance.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は従来の一体操像素子を示す断面図
、第3図は本発明による固体撮像素子の断面図である。 1・・・・態形基板、2・−・・p形りエル層、3・・
・・ソース、4・・・Φドレイン、5・・・・ゲート電
極、6・・・・フィールド酸化膜。 2
1 and 2 are cross-sectional views showing a conventional solid-state image sensor, and FIG. 3 is a cross-sectional view of a solid-state image sensor according to the present invention. 1... shape substrate, 2... p-shaped L layer, 3...
... Source, 4...Φ drain, 5... Gate electrode, 6... Field oxide film. 2

Claims (1)

【特許請求の範囲】[Claims] 第1導電形を有する半導体基板の一主表面に館2導電形
を有する半導体からなるウェル層を設け、このウェル層
上に光ダイオードとこの光ダイオードを構成要素の一部
とするスイッチ用トランジスタとからな)それヤれ1画
素に対応する複数の光電変換素子を亙にフィールド酸化
膜で分離して配置し、前記ウェル層は、前記フィールド
酸化膜の下において他部分よ〉も薄く構成しであること
を特徴とする固体撮像素子。
A well layer made of a semiconductor having a second conductivity type is provided on one main surface of a semiconductor substrate having a first conductivity type, and a photodiode and a switching transistor having the photodiode as a component are formed on the well layer. In other words, a plurality of photoelectric conversion elements corresponding to one pixel are separated by a field oxide film, and the well layer is made thinner than other parts below the field oxide film. A solid-state image sensor characterized by the following.
JP56105580A 1981-07-08 1981-07-08 Solid state image pickup element Pending JPS589361A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56105580A JPS589361A (en) 1981-07-08 1981-07-08 Solid state image pickup element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56105580A JPS589361A (en) 1981-07-08 1981-07-08 Solid state image pickup element

Publications (1)

Publication Number Publication Date
JPS589361A true JPS589361A (en) 1983-01-19

Family

ID=14411438

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56105580A Pending JPS589361A (en) 1981-07-08 1981-07-08 Solid state image pickup element

Country Status (1)

Country Link
JP (1) JPS589361A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59207640A (en) * 1983-05-11 1984-11-24 Hitachi Ltd Semiconductor device
EP1178534A2 (en) * 2000-06-28 2002-02-06 Kabushiki Kaisha Toshiba MOS type solid-state imager and manufacturing method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51150288A (en) * 1975-06-09 1976-12-23 Philips Nv Video sensor
JPS53127283A (en) * 1977-04-13 1978-11-07 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
JPS54152870A (en) * 1978-05-23 1979-12-01 Pioneer Electronic Corp Semiconductor device
JPS55110476A (en) * 1979-02-19 1980-08-25 Hitachi Ltd Solidstate image sensor
JPS5755672A (en) * 1980-09-19 1982-04-02 Nec Corp Solid-state image pickup device and its driving method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51150288A (en) * 1975-06-09 1976-12-23 Philips Nv Video sensor
JPS53127283A (en) * 1977-04-13 1978-11-07 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
JPS54152870A (en) * 1978-05-23 1979-12-01 Pioneer Electronic Corp Semiconductor device
JPS55110476A (en) * 1979-02-19 1980-08-25 Hitachi Ltd Solidstate image sensor
JPS5755672A (en) * 1980-09-19 1982-04-02 Nec Corp Solid-state image pickup device and its driving method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59207640A (en) * 1983-05-11 1984-11-24 Hitachi Ltd Semiconductor device
JPH0522396B2 (en) * 1983-05-11 1993-03-29 Hitachi Ltd
EP1178534A2 (en) * 2000-06-28 2002-02-06 Kabushiki Kaisha Toshiba MOS type solid-state imager and manufacturing method thereof
EP1178534B1 (en) * 2000-06-28 2009-04-08 Kabushiki Kaisha Toshiba MOS type solid-state imager with an isolation region

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