JPS5893282A - Thin film semiconductor element - Google Patents
Thin film semiconductor elementInfo
- Publication number
- JPS5893282A JPS5893282A JP19212981A JP19212981A JPS5893282A JP S5893282 A JPS5893282 A JP S5893282A JP 19212981 A JP19212981 A JP 19212981A JP 19212981 A JP19212981 A JP 19212981A JP S5893282 A JPS5893282 A JP S5893282A
- Authority
- JP
- Japan
- Prior art keywords
- film
- thin film
- thin
- semiconductor
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 239000010409 thin film Substances 0.000 title claims description 20
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 abstract description 5
- 239000011521 glass Substances 0.000 abstract description 4
- 230000010354 integration Effects 0.000 abstract description 3
- 230000005611 electricity Effects 0.000 abstract description 2
- 239000011229 interlayer Substances 0.000 abstract description 2
- 230000003068 static effect Effects 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 8
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 description 3
- 229910021344 molybdenum silicide Inorganic materials 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、ＴＦＴ（Ｔｈｉｎ Ｆｉｌｍ Ｔｒａｎ
ａｉｓｔｏｒ）などの薄膜半導体素子の構造に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention utilizes TFT (Thin Film Tran)
This invention relates to the structure of thin film semiconductor devices such as AISTOR.
ガラスなどの絶縁性基板上に、多結晶シリコンなどの半
導体薄膜を形成して、素子を作る薄膜半導体素子が、省
資源、低コストの点から注目され、その低コストの点か
ら従来大面積のものが作ることの出来なかった、表示体
素子などへの応用が考えられている。さて本発明は、集
積度の高い構造を有する薄膜半導体素子の構造を提供す
るものである。第１図で、その断面構造を示す。ガラス
基板１０１の上に、金属薄膜等の導伝性物質の薄膜１０
２を形成する。本発明の実施例においては、モリブデン
珪化物を、気相成長法により形成した。次に、絶縁膜と
して酸化シリコン膜１０３を、堆積させ一部は、除去し
てあり、多結晶シリコン膜１０４の拡散層１０５とモリ
ブデン珪化膜と電気的に接続されている。ここでは、Ｍ
ＯＳ（Ｍｅｔａｌ ０ｘｉｄｅ Ｓｅｍ１ｃｏｎｄ
ｕｃｔｏｒ）構造の素子であるので、ゲート膜１０９を
介してゲート電極１０６を、多結晶シリコンで形成して
いる。次に、層間絶縁膜１０７を、堆積させ、コンタク
トホールを形成したのち、アルミニウムにより上部配線
１０８を形成した。Thin-film semiconductor devices, which are made by forming semiconductor thin films such as polycrystalline silicon on insulating substrates such as glass, have attracted attention because of their resource saving and low cost. Applications are being considered for display elements, etc., which could not be manufactured using conventional methods. The present invention provides a structure of a thin film semiconductor device having a highly integrated structure. FIG. 1 shows its cross-sectional structure. A thin film 10 of a conductive material such as a thin metal film is formed on a glass substrate 101.
form 2. In the examples of the present invention, molybdenum silicide was formed by vapor phase growth. Next, a silicon oxide film 103 is deposited as an insulating film and a portion thereof is removed, and is electrically connected to the diffusion layer 105 of the polycrystalline silicon film 104 and the molybdenum silicide film. Here, M
OS (Metal Oxide Sem1cond
Since this is an element having a .ctor structure, the gate electrode 106 is formed of polycrystalline silicon with the gate film 109 interposed therebetween. Next, an interlayer insulating film 107 was deposited, contact holes were formed, and then upper interconnections 108 were formed from aluminum.
このような構造を有する薄膜半導体素子の特長は次に示
す多くの利点をもつ。The thin film semiconductor device having such a structure has many advantages as shown below.
（１） 半導体薄膜下に、配線層をもつので、集積度
を上ることが出来る。(1) Since there is a wiring layer under the semiconductor thin film, the degree of integration can be increased.
（２） 従来の方法つまり絶縁基板上に直に半導体簿
膜を形成し案子化したものが、静電気、外部からのチャ
ージ等に弱かったのに比べ、半導体薄膜下に、導伝体が
存在するため、上記の欠点を押えることが出来る。(2) Compared to the conventional method, which involves forming a semiconductor thin film directly on an insulating substrate and making it a shield, it is vulnerable to static electricity and external charges, whereas a conductor exists under the semiconductor thin film. Therefore, the above drawbacks can be suppressed.
（３） 配線の多層化が有利である。(3) Multilayer wiring is advantageous.
第１図が、本発明の断面図である。
１０１が、ガラス基板、１０２は、モリブデン珪化膜で
ある。
以 上
出願人 株式会、社詠訪精工舎
３９６−FIG. 1 is a cross-sectional view of the present invention. 101 is a glass substrate, and 102 is a molybdenum silicide film. Applicants: Co., Ltd., Shaeiwa Seikosha 396-
Claims (1)
成し、半導体薄膜を形成し、該半導体薄膜上に、半導体
素子が形成され、該半導体素子の一部が、該導伝性薄膜
と電気的に接続され、該導伝性薄膜が、該半導体素子の
配線として用いられていることを特徴とする薄膜半導体
素子。A conductive thin film is formed on an insulating substrate, an insulating thin film is formed, a semiconductor thin film is formed, a semiconductor element is formed on the semiconductor thin film, and a part of the semiconductor element is formed on the conductive thin film. 1. A thin film semiconductor device, characterized in that the conductive thin film is electrically connected to a conductive thin film, and the conductive thin film is used as wiring for the semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19212981A JPS5893282A (en) | 1981-11-30 | 1981-11-30 | Thin film semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19212981A JPS5893282A (en) | 1981-11-30 | 1981-11-30 | Thin film semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5893282A true JPS5893282A (en) | 1983-06-02 |
Family
ID=16286153
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19212981A Pending JPS5893282A (en) | 1981-11-30 | 1981-11-30 | Thin film semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5893282A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60143656A (en) * | 1983-12-29 | 1985-07-29 | Fujitsu Ltd | Semiconductor device |
| JPS60200564A (en) * | 1984-03-24 | 1985-10-11 | Mitsubishi Electric Corp | Thin film semiconductor element integrated circuit device |
| JPS62171161A (en) * | 1986-01-23 | 1987-07-28 | Nec Corp | Method for semiconductor thin film |
| US4695856A (en) * | 1983-08-19 | 1987-09-22 | Hitachi, Ltd. | Semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5740973A (en) * | 1980-08-25 | 1982-03-06 | Toshiba Corp | Inverter circuit and manufacture therefor |
-
1981
- 1981-11-30 JP JP19212981A patent/JPS5893282A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5740973A (en) * | 1980-08-25 | 1982-03-06 | Toshiba Corp | Inverter circuit and manufacture therefor |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4695856A (en) * | 1983-08-19 | 1987-09-22 | Hitachi, Ltd. | Semiconductor device |
| JPS60143656A (en) * | 1983-12-29 | 1985-07-29 | Fujitsu Ltd | Semiconductor device |
| JPS60200564A (en) * | 1984-03-24 | 1985-10-11 | Mitsubishi Electric Corp | Thin film semiconductor element integrated circuit device |
| JPS62171161A (en) * | 1986-01-23 | 1987-07-28 | Nec Corp | Method for semiconductor thin film |
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