JPS6193663A - Amorphous silicon transistor - Google Patents
Amorphous silicon transistorInfo
- Publication number
- JPS6193663A JPS6193663A JP21475984A JP21475984A JPS6193663A JP S6193663 A JPS6193663 A JP S6193663A JP 21475984 A JP21475984 A JP 21475984A JP 21475984 A JP21475984 A JP 21475984A JP S6193663 A JPS6193663 A JP S6193663A
- Authority
- JP
- Japan
- Prior art keywords
- amorphous silicon
- electrode
- transistor
- film
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910021417 amorphous silicon Inorganic materials 0.000 title claims abstract description 31
- 229910052782 aluminium Inorganic materials 0.000 abstract description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 11
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 5
- 229910000077 silane Inorganic materials 0.000 abstract description 4
- 239000011521 glass Substances 0.000 abstract description 3
- 239000000758 substrate Substances 0.000 abstract description 3
- 229910003437 indium oxide Inorganic materials 0.000 abstract description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 abstract description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 abstract description 2
- 229910001887 tin oxide Inorganic materials 0.000 abstract description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 abstract 2
- 229910000073 phosphorus hydride Inorganic materials 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 239000012212 insulator Substances 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910001120 nichrome Inorganic materials 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/7317—Bipolar thin film transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/11—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers or surface barriers, e.g. bipolar phototransistor
- H01L31/1105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers or surface barriers, e.g. bipolar phototransistor the device being a bipolar phototransistor
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に係り、特に、アモルファスシリコ
ントランジスタの新しい構造に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a new structure of an amorphous silicon transistor.
アモルファスシリコシトランジスタはガラスやセラミッ
クの基板上に気相成長法でアモルファスシリコン膜（以
下ａ−３ｉ：）（膜と略す）が形成されるために、単結
晶シリコンを使用したトランジスタと異なり、他のデバ
イスの駆動素子として直接そのデバイス上に形成できる
利点があり、近年開発が進められている。しかし、単結
晶を使用したトランジスタと異なり、まだ動作電圧、安
定性等に問題があり、新しいアモルファスシリコンデバ
イスの開発が要望されている。Amorphous silicon transistors differ from transistors using single crystal silicon because an amorphous silicon film (hereinafter a-3i) (abbreviated as film) is formed on a glass or ceramic substrate by vapor phase growth. It has the advantage that it can be formed directly on a device as a driving element of the device, and its development has been progressing in recent years. However, unlike transistors using single crystals, there are still problems with operating voltage, stability, etc., and there is a demand for the development of new amorphous silicon devices.
第３図は従来のアモルファスシリコントランジスタの構
造を説明するための膜部分の断面図で、ガラス基板２１
上にアルミニウムまたはニクロム等の電極２２が形成さ
れ、その電極２２を覆うように、ＳｉＯ□等の絶縁物２
３が設けられ、その上に１ａ−３ｔ：Ｈ膜２４およびオ
ーミックコンタクト用のｎ”ａ−Ｓｔ：Ｈ膜２５が順次
プラズマＣＶＤ法で形成され、最後に２つのアルミニウ
ム等の”Ｋ Ｗ ２６ 。FIG. 3 is a cross-sectional view of a film portion for explaining the structure of a conventional amorphous silicon transistor.
An electrode 22 such as aluminum or nichrome is formed on top, and an insulating material 2 such as SiO□ is formed to cover the electrode 22.
3, a 1a-3t:H film 24 and an n''a-St:H film 25 for ohmic contact are sequentially formed thereon by plasma CVD, and finally two ``K W 26'' films of aluminum or the like are formed.
２７が設けられている。27 are provided.
この膜構成において、金属の電極２２をベース電極に、
ｎ＋層上の金属の電極２６．２７をそれぞれエミッタ電
極およびコレクタ電極として外部に接続されてアモルフ
ァスシリコントランジスタが完成される。In this membrane configuration, the metal electrode 22 is used as a base electrode,
The metal electrodes 26 and 27 on the n+ layer are connected to the outside as an emitter electrode and a collector electrode, respectively, to complete an amorphous silicon transistor.
上記従来のアモルファスシリコントランジスタにあって
は、絶縁層を介して金属電極とアモルファスシリコンが
配置された構造のため、駆動電極が高く数十■にもなる
。また、従来の構造では素子の駆動が１ａ−３ｉ：Ｈ膜
と絶縁物の界面で行われるため制御が難しいという問題
があった。In the conventional amorphous silicon transistor described above, since the metal electrode and the amorphous silicon are arranged with an insulating layer interposed therebetween, the drive electrode is as high as several tens of square meters. Further, in the conventional structure, since the element is driven at the interface between the 1a-3i:H film and the insulator, control is difficult.
本発明は上記問題点を解消した新規なトランジスタを提
供するもので、その手段は、ｎ″−ｉｐ・ｉｎ″″構造
のアモルファスシリコン膜において、ｎ゛層およびｐ゛
層より電極が取り出されたアモルファスシリコントラン
ジスタによって解決される。The present invention provides a novel transistor that solves the above-mentioned problems, and its means are such that, in an amorphous silicon film having an n''-ip-in'' structure, electrodes are taken out from the n' layer and the p' layer. The solution is an amorphous silicon transistor.
上記構造のトランジスタにおいては、並列に形成された
２つのｐｉｎダイオードのｐ側を共通にしてベース電極
にするため、絶縁層を介して金属電極とアモルファスシ
リコンが接続されず、金属電極とｐ”ａ−３ｉ：Ｈ膜の
接続となり、バルクの接合電位を利用しているために安
定で、且つ、駆動電圧が低くなる。In the transistor with the above structure, the p side of the two pin diodes formed in parallel is used as a common base electrode, so the metal electrode and amorphous silicon are not connected through the insulating layer, and the metal electrode and p"a -3i: This is a connection of the H film, and since the bulk junction potential is utilized, it is stable and the driving voltage is low.
以下、図面を参照して本発明の実施例を詳細に説明する
。Embodiments of the present invention will be described in detail below with reference to the drawings.
第１図は本発明のアモルファスシリコントランジスタの
構造を説明するための、膜部分の断面図で、ガラス基板
１に設けられたアルミニうムの電極２上に並列して、プ
ラズマＣＶＤ法でジポラン（ｓｚ Ｈｈ ）を添加した
シラン（ＳｉＨ４）から１００人のｐ”ａ−３ｔ：Ｈ膜
３，４、続いて、シランから５０００人の１ａ−３ｉ：
Ｈ膜５，６、さらに、ホスフィン（ＰＨｓ）を添加した
シランから２００〜５００人のｎ”ａ−３ｉ：Ｈ膜７，
８、の２つのｐｉｎ型ダイオードが形成され、ｎ゛層上
アルミニウムの電極９．１０が蒸着されている。FIG. 1 is a cross-sectional view of a film portion for explaining the structure of the amorphous silicon transistor of the present invention. 100 p”a-3t:H films from silane (SiH4) doped with sz Hh ), followed by 5000 p”a-3i from silane:
H film 5, 6, and 200 to 500 n”a-3i:H film 7,
Two pin type diodes 8, 8, are formed and electrodes 9, 10 of n' layer aluminum are deposited.
この膜構成において、共通のアルミニウムの電極２をベ
ース電極に、ｎ４層上のアルミニウムの電極９，１０を
それぞれエミッタ電極およびコレクタ電極として外部に
接続されてアモルファスシリコントランジスタが完成さ
れる。このトランジスタは動作電圧が数Ｖ程度で動作す
る。In this film configuration, the common aluminum electrode 2 is connected to the outside as a base electrode, and the aluminum electrodes 9 and 10 on the n4 layer are connected to the outside as an emitter electrode and a collector electrode, respectively, thereby completing an amorphous silicon transistor. This transistor operates at an operating voltage of about several volts.
なお、この構成のトランジスタにおいて共通のベース電
極を酸化錫または酸化インジウム等の透明導電膜にすれ
ば、ホトトランジスタとして機能させることも可能であ
る。Note that if the common base electrode in the transistors having this configuration is made of a transparent conductive film such as tin oxide or indium oxide, it is also possible to function as a phototransistor.
第２図は集積度を高めるために、２つのダイオードを積
み上げたアモルファスシリコントランジスタの構造を説
明するための膜部分の断面図で、ガラス基板１１上に形
成されたアルミニウムの電極１２上にプラズマＣＶＤ法
でｎ”ａ−３ｉ：Ｈ膜１３゜１ａ−３ｔ：Ｈ膜１４．ｐ
″ａ−３ｉ：）（膜１５が順次形成され、その上に白金
電極１６が設けられ、さらに、ｐ” ａ−３ｉ ： Ｈ
Ｉｉ１７＋ ｉ ａ−３ｉ ： Ｈ膜１８、 ｎ’
″ａ−３ｉ：）（膜１９が順次プラズマＣＶＤ法で形成
され、最上部にアルミニウムの電極２０が設けられてい
る。FIG. 2 is a cross-sectional view of a film part to explain the structure of an amorphous silicon transistor in which two diodes are stacked to increase the degree of integration. n”a-3i:H film 13°1a-3t:H film 14.p
"a-3i:) (film 15 is sequentially formed, a platinum electrode 16 is provided thereon, and p"a-3i: H
Ii17+ i a-3i: H film 18, n'
``a-3i:'' (The film 19 is sequentially formed by the plasma CVD method, and an aluminum electrode 20 is provided on the top.
この膜構成において、白金電極１６をベース電極に、ア
ルミニウムの電極１２．２０をそれぞれ工゛ミッタ電極
およびコレクタ電極として外部に接続されて、アモルフ
ァスシリコントランジスタが完成される。この構造では
膜形成工程が多くなる反面、立体的に配置されるため集
積度が向上する。In this film configuration, the platinum electrode 16 is connected to the outside as a base electrode, and the aluminum electrodes 12 and 20 are connected to the outside as an emitter electrode and a collector electrode, respectively, to complete an amorphous silicon transistor. Although this structure requires more film formation steps, it improves the degree of integration because it is arranged three-dimensionally.
以上説明したように本発明によれば、膜形成には従来の
プラズマＣＶＤ法が使用でき、アモルファスシリコン膜
と電極の接続面で、接合の電位差を利用しているために
、駆動電圧の低電圧化、大電流化が計られ、且つ、安定
化に効果がある。As explained above, according to the present invention, the conventional plasma CVD method can be used for film formation, and since the potential difference of the junction is used at the connection surface between the amorphous silicon film and the electrode, the driving voltage is low. It is possible to increase the current and increase the current, and is effective for stabilization.
第１図は本発明のアモルファスシリコントランジスタの
構造を説明するための膜部分の断面図、第２図は集積度
を高めるために、２つのダイオードを積み上げたアモル
ファスシリコントランジスタの構造を説明するための膜
部分の断面図、第３図は従来のアモルファスシリコント
ランジスタの構造を説明するための膜部分の断面図であ
る。
図において、
１．１１．２１はガラス基板、
２、 ９．１０．１２．１６．２０．２２．２６．２７
は電極、３、 ４．１５．１７はｐ′″ａ−３ｉ：Ｈ膜
、５、 ６．１４．１８．２４は１ａ−３ｔ：Ｈ膜、７
、 ８．１３．１９．２５はｎ”ａ−３ｉ：Ｈ膜、２３
は絶縁物、
をそれぞれ示す。
第１図
第２図 第３図FIG. 1 is a cross-sectional view of a membrane portion for explaining the structure of an amorphous silicon transistor of the present invention, and FIG. 2 is a cross-sectional view for explaining the structure of an amorphous silicon transistor in which two diodes are stacked to increase the degree of integration. 3 is a sectional view of a membrane portion for explaining the structure of a conventional amorphous silicon transistor. In the figure, 1.11.21 is a glass substrate, 2, 9.10.12.16.20.22.26.27
is electrode, 3, 4.15.17 is p′″a-3i:H film, 5, 6.14.18.24 is 1a-3t:H film, 7
, 8.13.19.25 is n”a-3i:H film, 23
indicates an insulator, and indicates an insulator, respectively. Figure 1 Figure 2 Figure 3
Claims (1)
コン膜およびｐ＾＋アモルファスシリコン膜の積層構造
を有する２つのｐｉｎダイオードのｐ＾＋アモルファス
シリコン膜が共通に接続されてベース電極が設けられ、
２つのｎ＾＋アモルファスシリコン膜にそれぞれエミッ
タ電極およびコレクタ電極が設けられて成ることを特徴
とするアモルファスシリコントランジスタ。The p^+ amorphous silicon films of two pin diodes having a laminated structure of an n^+ amorphous silicon film, an i amorphous silicon film, and a p^+ amorphous silicon film are connected in common to provide a base electrode,
An amorphous silicon transistor characterized in that two n^+ amorphous silicon films are each provided with an emitter electrode and a collector electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21475984A JPS6193663A (en) | 1984-10-12 | 1984-10-12 | Amorphous silicon transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21475984A JPS6193663A (en) | 1984-10-12 | 1984-10-12 | Amorphous silicon transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6193663A true JPS6193663A (en) | 1986-05-12 |
Family
ID=16661079
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21475984A Pending JPS6193663A (en) | 1984-10-12 | 1984-10-12 | Amorphous silicon transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6193663A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5060041A (en) * | 1987-11-12 | 1991-10-22 | Ricoh Research Institute Of General Electronics | Amorphous silicon photosensor |
| US5298455A (en) * | 1991-01-30 | 1994-03-29 | Tdk Corporation | Method for producing a non-single crystal semiconductor device |
| US5576222A (en) * | 1992-01-27 | 1996-11-19 | Tdk Corp. | Method of making a semiconductor image sensor device |
| US5677551A (en) * | 1994-11-15 | 1997-10-14 | Fujitsu Limited | Semiconductor optical device and an optical processing system that uses such a semiconductor optical system |
| WO2007119490A1 (en) * | 2006-03-22 | 2007-10-25 | Osaka University | Transistor element, its manufacturing method, light emitting element, and display |
| JP2009007985A (en) * | 2007-06-27 | 2009-01-15 | Ogura Clutch Co Ltd | Air supply system |
| US8629865B2 (en) | 2007-12-14 | 2014-01-14 | Koninklijke Philips N.V. | Organic light-emitting device with adjustable charge carrier injection |
-
1984
- 1984-10-12 JP JP21475984A patent/JPS6193663A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5060041A (en) * | 1987-11-12 | 1991-10-22 | Ricoh Research Institute Of General Electronics | Amorphous silicon photosensor |
| US5298455A (en) * | 1991-01-30 | 1994-03-29 | Tdk Corporation | Method for producing a non-single crystal semiconductor device |
| US5442198A (en) * | 1991-01-30 | 1995-08-15 | Tdk Corporation | Non-single crystal semiconductor device with sub-micron grain size |
| US5576222A (en) * | 1992-01-27 | 1996-11-19 | Tdk Corp. | Method of making a semiconductor image sensor device |
| US5677551A (en) * | 1994-11-15 | 1997-10-14 | Fujitsu Limited | Semiconductor optical device and an optical processing system that uses such a semiconductor optical system |
| US5889296A (en) * | 1994-11-15 | 1999-03-30 | Fujitsu Limited | Semiconductor optical device and an optical processing system that uses such a semiconductor optical system |
| WO2007119490A1 (en) * | 2006-03-22 | 2007-10-25 | Osaka University | Transistor element, its manufacturing method, light emitting element, and display |
| US8120242B2 (en) | 2006-03-22 | 2012-02-21 | Osaka University | Transistor and process of producing the same, light-emitting device, and display |
| JP2009007985A (en) * | 2007-06-27 | 2009-01-15 | Ogura Clutch Co Ltd | Air supply system |
| US8629865B2 (en) | 2007-12-14 | 2014-01-14 | Koninklijke Philips N.V. | Organic light-emitting device with adjustable charge carrier injection |
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