JPS588578B2 - Handout Taisouchino Seizouhouhou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device that can reduce the capacitance of wiring.

In semiconductor devices such as integrated circuit ICs and large-scale integrated circuit LSIs, it is desired to reduce the capacitance of wiring in order to enable high-speed operation.

In order to reduce the capacitance of this wiring, it is sufficient to increase the thickness of the insulating film on the semiconductor substrate.

However, if the insulating film is made thicker, there is a drawback that when an electrode window is opened and an electrode made of aluminum (Al) or the like is formed, the step becomes larger and the possibility of wire breakage increases.

For example, as shown in FIGS. 1 to 4, in the conventional manufacturing method, a base region 2 is formed on a silicon (Si) substrate 1, and a silicon dioxide film 3 is formed by thermal oxidation all over the country. After forming the state shown in FIG. 1, as shown in FIG.
O2) A film 5 is formed to a predetermined thickness by CVD or the like, then a window is formed as shown in FIG. 3, and an emitter region 6 is formed by a diffusion process, and then as shown in FIG. After opening an electrode window, a metal layer such as aluminum (Al) is formed on the entire surface by vapor deposition or the like, and etched into a desired pattern to form an emitter electrode 7E, a base electrode 7B, and a collector electrode 7C.

Therefore, if the silicon nitride film 4 and the silicon dioxide film 5 are made thicker in order to reduce the capacitance of the wiring, the step becomes larger, and the size of the electrode window is limited by the area of the base region 2 and emitter region 6. Therefore, the electrode window is generally very small, and the thick insulating film around it makes it difficult to deposit an electrode that provides sufficient contact. The thickness becomes thinner, and in extreme cases, the wire becomes disconnected.

The present invention is a novel invention that improves the above-mentioned drawbacks,
The purpose is to provide a method for manufacturing a semiconductor device that has few steps and does not cause wire breakage even when the insulating film is thickened to reduce the capacitance of the wires.

In order to achieve this purpose, the method for manufacturing a semiconductor device of the present invention includes forming a plurality of layers of insulating films on a semiconductor substrate, and forming windows in the insulating film for connection with regions formed on the semiconductor substrate. In a method for manufacturing a semiconductor device in which electrode wiring is performed using
After forming a window with a larger area than a window for connection to the region in at least a second layer of insulating film on the semiconductor substrate, an upper insulating film is formed thereon, and then a window for connection to the region is formed. The present invention is characterized in that it includes a step of forming a window in the insulating film and providing electrode wiring.Examples will be described in detail below.

5 to 9 are process explanatory diagrams of one embodiment of the present invention. As shown in FIG. 5, a silicon (Si) semiconductor substrate 1
A base region 11 is formed in 0, a first layer silicon dioxide (SiO2) film 12 is formed by thermal oxidation, and a second layer silicon dioxide film 13 is formed thereon by CVD.

This silicon dioxide film 13 is made thick so that the capacitance of the wiring is below a predetermined value, and if it is formed using the CVD method, it can be formed thicker more easily than when it is formed by thermal oxidation. .

Next, as shown in FIG. 6, a window 14 is formed in the second layer silicon dioxide film 13.

The area of this window 14 is larger than that of the base region 11, which is the main operating region of the device, and the collector region around it, and silicon dioxide formed by CVD is more suitable for hydrofluoric acid than silicon dioxide formed by thermal oxidation. Since the etching rate is faster than that of the etching solution, it is easy to form windows 14 as shown in the figure in the second layer silicon dioxide film 13.

Next, as shown in FIG. 7, a silicon nitride film 15 and a silicon dioxide film 16 are formed by CVD or the like.

Next, as shown in FIG. 8, a diffusion window is opened and an emitter region 17 is formed by a diffusion process.

Next, as shown in FIG. 9, connection windows are opened in the silicon dioxide film 12, silicon nitride film 15, and silicon dioxide film 16 by a known process, and a wiring metal such as aluminum is formed on the entire surface by vapor deposition or the like. By performing patterning, an emitter electrode 18E, a base electrode 18B, and a collector electrode 18C are formed.

Therefore, even if the silicon dioxide film 13 is made thicker in order to reduce the capacitance of the wiring, the level difference in the electrode wiring connected to the region formed on the semiconductor substrate 10 will be reduced, and disconnection will not occur.

10 to 14 are process explanatory diagrams of other embodiments of the present invention, and as shown in FIG. 10, silicon (Si)
After forming a base region 21 on a semiconductor substrate 20, a first layer of silicon dioxide film 22 is formed by thermal oxidation, and a second layer of silicon nitride film 23 and a third layer of silicon dioxide film are formed thereon. 24 is formed by CVD method.

This third layer silicon dioxide film 24 is formed to have a thickness such that, together with the silicon dioxide film 22 and the silicon nitride film 23, the capacitance of the wiring becomes less than a predetermined value.

Next, as shown in FIG. 11, a window 25 is formed in the third layer silicon dioxide film 24.

In this case as well, the window 25 has a larger area than the base region 21. By etching with a hydrofluoric acid-based etching solution, the etching ends when the silicon nitride film 23 is exposed, so the formation of the window 25 is easy. It's easy.

Next, as shown in FIG. 12, a silicon dioxide film 2 is formed on the entire surface.
form 6.

Next, as shown in FIG. 13, a diffusion window is opened and an emitter region 27 is formed by a diffusion process.

Next, as shown in FIG. 14, a silicon dioxide film 22,
A window for connection is formed in the silicon nitride film 23 and the silicon dioxide film 26 by a known process, and a wiring metal is formed on the entire surface by vapor deposition or the like and patterned to form an emitter electrode 28E, a base electrode 28B, and a collector electrode 28C. do.

Therefore, even if an insulating film such as a silicon dioxide film is formed thickly in order to reduce the capacitance of the wiring, the level difference becomes small and the wiring will not be disconnected.

Each of the above embodiments relates to a transistor in which a multilayer insulating film made of a silicon dioxide film and a silicon nitride film is formed, but the process of forming electrode wiring for a PN region or a resistance diffusion region where a diode is formed can also be applied In addition, phosphosilicate glass (PSG) can be used as an insulating film.
), aluminum oxide (Al2O3), or other insulating films may also be used.

As explained above, the present invention includes forming a first window having an area larger than the main operating area in at least a second layer of insulating film on a semiconductor substrate, and then forming an upper layer of insulating film on the entire surface. As a result, the thickness of the insulating film around the main operating region can be increased, thereby making it possible to reduce the capacitance of wiring formed on the insulating film.

Furthermore, when forming the first window, since at least the first layer of insulating film remains, the surface of the semiconductor substrate is sufficiently protected, and compared to the case of forming a connection window, the first layer of the insulating film remains. Since a low positioning accuracy is sufficient when forming the window, the manufacturing process does not become particularly complicated.

Furthermore, since the plurality of insulating films on the main operating area are thinner than the surrounding insulating films due to the formation of the first window, it is easy to form a window for connection to the main operating area. Become.

Even if the insulating film around the main operating region is formed thick, the electrode wiring has few steps and there is no risk of disconnection.

Therefore, there is an advantage that a highly reliable semiconductor device that can operate at high speed can be easily manufactured.

[Brief explanation of drawings]

1 to 4 are process explanatory diagrams of a conventional example, and FIGS. 5 to 9, and FIGS. 10 and 14 are process explanatory diagrams of different embodiments of the present invention. 10, 20 are semiconductor substrates, 11, 21 are base regions, 1
2 and 22 are silicon dioxide films formed by thermal oxidation, 13 is a silicon dioxide film, 15 is a silicon nitride film, 16 is a silicon dioxide film, 17 and 27 are emitter regions, 23 is a silicon nitride film, and 24 and 26 are silicon dioxide films. be.

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device in which a plurality of layers of insulating films are formed on a semiconductor substrate, and a window for connection with a main operating area formed on the semiconductor substrate is formed in the insulating film to provide electrode wiring. , after forming a first window having an area larger than the main operating region in at least a second layer of insulating film on the semiconductor substrate, forming an upper insulating film thereon; A method of manufacturing a semiconductor device, comprising the step of forming a window for connection to an insulating film in the first window and providing electrode wiring.