JPS5871669A - Both surfaces light emission type light emitting diode - Google Patents
Both surfaces light emission type light emitting diodeInfo
- Publication number
- JPS5871669A JPS5871669A JP56169489A JP16948981A JPS5871669A JP S5871669 A JPS5871669 A JP S5871669A JP 56169489 A JP56169489 A JP 56169489A JP 16948981 A JP16948981 A JP 16948981A JP S5871669 A JPS5871669 A JP S5871669A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- electrode
- emitting diode
- region
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 16
- 239000013078 crystal Substances 0.000 claims abstract description 3
- 230000002093 peripheral effect Effects 0.000 claims description 2
- 239000000758 substrate Substances 0.000 abstract description 4
- 238000003486 chemical etching Methods 0.000 abstract description 3
- 229910000990 Ni alloy Inorganic materials 0.000 abstract description 2
- 229910001297 Zn alloy Inorganic materials 0.000 abstract description 2
- 238000002347 injection Methods 0.000 abstract description 2
- 239000007924 injection Substances 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000005253 cladding Methods 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 230000004927 fusion Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 230000002779 inactivation Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は光フアイバ通信用に適した面発光型発光ダイオ
ードの改良に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in surface-emitting light emitting diodes suitable for optical fiber communications.
面発光型発光ダイオードは、高信頼性及び温度特性高安
定性の特徴を有し、実用的な素子である。Surface-emitting light emitting diodes are highly reliable and highly stable in temperature characteristics, and are practical devices.
特に、活性層内の注入キャリアのライフ・タイムを短く
した高速変調用素子は、伝送速度１００Ｍｂ／ｓ以上の
光伝送システムを構成することも可能であシ、広い用途
が期待されている。In particular, a high-speed modulation element in which the lifetime of injected carriers in the active layer is shortened can be used to construct an optical transmission system with a transmission speed of 100 Mb/s or more, and is expected to have a wide range of applications.
面発光型発光ダイオードのパルス応答特性は、活性層内
の注入キャリアのライフ・タイム及び素子の接合容量よ
り定められる。特に、伝送速度１００Ｒ４ｂ／ｓ 以
上においては、素子の発光領域周辺の寄生容量の影響が
顕著になる。しかしながら、従来の面発光型発光ダイオ
ードにおいては、発光領域と、発光領域周辺部が、クラ
、ド領域の拡がシ抵抗等を通して電気的に接続されてい
る為、寄生容量の影響を抑えることが困難であった。The pulse response characteristics of a surface-emitting light emitting diode are determined by the lifetime of injected carriers in the active layer and the junction capacitance of the device. In particular, at transmission speeds of 100 R4 b/s or higher, the influence of parasitic capacitance around the light emitting region of the device becomes significant. However, in conventional surface-emitting light-emitting diodes, the light-emitting region and the surrounding area of the light-emitting region are electrically connected through a resistor, etc., and the influence of parasitic capacitance cannot be suppressed. It was difficult.
本発明の目的は、上述の困難を除去し、パルス応答特性
がすぐれ九高速変調用面発光型発光ダイオードを提供す
ることにある。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned difficulties and provide a surface-emitting light emitting diode for high-speed modulation that has excellent pulse response characteristics.
本発明によれば、■−ｖ族半導体よ）成る二重へテロ接
合構造を有する面発光型発光ダイオードにおいて、ｐｎ
接合が電気的絶縁溝によシ発光領域と発光領域周辺部に
分離されていることを特徴とする「発光型発光ダイオー
ドが得られる。According to the present invention, in a surface emitting type light emitting diode having a double heterojunction structure consisting of a pn
A light emitting type light emitting diode is obtained in which the junction is separated into a light emitting region and a peripheral portion of the light emitting region by an electrically insulating groove.
次に図面を参照して本発明の詳細な説明する。Next, the present invention will be described in detail with reference to the drawings.
図面は１本発明の一実施例の断面図を表わすものである
。本実施例は、半導体基板２にエピタキシャル成長され
た活性半導体層３Ｊｌ及び３ｂ、クラッド領域４ａ及び
４ｂ、電極形成層５ｍ及び５ｂ。The drawing represents a cross-sectional view of one embodiment of the present invention. In this embodiment, active semiconductor layers 3Jl and 3b, cladding regions 4a and 4b, and electrode formation layers 5m and 5b are epitaxially grown on a semiconductor substrate 2.
電極形成層の上に形成された絶縁層６、及び電極７、電
気的絶縁溝８、光取出し用円形窓を含む電極ｌよｐ構成
されている。半導体基板２は、面方位（１００）、導電
形ｎ形のＩｎＰ単結晶で厚さ約８０μｍである。活性半
導体層３ａ及び３ｂは、禁制帯幅０．９５ｅｖ に相当
す６ Ｉ ｎ ６．１ａ Ｇ ａ ｏ、ｚａＡＩ６．Ｈ
ＰＩ）、４４で厚さ約０．５ μｍ 、 クラブ）”領
域４ａ及び４ｂは導電形ｐ形のＩｎＰで厚さ約１μｍ、
電極形成層５ａ及び５ｂは導電形ｐ形の禁制帯幅１．１
３ｅｌＶ に相当するＩ ｎ ｏ、ｎｏｔ Ｏ，１１”
０．２４ ＰＧ、７＠で厚さ約１μｍである。電気的
絶縁溝８は幅約５μｍ、深さ約２．５μｍ、内径的４０
μｍの環状に電極形成層、クラッド領域、及び活性半導
体層を化学エツチングによシ除去して作成される。絶縁
層６は５ｉｆｔ 膜より成シ、厚さ約０．２μｍで、
絶縁溝８の中心に位置する直径約２０μｍの円形領域は
、化学エツチングにより除去され、電流注入部を構成し
ている。電極ｌはＡｕ−Ｇｅ−Ｎｉ合金よシ形成されて
お）、光取出し用円形窓の直径は約１５０μｍ、又、電
極７はＡ ｕ −Ｚ ｎ 合金より形成されている。The structure includes an insulating layer 6 formed on the electrode formation layer, electrodes 1 and 7 including an electrode 7, an electrically insulating groove 8, and a circular window for light extraction. The semiconductor substrate 2 is an InP single crystal with a (100) plane orientation and n-type conductivity, and has a thickness of about 80 μm. The active semiconductor layers 3a and 3b have 6I n 6.1a G a o, zaAI6. which corresponds to a forbidden band width of 0.95ev. H
PI), 44 with a thickness of about 0.5 μm; club)” regions 4a and 4b are made of p-type InP and have a thickness of about 1 μm;
The electrode formation layers 5a and 5b have a p-type conductivity bandgap width of 1.1.
I no, not O, 11” corresponding to 3elV
It is 0.24 PG, 7@, and approximately 1 μm thick. The electrical insulation groove 8 has a width of approximately 5 μm, a depth of approximately 2.5 μm, and an inner diameter of 40 μm.
The electrode formation layer, cladding region, and active semiconductor layer are removed by chemical etching to form a ring shape of μm. The insulating layer 6 is made of a 5ift film and has a thickness of about 0.2 μm.
A circular region with a diameter of approximately 20 μm located at the center of the insulating trench 8 is removed by chemical etching and constitutes a current injection portion. The electrode 1 is made of an Au--Ge--Ni alloy, and the diameter of the circular window for light extraction is about 150 μm, and the electrode 7 is made of an Au-Zn alloy.
本実施例に於いては、発光領域、及び発光領域近傍の活
性半導体層３直とクラッド領域４ａの界面に形成された
ｐｎ接合と発光領域周辺の活性半導体層３ｂとクラッド
領域４ｂの界面に形成されたｐｎ接合は電気的絶縁溝８
によシ分離されている為１発光領域周辺のｐｎ接合の寄
生容量の効果を除去することができる。その改善量は、
絶縁溝８の内径が小さい程、大きいが、その為にはｐｎ
接合のリーク電流を抑える必要があ）、８ ｉｔｓよ構
成る絶縁層６は表面不活性化の作用も兼ねている。さら
に、本実施例においてｐ＠電極構造は、はぼブレーナに
近い構造であｐ、融着、ボンディング等に対して極めて
安定・丈夫であシ、絶縁溝′ ８の内径は、かなり小さ
くすることも可能である。In this embodiment, a pn junction is formed at the interface between the light emitting region and the active semiconductor layer 3b near the light emitting region and the cladding region 4a, and a pn junction is formed at the interface between the active semiconductor layer 3b and the cladding region 4b near the light emitting region. The formed pn junction is electrically insulating groove 8
Since the light emitting regions are separated by a distance, the effect of the parasitic capacitance of the pn junction around one light emitting region can be eliminated. The amount of improvement is
The smaller the inner diameter of the insulating groove 8, the larger the
It is necessary to suppress leakage current at the junction), and the insulating layer 6 composed of 8 ITS also serves as surface inactivation. Furthermore, in this embodiment, the p@ electrode structure has a structure similar to that of a hollow brainer, and is extremely stable and durable against fusion, bonding, etc., and the inner diameter of the insulating groove '8 can be made quite small. is also possible.
尚、上述の実施例では、活性半導体層の組成を発光波長
１．３μｍとしたが、もちろんこれに限定する必要はな
く１本発明はあらゆる組成の■−■族半導体に於いて適
用可能である。In the above embodiment, the composition of the active semiconductor layer was set to have an emission wavelength of 1.3 μm, but of course there is no need to limit it to this, and the present invention is applicable to ■-■ group semiconductors of any composition. .
最後に、本発明が有する特徴を要約すれば、ｐｎ接合が
電気的絶縁溝によシ、発光領域と発光領域周辺部に分離
されていることによシ５発光領域周辺部の寄生容量が除
去され、かつ融着・ボンディングにも安定な高速パルス
変調が可能表面発光型発光ダイオードが得られることで
ある。Finally, to summarize the features of the present invention, the parasitic capacitance at the periphery of the light emitting region is eliminated by separating the pn junction into the light emitting region and the periphery of the light emitting region by an electrically insulating groove. Therefore, it is possible to obtain a surface-emitting type light emitting diode which is capable of stable high-speed pulse modulation even in fusion bonding and bonding.
図面は一実施例の断面図である。
図中、ｌはｎ側電極、２は半導体基板、３１及び３ｂは
活性半導体層、４鳳及び４ｂはクラ、ド領域、５ｉ及び
５ｂは電極形成層、６は絶縁層、７はｐ側電極、８は電
気的絶縁溝である。
◇The drawing is a cross-sectional view of one embodiment. In the figure, l is an n-side electrode, 2 is a semiconductor substrate, 31 and 3b are active semiconductor layers, 4 and 4b are clad and do regions, 5i and 5b are electrode formation layers, 6 is an insulating layer, and 7 is a p-side electrode , 8 are electrically insulating grooves. ◇
Claims (2)
構造を有する面発光型発光ダイオードにおいて、ｐｎｎ
分会電気的絶縁溝によ如、発光領域と発光領域周辺部に
分離されていることを特徴とする面発光型発光ダイオー
ド。(1) In a surface-emitting light emitting diode having a double heterojunction structure made of a III-V group semiconductor, pnn
1. A surface-emitting light emitting diode, characterized in that a light emitting region and a peripheral portion of the light emitting region are separated by an electrically insulating groove.
ｓＰ系混晶である特許請求の範囲第１項記載の面発光型
発光ダイオード。(2) InGaA where the ■-■ group semiconductor contains InP
The surface-emitting light emitting diode according to claim 1, which is an sP-based mixed crystal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56169489A JPS5871669A (en) | 1981-10-23 | 1981-10-23 | Both surfaces light emission type light emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56169489A JPS5871669A (en) | 1981-10-23 | 1981-10-23 | Both surfaces light emission type light emitting diode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5871669A true JPS5871669A (en) | 1983-04-28 |
Family
ID=15887471
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56169489A Pending JPS5871669A (en) | 1981-10-23 | 1981-10-23 | Both surfaces light emission type light emitting diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5871669A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62155574A (en) * | 1985-12-24 | 1987-07-10 | Nec Corp | Light emitting diode |
| KR20040013999A (en) * | 2002-08-09 | 2004-02-14 | 엘지전자 주식회사 | Fabrication method for led of limit exterior |
| JP2023014201A (en) * | 2017-12-22 | 2023-01-26 | Ｄｏｗａエレクトロニクス株式会社 | Semiconductor light-emitting element and manufacturing method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5422787A (en) * | 1977-07-21 | 1979-02-20 | Sharp Corp | Structure of semiconductor element |
| JPS5457883A (en) * | 1977-10-17 | 1979-05-10 | Hitachi Ltd | Luminous semiconductor device |
-
1981
- 1981-10-23 JP JP56169489A patent/JPS5871669A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5422787A (en) * | 1977-07-21 | 1979-02-20 | Sharp Corp | Structure of semiconductor element |
| JPS5457883A (en) * | 1977-10-17 | 1979-05-10 | Hitachi Ltd | Luminous semiconductor device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62155574A (en) * | 1985-12-24 | 1987-07-10 | Nec Corp | Light emitting diode |
| KR20040013999A (en) * | 2002-08-09 | 2004-02-14 | 엘지전자 주식회사 | Fabrication method for led of limit exterior |
| JP2023014201A (en) * | 2017-12-22 | 2023-01-26 | Ｄｏｗａエレクトロニクス株式会社 | Semiconductor light-emitting element and manufacturing method thereof |
| US11996496B2 (en) | 2017-12-22 | 2024-05-28 | Dowa Electronics Materials Co., Ltd. | Semiconductor light-emitting device |
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