JPH0377675B2 - - Google Patents

Info

Publication number
JPH0377675B2
JPH0377675B2 JP3762482A JP3762482A JPH0377675B2 JP H0377675 B2 JPH0377675 B2 JP H0377675B2 JP 3762482 A JP3762482 A JP 3762482A JP 3762482 A JP3762482 A JP 3762482A JP H0377675 B2 JPH0377675 B2 JP H0377675B2
Authority
JP
Japan
Prior art keywords
inp
layer
ingaasp
groove
indium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3762482A
Other languages
Japanese (ja)
Other versions
JPS58154287A (en
Inventor
Hiroshi Ishikawa
Hajime Imai
Nobuyuki Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57037624A priority Critical patent/JPS58154287A/en
Publication of JPS58154287A publication Critical patent/JPS58154287A/en
Publication of JPH0377675B2 publication Critical patent/JPH0377675B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223Buried stripe structure
    • H01S5/2237Buried stripe structure with a non-planar active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/24Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a grooved structure, e.g. V-grooved, crescent active layer in groove, VSIS laser

Landscapes

  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は半導体発光装置に係り、特に光導波路
を内蔵する半導体レーザのような半導体発光装置
の構造に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a semiconductor light emitting device, and particularly to the structure of a semiconductor light emitting device such as a semiconductor laser incorporating an optical waveguide.

(b) 技術の背景 近年半導体基板に溝を形成し、その溝内に活性
層を埋め込み且つ溝の周囲を屈折率が低いクラツ
ド層で囲み光導波路を形成した構造の半導体レー
ザが多く用いられる。中でもInP半導体層に形成
したV字形或るいはU字形の溝内にインジウム・
ガリウム・ひ素・りん(InGaAsP)からなる活
性層を埋め込んだInGaAsP/InPレーザは、極め
て低い閾値電流密度(Jt)を有する優れたレーザ
素子である。本発明は主として上記のような半導
体レーザ素子に関するものである。
(b) Background of the Technology In recent years, semiconductor lasers with a structure in which a groove is formed in a semiconductor substrate, an active layer is buried in the groove, and a cladding layer with a low refractive index surrounds the groove to form an optical waveguide are often used. Among them, indium is placed inside the V-shaped or U-shaped groove formed in the InP semiconductor layer.
InGaAsP/InP lasers with embedded active layers made of gallium arsenide phosphorus (InGaAsP) are excellent laser devices with extremely low threshold current densities (Jt). The present invention mainly relates to a semiconductor laser device as described above.

(c) 従来技術と問題点 活性層が溝内に埋め込まれたInGaAsP−InPレ
ーザ素子は、上記のような優れた特性を有する反
面、従来はこれを製造する段階に於て、特定の基
板に形成された素子に、温度特性の悪いものや光
出力に飽和状態を示すものがあらわれ、製造歩留
まりが低下するという問題があつた。
(c) Prior art and problems Although the InGaAsP-InP laser device in which the active layer is buried in a groove has the excellent characteristics mentioned above, conventionally, it is difficult to use a specific substrate at the stage of manufacturing it. Some of the formed elements had poor temperature characteristics or showed a saturated state of optical output, resulting in a problem of reduced manufacturing yield.

第1図は溝幅4.7〔μm〕程度のInGaAsP/InP
レーザ素子の(電流I−光出力L)特性を示した
もので、該従来素子に於ては25〔℃〕、50〔℃〕い
ずれの光出力Lも大電流領域に於て飽和状態を示
し、特に50〔℃〕に於てその傾向が甚だしい。従
来この現象を改善しようとして、結晶成長技術に
種々の工夫を試みたが改善することができなかつ
た。また、第5図に示すように溝の形状がU字形
であると、溝の肩幅を狭く形成しても、溝の内壁
と活性層との距離l1+l2を短縮しがたいという欠点
を有していた。
Figure 1 shows InGaAsP/InP with a groove width of about 4.7 [μm].
This shows the (current I - optical output L) characteristics of the laser element.In the conventional element, the optical output L of both 25 [℃] and 50 [℃] shows saturation in the large current region. This tendency is especially severe at 50 degrees Celsius. Conventionally, various attempts have been made to improve crystal growth techniques in an attempt to improve this phenomenon, but no improvement has been achieved. Furthermore, if the groove is U-shaped as shown in FIG. 5, it is difficult to shorten the distance l 1 + l 2 between the inner wall of the groove and the active layer even if the shoulder width of the groove is narrowed. It had

(d) 発明の目的 本発明は上記(光出力−電流)特性を改善する
V字形溝構造のパラメータを提供し、
InGaAsP/InPレーザ素子の製造歩留まりを向上
させることを目的とする。
(d) Object of the invention The present invention provides parameters of a V-shaped groove structure that improves the above-mentioned (light output-current) characteristics,
The purpose is to improve the manufacturing yield of InGaAsP/InP laser devices.

(e) 発明の構成 即ち本発明は、(100)面を主面とするインジウ
ム・りん(InP)半導体層の上面に〈011〉面内
方向に沿つて帯状に形成され、開口幅が4μm以下
のV字形でその斜面が(111)B面の溝を形成す
る工程と、 次いで、該インジウム・りん(InP)半導体層
の該溝内にインジウム・りん(InP)第1クラツ
ド層と、インジウム・ガリウム・ひ素・りん
(InGaAsP)活性層と、インジウム・りん(InP)
第2クラツド層とを順次液相成長する工程とを有
し、 前記V字形溝内に形成された該インジウム・ガ
リウム・ひ素・りん(InGaAsP)活性層の端部
を該V字形溝の斜面に接して形成することを特徴
とする。
(e) Structure of the Invention In other words, the present invention provides an indium phosphorous (InP) semiconductor layer formed in a band shape along the <011> in-plane direction on the upper surface of an indium phosphorus (InP) semiconductor layer whose main surface is the (100) plane, and whose opening width is 4 μm or less. forming a V-shaped groove whose slope is (111)B plane, and then forming an indium phosphorus (InP) first cladding layer in the groove of the indium phosphorus (InP) semiconductor layer; Gallium-arsenic-phosphorous (InGaAsP) active layer and indium-phosphorous (InP)
a step of sequentially liquid-phase growing a second cladding layer, and the end portion of the indium-gallium-arsenic-phosphorus (InGaAsP) active layer formed in the V-shaped groove is placed on the slope of the V-shaped groove. It is characterized by being formed in contact with each other.

(f) 発明の実施例 以下本発明を図に従つて詳細に説明する。(f) Examples of the invention The present invention will be explained in detail below with reference to the drawings.

第2図イ及びロは温度特性が悪く、光出力が飽
和状態を示す従来のレーザ素子の要部断面図、第
3図はレーザ効率(η)の説明図、第4図はレー
ザ効率(η)とInP・p−n接合幅(l1+l2)の
関係図、第5図はV又はU字形溝開口幅Wと
InP・p−n接合幅(l1+l2)の関係図、第6図
イ及びロは本発明のV字形溝構造に於ける一実施
例の要部断面図及びU字形溝構造に於ける一実施
例の要部断面図で、第7図は本発明の構造を有す
るInGaAsP/InPレーザ素子の代表的な(電流I
−光出力L)特性図である。
Figures 2A and 2B are cross-sectional views of main parts of a conventional laser element with poor temperature characteristics and saturated optical output, Figure 3 is an explanatory diagram of laser efficiency (η), and Figure 4 is a diagram showing laser efficiency (η). ) and the InP/p-n junction width (l 1 + l 2 ), Figure 5 shows the relationship between the V or U-shaped groove opening width W and
A relationship diagram of InP/p-n junction width (l 1 + l 2 ), Figures 6A and 6B are cross-sectional views of essential parts of an embodiment of the V-shaped groove structure of the present invention, and a diagram of the U-shaped groove structure. FIG. 7 is a sectional view of a main part of one embodiment, and FIG. 7 is a typical (current I
- Light output L) characteristic diagram.

InGaAsP/InPレーザ素子は、第2図イ或るい
はロ示すように(100)面を主面とするn型イン
ジウム・りん(n−InP)基板1上にp型インジ
ウム・りん(InP)電流阻止層2を1.5〔μm〕程度
の厚さに液相成長或るいは拡散で形成した後、溝
の延長向を〈011〉方向に取つてV字形溝(斜面
は(111)B面)3をエツチングで形成し、次い
でn−InP第1クラツド層4、ノンドープの
InGaAsP活性層5、p−InP第2クラツド層6、
p−InGaAsPキヤツプ層7を順次成長して製造
される(8はp電極、9はn電極)。
The InGaAsP/InP laser device has a p-type indium-phosphorus (InP) current on an n-type indium-phosphorus (n-InP) substrate 1 with a (100) plane as its main surface, as shown in FIG. After forming the blocking layer 2 to a thickness of about 1.5 [μm] by liquid phase growth or diffusion, a V-shaped groove (the slope is the (111) B plane) 3 is formed with the groove extending in the <011> direction. is formed by etching, and then an n-InP first cladding layer 4 and a non-doped layer are formed.
InGaAsP active layer 5, p-InP second cladding layer 6,
It is manufactured by sequentially growing p-InGaAsP cap layers 7 (8 is a p electrode, 9 is an n electrode).

このようにして製造し第1図に示したように
(電流I−光出力L)特性の悪いものは、第2図
に示すようにV字形溝、U字形溝いずれの場合も
溝の中にInPのp−n接合Jが形成されており、
このp−n接合がもれ電流の通路になると考えら
れる。
Products manufactured in this way and having poor characteristics (current I - light output L) as shown in Figure 1 are not found in the groove in both V-shaped grooves and U-shaped grooves as shown in Figure 2. A p-n junction J of InP is formed,
It is thought that this pn junction becomes a path for leakage current.

そこでレーザの効率〔η〕を第3図のように定
義し(図中Ithは閾値電流、I5mwは光出力5
〔mW〕時の負荷電流)、該効率(η)と第2図に
示すInPのp−n接合Jの幅即ちもれ電流通路の
幅(l1+l2)の関係を25〔℃〕と50〔℃〕で測定す
ると第4図に示すような結果になる。この結果か
らl1+l2が大きくなるとηは急激に低下すること
がわかり、このことは良好なレーザ素子を得るた
めには、l1+l2即ち溝内に形成されるp−n接合
の幅を0にしなければならない事を示している。
Therefore, the laser efficiency [η] is defined as shown in Figure 3 (in the figure, Ith is the threshold current, I 5 mw is the optical output 5
The relationship between the efficiency (η) and the width of the InP p-n junction J, that is, the width of the leakage current path (l 1 + l 2 ) shown in Fig. 2, is expressed as 25 [°C]. When measured at 50 [°C], the results are as shown in Figure 4. From this result, it can be seen that as l 1 + l 2 increases, η decreases rapidly. This means that in order to obtain a good laser device, it is necessary to This indicates that the value must be set to 0.

次いで発明者は上記l1+l2=0を満足する構造、
即ち活性層をV字形溝の場合斜面にに接するよう
に成長させる方法を検討した。その結果第5図に
示すようにV字形溝の場合に於ても、溝の開口幅
Wが4〔μm〕以下であれば殆んどの素子に於てl1
+l2が0になることを確認した。
Next, the inventor created a structure that satisfies the above l 1 +l 2 =0,
That is, a method of growing the active layer so as to be in contact with the slope in the case of a V-shaped groove was investigated. As a result, as shown in Fig. 5, even in the case of a V-shaped groove, if the opening width W of the groove is 4 [μm] or less, most elements will have l 1
It was confirmed that +l 2 becomes 0.

この結果に基づいて形成したInGaAsP/InPレ
ーザ素子に於けるV字形溝構造のものを、第6図
にしめす。これらの図に於て1はn−InP基板、
2はp−InP電流阻止層、3はV字形溝、4はn
−InP第1クラツド層、5はノンドープInGaAsP
活性層、6はp−InP第2クラツド層、7はp−
InGaAsPキヤツプ層、8はp電極、9はn電極
を表わしている。
An InGaAsP/InP laser device with a V-shaped groove structure formed based on this result is shown in FIG. In these figures, 1 is an n-InP substrate,
2 is p-InP current blocking layer, 3 is V-shaped groove, 4 is n
-InP first cladding layer, 5 is non-doped InGaAsP
active layer, 6 p-InP second cladding layer, 7 p-
In the InGaAsP cap layer, 8 represents a p-electrode and 9 represents an n-electrode.

これ等の図に示したようにV字形溝3の開口幅
Wを4〔μm〕以下にした素子に於ては、溝3内に
活性層5をその端面が溝の斜面若しくは壁面に接
するように成長させることが容易にできる。従つ
て溝3内にInPのp−n接合が形成されることが
ない。
As shown in these figures, in the device in which the opening width W of the V-shaped groove 3 is 4 [μm] or less, the active layer 5 is placed in the groove 3 so that its end surface is in contact with the slope or wall surface of the groove. can be easily grown. Therefore, an InP p-n junction is not formed in the trench 3.

第7図は、本発明の一実施例であるV字形溝開
口幅3.6〔μm〕を有するInGaAsP−InPレーザ素
子に於ける、25〔℃〕と50〔℃〕の(電流I−光出
力L)特性を示したものである。この図から本発
明の構造に於ては、光出力Lが飽和状態を示さず
25〔℃〕、50〔℃〕いずれの場合にも大電流領域ま
でのびた優秀な(電流−光出力)特性を示すこと
がわかる。
Figure 7 shows (current I - optical output L ) shows the characteristics. This figure shows that in the structure of the present invention, the optical output L does not show a saturated state.
It can be seen that in both cases of 25 [°C] and 50 [°C], excellent (current-light output) characteristics extending to the large current region are exhibited.

次に本発明の構造を有するInGaAsP/InPレー
ザ素子の製造方法を第6図を用いて説明する。
Next, a method for manufacturing an InGaAsP/InP laser device having the structure of the present invention will be explained with reference to FIG.

該素子の基板には(100)面を主面とするn−
InP基板1を用い、先ず該基板の上面に例えば1.5
〔μm〕程度の厚さ又は深さを有するp−InP電流
阻止層2を液相成長法或るいは拡散法で形成す
る。
The substrate of the device has an n-
Using an InP substrate 1, first place a 1.5 mm
A p-InP current blocking layer 2 having a thickness or depth of approximately [μm] is formed by a liquid phase growth method or a diffusion method.

次いで該電流阻止層2上に二酸化シリコン
(SiO2)膜(図示せず)を化学気相成長等で形成
し、該SiO2膜に通常の方法で〈011〉方向に沿つ
た例えば2〔μm〕程度の幅を有する帯状の窓を形
成し、該SiO2膜をマスクとして、V字形溝に対
しては塩酸過剰の塩酸(HCl):りん酸
(H3PO4)・混液又は塩酸過剰の塩酸(HCl):硝
酸(HNO3)混液を用いて選択エツチングを行つ
てV字形溝3を形成する。
Next, a silicon dioxide (SiO 2 ) film (not shown) is formed on the current blocking layer 2 by chemical vapor deposition or the like, and a film of, for example, 2 [μm] along the <011> direction is formed on the SiO 2 film by a conventional method. ] Form a band - shaped window with a width of about A V-shaped groove 3 is formed by selective etching using a mixed solution of hydrochloric acid (HCl) and nitric acid (HNO 3 ).

次いで前記SiO2膜(図示せず)を除去した後、
連続液相成長法により、該基板上にn−InP第1
クラツド層4、InGaAsP活性層5、p−InP第2
クラツド層6、p−InGaAsPキヤツプ層7を順
次成長形成する。
Then, after removing the SiO 2 film (not shown),
The first layer of n-InP was deposited on the substrate by continuous liquid phase epitaxy.
Cladding layer 4, InGaAsP active layer 5, p-InP second layer
A clad layer 6 and a p-InGaAsP cap layer 7 are grown in sequence.

なお各層の厚さは溝部に於て第1クラツド層約
1〔μm〕、活性層約0.15〔μm〕、第2クラツド層約
1.5〔μm〕程度で、キヤツプ層は平坦部で0.3〜0.5
〔μm〕程度とする。次いで蒸着等の方法により金
−亜鉛(AuZn)もしくはチタン−白金−金(Ti
−Pt−Au)等からなるp電極8及び金−ゲルマ
ニウム(AuGe)等からなるn電極9を形成す
る。
The thickness of each layer is approximately 1 [μm] for the first clad layer, approximately 0.15 [μm] for the active layer, and approximately 0.15 [μm] for the second clad layer in the groove portion.
The thickness of the cap layer is about 1.5 [μm], and the thickness of the cap layer is 0.3 to 0.5 on the flat part.
Approximately [μm]. Next, gold-zinc (AuZn) or titanium-platinum-gold (Ti
-Pt-Au) or the like, and an n-electrode 9 made of gold-germanium (AuGe) or the like are formed.

(g) 発明の効果 以上説明したように本発明の構造を有する
InGaAsP/InPレーザ素子に於ては、該素子を製
造する際にV字形溝内のn−InP第1クラツド層
の上面を完全に覆つてInGaAsP活性層が形成で
きるので、前記溝内にn−InP第1クラツド層と
p−InP第2クラツド層が直かに接して形成され
るInPのp−n接合が現われることがない。
(g) Effect of the invention It has the structure of the present invention as explained above.
In an InGaAsP/InP laser device, when manufacturing the device, the InGaAsP active layer can be formed completely covering the top surface of the n-InP first cladding layer within the V-shaped groove, so that the n-InP active layer can be formed within the V-shaped groove. An InP p-n junction, where the first InP cladding layer and the p-InP second cladding layer are formed in direct contact with each other, does not appear.

従つて本発明によれば活性層を通らない電流通
路が形成されないので、InGaAsP−InPレーザの
温度特性及び光出力特性が改善され、製造歩留ま
りも向上する。
Therefore, according to the present invention, since no current path is formed that does not pass through the active layer, the temperature characteristics and optical output characteristics of the InGaAsP-InP laser are improved, and the manufacturing yield is also improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来素子の(電流I−光出力L)特性
図、第2図イ及びロは温度特性が悪く、光出力が
飽和状態を示す従来素子の要部断面図、第3図は
レーザ効率(η)の説明図、第4図はレーザ効率
(η)とInP・p−n接合幅(l1+l2)の関係図、
第5図はV溝開口幅(W)とInP・p−n接合幅
(l1+l2)の関係図、第6図は本発明のV字形溝構
造に於ける一実施例の要部断面図、第7図は本発
明の構造を有するInGaAsP/InPレーザ素子の代
表的な(電流I−光力出L)特性図である。 図に於て、1はn−InP基板、2はp−InP電
流阻止層、3はV字形溝、4はn−InP第1・ク
ラツド層、5はノンドーブInGaAsP活性層、6
はp−InP第2・クラツド層、7はp−InGaAsP
キヤツプ層、8はp電極、9はn電極、WはV字
形溝及びU字形溝の開口幅を示す。
Fig. 1 is a (current I - optical output L) characteristic diagram of a conventional element, Fig. 2 A and B are cross-sectional views of main parts of a conventional element showing poor temperature characteristics and a saturated optical output state, and Fig. 3 is a laser An explanatory diagram of efficiency (η), Figure 4 is a diagram of the relationship between laser efficiency (η) and InP p-n junction width (l 1 + l 2 ),
Fig. 5 is a diagram showing the relationship between the V-groove opening width (W) and the InP p-n junction width (l 1 + l 2 ), and Fig. 6 is a cross-section of a main part of an embodiment of the V-shaped groove structure of the present invention. 7 are typical (current I-light output L) characteristic diagrams of an InGaAsP/InP laser device having the structure of the present invention. In the figure, 1 is an n-InP substrate, 2 is a p-InP current blocking layer, 3 is a V-shaped groove, 4 is an n-InP first clad layer, 5 is a non-doped InGaAsP active layer, and 6 is a non-doped InGaAsP active layer.
is p-InP second cladding layer, 7 is p-InGaAsP
In the cap layer, 8 is a p-electrode, 9 is an n-electrode, and W is the opening width of the V-shaped groove and the U-shaped groove.

Claims (1)

【特許請求の範囲】 1 (100)面を主面とするインジウム・りん
(InP)半導体層の上面に〈011〉面内方向に沿つ
て帯状に形成され、開口幅が4μm以下のV字形で
その斜面が(111)B面の溝を形成する工程と、 次いで、該インジウム・りん(InP)半導体層
の該溝内にインジウム・りん(InP)第1クラツ
ド層と、インジウム・ガリウム・ひ素・りん
(InGaAsP)活性層と、インジウム・りん(InP)
第2クラツド層とを順次液相成長する工程とを有
し、 前記V字形溝内に形成された該インジウム・ガ
リウム・ひ素・りん(InGaAsP)活性層の端部
を該V字形溝の斜面に接して形成することを特徴
とする半導体発光装置の製造方法。
[Claims] 1. A V-shaped opening formed in a band shape along the <011> in-plane direction on the upper surface of an indium phosphorus (InP) semiconductor layer whose main surface is the (100) plane, with an opening width of 4 μm or less. A step of forming a groove whose slope is (111) B plane, and then forming a first indium phosphorus (InP) cladding layer in the groove of the indium phosphorus (InP) semiconductor layer, an indium gallium arsenic Phosphorus (InGaAsP) active layer and indium phosphorus (InP)
a step of sequentially liquid-phase growing a second cladding layer; A method for manufacturing a semiconductor light emitting device, characterized in that the semiconductor light emitting device is formed in contact with each other.
JP57037624A 1982-03-10 1982-03-10 Semiconductor light emitting device Granted JPS58154287A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57037624A JPS58154287A (en) 1982-03-10 1982-03-10 Semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57037624A JPS58154287A (en) 1982-03-10 1982-03-10 Semiconductor light emitting device

Publications (2)

Publication Number Publication Date
JPS58154287A JPS58154287A (en) 1983-09-13
JPH0377675B2 true JPH0377675B2 (en) 1991-12-11

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP57037624A Granted JPS58154287A (en) 1982-03-10 1982-03-10 Semiconductor light emitting device

Country Status (1)

Country Link
JP (1) JPS58154287A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5360763A (en) * 1992-09-07 1994-11-01 Nec Corporation Method for fabricating an optical semiconductor device
KR20030026090A (en) * 2001-09-24 2003-03-31 주식회사 옵토웨이퍼테크 A light diode chip and a method for fabricating thereof, a LED and a method for fabricating thereof

Also Published As

Publication number Publication date
JPS58154287A (en) 1983-09-13

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