JPS604278A - Light emitting diode - Google Patents

Light emitting diode

Info

Publication number
JPS604278A
JPS604278A JP58112034A JP11203483A JPS604278A JP S604278 A JPS604278 A JP S604278A JP 58112034 A JP58112034 A JP 58112034A JP 11203483 A JP11203483 A JP 11203483A JP S604278 A JPS604278 A JP S604278A
Authority
JP
Japan
Prior art keywords
layer
buffer layer
light emitting
junction
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58112034A
Other languages
Japanese (ja)
Inventor
Akira Suzuki
明 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58112034A priority Critical patent/JPS604278A/en
Publication of JPS604278A publication Critical patent/JPS604278A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/0008Devices characterised by their operation having p-n or hi-lo junctions

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To obtain the titled device which enables high speed response by reducing the P-N junction capacitance parasitic in the periphery while preventing the formation of the remote junction in the light emitting part. CONSTITUTION:The device is composed of the first buffer layer 2 epitaxially grown on a semiconductor substrate 1, the second buffer layer 3, an active layer 4, a clad layer 5, an electrode forming layer 6, a current stricture layer 7 including a current injected part 71, and N-side electrode 8 including a light lead-out window 81, a P-side electrode 9, and a Zn diffused region 10. Besides, it acts as a surface light emitting type light emitting diode which takes out light emission from the window 81 by the stricture and injection of current from the part 71 to the layer 4. When the impurity concentration of the second buffer layer 3 is increased in order to prevent the formation of the remote junction in the light emitting part due to Zn diffusion during manufacturing processes, the marked deterioration of the time for response rise in pulse modulation is caused. Therefore, this invention contrives to reduce the P-N junction capacitance parasitic in the periphery due to the transfer of the position of the peripheral P-N junction into the first buffer layer 2 of a low impurity concentration provided under the third buffer layer 3 by peripheral Zn diffusion.

Description

【発明の詳細な説明】 本発明は光フアイバ通信用に適した発光ダイオードの改
良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in light emitting diodes suitable for use in fiber optic communications.

発光ダイオードは、低出力という欠点を有するものの高
信頼性、温反特性高安定性、あるいは、非コヒーレント
光源で反射雑音に強いといった半導体レーザにはない特
徴を有することから短・中距離光伝送において実用的な
素子で′ある。特に、活性層注入キャリアのライフタイ
ムを短縮し、応答速度を改善した高速変調型素子は広い
用途が期待されている。
Although light-emitting diodes have the drawback of low output, they have features that semiconductor lasers do not have, such as high reliability, high stability in temperature/temperature characteristics, and resistance to reflection noise as a non-coherent light source, so they are used in short- and medium-distance optical transmission. It is a practical element. In particular, high-speed modulation type devices that shorten the lifetime of carriers injected into the active layer and improve response speed are expected to have a wide range of applications.

活性層注入キャリアのライフタイムの短縮には、不純物
を高濃度にドーピングすることが有効であシ、従来、発
光ダイオードの応答高速化にはこの方法が用いられてき
た。しかしながら、活性層のドーパントとして用いられ
る不純物は素子製造工程中に拡散しやすいものが多いた
め、従来の素子の構造において活性層の不純’l/J’
713”8度を増しても、著しい光出力の低下と応答速
度の劣化をもたらすリモート接合を形成してしまい、必
要な素子特性が得られないといった欠点を有していた。
Doping impurities at a high concentration is effective for shortening the lifetime of carriers injected into the active layer, and this method has conventionally been used to increase the response speed of light-emitting diodes. However, many of the impurities used as dopants in the active layer are easily diffused during the device manufacturing process, so in the conventional device structure, the impurity 'l/J' of the active layer is
Even if the temperature is increased by 713"8 degrees, a remote junction is formed which causes a significant decrease in optical output and response speed, resulting in the disadvantage that necessary device characteristics cannot be obtained.

一方、リモート接合の形成を防止するためには、活性層
と反対導電型を有するバッファ層の不純物濃度を高くす
れはよいが′、この場合、リモート接合の形成を防ぐこ
とはできても発光部周辺にクラットJl”7拡がシ狐抗
を通して寄生するpn接合容量が著しく増大してしまい
、高速応答が得られないといった欠点を有していた。
On the other hand, in order to prevent the formation of remote junctions, it is good to increase the impurity concentration of the buffer layer, which has a conductivity type opposite to that of the active layer. The parasitic p-n junction capacitance caused by the peripheral crut Jl''7 expansion through the cylindrical resistor increases significantly, resulting in a disadvantage that high-speed response cannot be obtained.

不発りJの目的は、上述の欠点を除去し高速変調が可能
で製造容易な発光ダイオード紫提供することにある。
The purpose of FUJI J is to eliminate the above-mentioned drawbacks and to provide a purple light emitting diode that is capable of high-speed modulation and is easy to manufacture.

本発明によれば、−導は型を有する半導体基板上に該半
導体基板と同一導電型をゼする第一のバッファ層、前記
半導体基板と同一4を爪型を有する第二のバッファ層、
活性層、前記半4体基板と反対導1耗型を有するクラッ
ド層及び電流注入部を含む電流狭q層がイ)°4成され
、iIJ記第−のバラノア層の不純物濃度が前記第二の
バッファ層の不純物一度よシも低く前記電流性入部周辺
に位置する、前記活性層及び前記第二のバッファ層に前
記半導体基板と反対導電型の不純物が拡散されているこ
とを%徴とする発光ダイオードが得られる。
According to the present invention, - a first buffer layer having the same conductivity type as the semiconductor substrate on a semiconductor substrate having a conductivity type, a second buffer layer having the same conductivity type as the semiconductor substrate;
An active layer, a cladding layer having a conductivity type opposite to that of the semi-quaternary substrate, and a current narrow q layer including a current injection part are formed, and the impurity concentration of the second Balanor layer in iIJ is equal to the second The impurity content of the buffer layer is extremely low, and the impurity of the conductivity type opposite to that of the semiconductor substrate is diffused into the active layer and the second buffer layer located around the current conductive part. A light emitting diode is obtained.

仄に、図面を参照して本夕ら明を説すコする。図面は本
発明に基づく一笑施例の断面を≠セわすものである。本
実施例は、半導体基板1にエヒタキシャル成長された第
一のバッファバク2ミ第二のバッファ層3、活性層4、
クラッド層5、電極形成M 6、及び電流注入部71を
含む屯1jl(、狭9M7、光取出し窓81を含むn 
111 t44= s、p 1u1j電極9、Zn[故
領域10から構成されている。半u!1体基板1は(1
00)方位を有し、Snが1×10 c′M ドープさ
れたInPから成シ、厚さ100μm、第一のバッファ
層2はSnが1×lOCM ドープされたInPから成
シ厚さ2μm、第二のバッファ76′!3はSnが2 
X 1018CM−’ドープさitたInPから成り厚
さ1/7771゜活性層4はZnが7 X 1018a
s−’ドープさhだI n U4Ga 1126 As
 156 P(144から成υ厚さ0.5pm、クラッ
ド層5はZnがI X 1018art−’ ドープさ
れたInPから成り厚さ0.5μm、電(奥形成層6は
Znが1×lO渭ドープされたI n [184Ga 
11+ 6As astr Pn64から成υ厚さ1I
Jrnである。電流狭窄層7はSin、から)況シ厚さ
0.2P1n、 n側電極8はAu−Ge −N i合
金から成り厚さ0.3pm+ pi!:り電極9はAu
−Zn合金から成り厚さ03μmである。電流狭−′f
j曽7において直径20μか1の電流注入部71は化学
エツチングにょシ除去されており、n側電極8において
直径120pmの光取U、H〜窓81は化学エツチング
にょシ除去されている。父、電流注入部71の中心から
半径20μm以上外l(すの領域には、電極形成層6表
面よシ深さ35μmの位1むでZnn拡散職域1o設け
られている。本実施例は、その動作時において、直径2
0μmの電流注入部71により活性層4へ電流が狭窄・
注入され光取出し窓81がら発光を取出す面発光型発光
ダイオードとして動作する。又第二のバッファ層3の不
純物濃度は活性層4がらの製造工程中のZn拡散による
発光部のリモート接合形成を防止するのに十分な濃度で
ある。
The details will be briefly explained below with reference to the drawings. The drawing shows a cross section of an embodiment according to the invention. In this embodiment, a first buffer layer 2, a second buffer layer 3, an active layer 4, which are epitaxially grown on a semiconductor substrate 1,
The cladding layer 5, the electrode formation M6, and the current injection part 71 are included in the cladding layer 5, the narrow 9M7, and the light extraction window 81 is included.
111 t44 = s, p 1u1j electrode 9, Zn[consisting of region 10]. Half u! One board 1 is (1
00) orientation, made of InP doped with 1×10 c′M Sn, 100 μm thick; the first buffer layer 2 made of InP doped with 1×10 M Sn, 2 μm thick; Second buffer 76'! 3 has Sn of 2
The active layer 4 is made of doped InP and has a thickness of 1/7771°.
s-' doped I n U4Ga 1126 As
The cladding layer 5 is made of InP doped with Zn and has a thickness of 0.5 μm. I n [184Ga
11+ 6As astr Made from Pn64 Thickness 1I
Jr. The current confinement layer 7 is made of Sin and has a thickness of 0.2P1n, and the n-side electrode 8 is made of an Au-Ge-Ni alloy and has a thickness of 0.3pm+pi! :The electrode 9 is made of Au.
- It is made of Zn alloy and has a thickness of 03 μm. Current narrow -'f
The current injection part 71 with a diameter of 20 .mu.m in the j. In this example, a Znn diffusion region 1o is provided at a depth of about 35 μm from the surface of the electrode forming layer 6 in a region with a radius of 20 μm or more from the center of the current injection part 71. In its operation, diameter 2
Current injection into the active layer 4 is constricted by the current injection part 71 of 0 μm.
It operates as a surface-emitting type light emitting diode that extracts light from the injected light extraction window 81. The impurity concentration of the second buffer layer 3 is sufficient to prevent formation of a remote junction in the light emitting part due to Zn diffusion during the manufacturing process of the active layer 4.

面発光型発光ダイオードの高速パルス変調において、周
辺部の寄生アドミッタンスの値が発光部のアドミッタン
スの値に比べて十分に小さくなく、かつ、その時定数が
変調パルス周期に比べて十分に小さくない場合、顕著な
パルス応答特性の劣化をもたらす。例えば素子の大きさ
を300pm角とした場合、実施例中の第一のバッファ
層2及びZn拡散領域10がない従来構造の素子におい
ては、電極形成層、クラッド層、活性層の拡がシ抵抗は
29Ω、周辺に畜生するpn接合容量は490PFとな
る。一方、発光部の動作インピーダンスは順方同電流1
mAにおいて26Ωであり、又、寄生アドミッタンスの
時定数が14ns であることから、パルス変調時の応
答立上シ時間の著しい劣化をもたらし、変調速度は50
Mb/s lit度が限界となる。この応答の劣化は発
光部のリモート接合形成を防止するため、第二のバッフ
ァ層の不純物濃度を高くしだために生じたものであるこ
とから本発明は周辺部のpn接合の位置を周辺部のZn
拡散によシ第二のバッファ層の下に設けられた不純物濃
度の低い第一のバッファ層中へ移動させることによシ周
辺に寄生するpn接合容量の低減化をはかったものであ
る。即ち、実施例に示す構造においては拡がシ抵抗は2
0Ω、周辺に寄生する容量はll0PFとなシ、高周波
域における寄生アドミッタンスの値が小さくなるととも
に、その時定数も2.2nsと短縮される。従って、パ
ルス変調時の応答立上り時間の劣化はわずかであシ、1
50M b/s程度までの高速変調が可能な面発光型発
光ダイオードが得られる。
In high-speed pulse modulation of a surface-emitting light emitting diode, if the parasitic admittance value in the peripheral area is not sufficiently small compared to the admittance value of the light emitting part, and its time constant is not sufficiently small compared to the modulation pulse period, This results in significant deterioration of pulse response characteristics. For example, when the size of the device is 300 pm square, in the device of the conventional structure without the first buffer layer 2 and the Zn diffusion region 10 in the example, the expansion resistance of the electrode formation layer, cladding layer, and active layer is small. is 29Ω, and the surrounding pn junction capacitance is 490PF. On the other hand, the operating impedance of the light emitting part is the same forward current of 1
26 Ω at mA, and the time constant of parasitic admittance is 14 ns, which causes a significant deterioration of the response rise time during pulse modulation, and the modulation speed is 50 Ω.
Mb/s lit degree is the limit. This response deterioration is caused by increasing the impurity concentration of the second buffer layer in order to prevent the formation of remote junctions in the light emitting part. of Zn
The purpose is to reduce the parasitic pn junction capacitance around the impurity by moving the impurity into the first buffer layer, which is provided under the second buffer layer and has a low impurity concentration, by diffusion. That is, in the structure shown in the example, the expansion resistance is 2.
0Ω, the peripheral parasitic capacitance is 110PF, the value of the parasitic admittance in the high frequency range is reduced, and the time constant is also shortened to 2.2 ns. Therefore, there is only a slight deterioration in the response rise time during pulse modulation, and 1
A surface-emitting light emitting diode capable of high-speed modulation up to about 50 Mb/s can be obtained.

尚、半導体材料及び組成は上述の実施例に限定する必要
はなく、あらゆる組成のIN−V族化合物半導体に適用
可能である。ドーピング不別物、拡散不純物、電流狭T
層材別、あるいはn側電極材料、p 1111 ’m、
極材料も上述の実jfij例に限定する必要はない。特
に、電流狭窄層制料は絶縁膜に限らず、半導体層であっ
てもよい。又止流狭窄構造も本実施例に示した414造
に限らず逆バイアスされたpn接合など、あらゆる構造
が適用可能である。端面放射型発光ダイオードにも適用
可能である。さらに各層厚不純物濃度、電流注入部直径
、光取出し′g面径、Zn拡散領域の位置及び深さの値
も、いかなる数値をとってもよい。
Note that the semiconductor material and composition need not be limited to the above-mentioned embodiments, and can be applied to IN-V group compound semiconductors of any composition. Doping substances, diffusion impurities, current narrow T
By layer material or n-side electrode material, p 1111'm,
The pole materials also need not be limited to the above-mentioned examples. In particular, the current confinement layer material is not limited to an insulating film, but may be a semiconductor layer. Further, the flow stop constriction structure is not limited to the 414 structure shown in this embodiment, but any structure such as a reverse biased pn junction can be applied. It is also applicable to edge-emitting light emitting diodes. Furthermore, the values of the impurity concentration in each layer thickness, the diameter of the current injection part, the diameter of the light extraction 'g surface, and the position and depth of the Zn diffusion region may take any values.

最後に、本発明が有する特徴を要約すれは、周辺部のp
n接合の位置を周辺部の不純物拡散により、不純物濃度
の高い第二のバッファ層の下に設けられた不純物濃度の
低い第一のノ(ソファ層中へ移動させることによシ、発
光部のリモート接合形成を防止しつつ、周辺に寄生する
21機合容量を低減した高速応答可能な発光ダイオード
が得られることである。
Finally, to summarize the features of the present invention, the peripheral p
By moving the position of the n-junction into the first buffer layer (sofa layer) with a low impurity concentration provided under the second buffer layer with a high impurity concentration by impurity diffusion in the peripheral region, It is possible to obtain a light-emitting diode capable of high-speed response, which reduces parasitic 21-mode capacitance around the periphery while preventing remote junction formation.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の一実施例の断面図である。図中、1は半導
体基板、2は第一のバッファ層、3は第二のバッファ層
、4は活性層、5はクラッド層、6は電極形成層、7は
電流狭7層、71は電流注入部、8はn側電極、81は
光取出し窓、9はP側電極、10はZn拡散領域である
。 院゛y友−J1り里1−[電流 茎・
The figure is a sectional view of one embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 2 is a first buffer layer, 3 is a second buffer layer, 4 is an active layer, 5 is a cladding layer, 6 is an electrode formation layer, 7 is a current narrowing layer 7, 71 is a current 8 is an n-side electrode, 81 is a light extraction window, 9 is a P-side electrode, and 10 is a Zn diffusion region. In-Yu-J1 Ri-ri 1-[Current Stem/

Claims (1)

【特許請求の範囲】[Claims] 一導篭型を有する半導体基板上に該半導体基板と同一導
電型を有する第一のバッファ層、前記半導体基板と同一
導電型を有する第二のバッファ層、活性層、前記半導体
基板と反対導電型を有するクラッド層及び電流注入部を
含む電流狭窄層が構成され、前記第一のバッファ層の不
純物濃度が前記第二のバッファ層の不純物濃度よりも低
く、前記電流性入部周辺に位置する前記活性層及び前記
第二のバッファ層に前記半導体基板と反対導電型の不純
物が導入されていることを特徴とする発光ダイオード。
A first buffer layer having the same conductivity type as the semiconductor substrate on a semiconductor substrate having a conductive cage type, a second buffer layer having the same conductivity type as the semiconductor substrate, an active layer, and a conductivity type opposite to the semiconductor substrate. a current confinement layer including a cladding layer and a current injection part, the impurity concentration of the first buffer layer is lower than the impurity concentration of the second buffer layer, and the active current injection part is located around the current injection part. A light emitting diode, wherein an impurity having a conductivity type opposite to that of the semiconductor substrate is introduced into the layer and the second buffer layer.
JP58112034A 1983-06-22 1983-06-22 Light emitting diode Pending JPS604278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58112034A JPS604278A (en) 1983-06-22 1983-06-22 Light emitting diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58112034A JPS604278A (en) 1983-06-22 1983-06-22 Light emitting diode

Publications (1)

Publication Number Publication Date
JPS604278A true JPS604278A (en) 1985-01-10

Family

ID=14576348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58112034A Pending JPS604278A (en) 1983-06-22 1983-06-22 Light emitting diode

Country Status (1)

Country Link
JP (1) JPS604278A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01161781A (en) * 1987-12-17 1989-06-26 Mitsubishi Electric Corp Optical device
US5105234A (en) * 1988-11-29 1992-04-14 U.S. Philips Corporation Electroluminescent diode having a low capacitance

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01161781A (en) * 1987-12-17 1989-06-26 Mitsubishi Electric Corp Optical device
US5105234A (en) * 1988-11-29 1992-04-14 U.S. Philips Corporation Electroluminescent diode having a low capacitance

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