JPS58700B2 - Frequency conversion method of 4-phase differential PSK wave by frequency multiplication - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency conversion system for four-phase differential PSK signals for multiplex wireless communications and the like.

Conventional systems of this kind were configured to obtain the desired frequency by mixing with a local oscillation frequency, and had the disadvantage of requiring an expensive local oscillation circuit or frequency mixing circuit.

The present invention is characterized by a combination of a frequency multiplier and a differential logic circuit, and its purpose is to convert the frequency without reversing the phase change by using a differential logic circuit that anticipates the reversal of the phase change due to the multiplication order. There is something to do.

The four-phase differential PSK wave normally changes the phase of the carrier wave by (n = 0, 1, 2, 3) according to the change in input information, but when this PSK wave is multiplied by an even number, the information changes. It will be lost.

The phase state when multiplied by an odd number order is (m=1.2.3,...), and when m=even number, that is, the multiplication order is 5°9.
13. ..., the phase state is the state before multiplication π/
It remains 2×n.

Also, when m = odd number, that is, the multiplication order is 3, 7, 11
．． The change in phase when ... is n = 0, 1, 2 before multiplication
, 3, when m is an even number, it changes to 0°π, whereas it is reversed to 0°π.

Figures 1a and 1b illustrate the above-mentioned phase changes, and Figure 1a shows the multiplication orders of 5, 9, 13, . ....

41+1. ..., (l = 1, 2, 3...), the change in the phase state after multiplication is shown by an arrow when the phase state before multiplication changes to . The multiplication order is 3, 7, 11. ....

41-1, . . . (7=1.2, 3, . . . ).

FIG. 2 shows an embodiment of the present invention, in which 1 is a modulation signal input terminal, 2 is a carrier wave oscillator (carrier frequency fT/N), 3 is a differential logic circuit, 4 is a 4-phase PSK modulator, and 5 is a frequency multiplier. vessel(
6 is an output terminal.

In general, in wireless PSK signal communication, fluctuations in the phase state between transmission and reception are unavoidable due to fading and other causes. An output signal (hereinafter referred to as a modulated input signal) is generated as follows.

In other words, the i-th modulator input signal is generated by adding the i-1-th modulator input signal 1 bit earlier to the i-th modulation signal (differential logic circuit input signal), and in this method, this is converted to a certain phase. It corresponds to the situation.

The differential logic circuit 3 described above performs such logic processing, but in this method, the differential logic circuit 3 is also provided with a function to prevent phase reversal based on the multiplication order N of the frequency multiplier 5. ing.

The operation of the circuit of the embodiment shown in FIG. 2 is such that the digital signal inputted from the modulation signal input terminal 1 is subjected to logical processing in the differential logic circuit 3 according to the multiplication order N of the frequency multiplier 5.

That is, the multiplication order N is 41+1. (l=1.2,3.・
), as shown in FIG. =yi
Logical processing is performed to obtain the relationship -yi-1.

Also, the multiplication order N is 41-1, (l=1, 2, 3,...
), as shown in Figure 3, the intermediate output signal z
The difference between i and the output signal zi-1 one bit before itself is the signal string (zi) corresponding to the input signal xi, which is logically processed once, and then this signal string (zi) is the modulator input signal string. The differential logic circuit output signal sequence (yi) is logically processed into a relationship that is connected by the true value shown in Table 1.

That is, this is a logical process for converting a signal sequence (zi) into a signal sequence (yi) or for correcting phase inversion based on the multiplication order.

In this way, the signal sequence (yi) converted by the differential logic circuit 3 is input to the 4-phase PSK modulator 4, which modulates the output of the carrier wave oscillator 2, and is transmitted to the output terminal 6 by the frequency multiplier 5.
appears as a signal at the required transmission frequency.

As explained above, since it is a frequency conversion method for 4-phase PSK signals that associates the multiplication order and differential logic processing, it does not require the use of expensive local oscillators or frequency mixing circuits.
Furthermore, there is an advantage that the same modulator can be used for different radio frequency bands by changing the multiplication order.

[Brief explanation of the drawing]

A and b in Fig. 1 are explanatory diagrams showing the phase relationship according to the multiplication order of the 4-phase differential PSK wave, Fig. 2 is a configuration diagram of an embodiment of the present invention, and a and b in Fig. 3 are shown in Fig. 2. FIG. 2 is an explanatory diagram of a differential logic circuit. 1...Modulation signal input terminal, 2...Carrier wave oscillator, 3...Differential logic circuit, 4...
・4-phase PSK modulator, 5... Frequency multiplier, 6
...Output terminal.

Claims (1)

[Claims] 1. Equipped with a carrier wave oscillator, a 4-phase PSK modulator, 2 frequency multipliers, and a differential logic circuit, and when converting the frequency of a 4-phase differential PSK wave by the frequency multiplier, the multiplication order is 4.
1+1. However, when the relationship of 1=1.2°3... is selected, the input signal string from the modulation signal input terminal (Xi
) and the output signal string (yi) of the differential logic circuit corresponding to the input signal string of the four-phase PSK modulator are subjected to logic processing having the relationship xi=yi-yi-1 by the differential logic circuit. and then set the multiplication order to 41-1. However, 1=1,2.3
When selecting the relationship .
A signal string (zi) corresponding to logic processing having the relationship is obtained, and this signal string (zi) and the output signal string (yi) of the differential logic circuit correspond to 0.1 and 2.3 of zi. Then yi is 0
, 3, 2, and 1 using the differential logic circuit to correct phase reversal based on the multiplication order.