JPS5866155A - 集積回路装置 - Google Patents

集積回路装置

Info

Publication number
JPS5866155A
JPS5866155A JP56165325A JP16532581A JPS5866155A JP S5866155 A JPS5866155 A JP S5866155A JP 56165325 A JP56165325 A JP 56165325A JP 16532581 A JP16532581 A JP 16532581A JP S5866155 A JPS5866155 A JP S5866155A
Authority
JP
Japan
Prior art keywords
storage device
output
gate
circuit
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56165325A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0155504B2 (cs
Inventor
Fumio Kudo
工藤　文男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56165325A priority Critical patent/JPS5866155A/ja
Publication of JPS5866155A publication Critical patent/JPS5866155A/ja
Publication of JPH0155504B2 publication Critical patent/JPH0155504B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/002—Specific input/output arrangements not covered by G06F3/01 - G06F3/16

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)
JP56165325A 1981-10-16 1981-10-16 集積回路装置 Granted JPS5866155A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56165325A JPS5866155A (ja) 1981-10-16 1981-10-16 集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56165325A JPS5866155A (ja) 1981-10-16 1981-10-16 集積回路装置

Publications (2)

Publication Number Publication Date
JPS5866155A true JPS5866155A (ja) 1983-04-20
JPH0155504B2 JPH0155504B2 (cs) 1989-11-24

Family

ID=15810181

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56165325A Granted JPS5866155A (ja) 1981-10-16 1981-10-16 集積回路装置

Country Status (1)

Country Link
JP (1) JPS5866155A (cs)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6195446A (ja) * 1984-10-17 1986-05-14 Matsushita Electric Ind Co Ltd 論理回路

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5268341A (en) * 1975-12-01 1977-06-07 Intel Corp Mos digital computer
JPS56127530U (cs) * 1980-02-21 1981-09-28

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5268341A (en) * 1975-12-01 1977-06-07 Intel Corp Mos digital computer
JPS56127530U (cs) * 1980-02-21 1981-09-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6195446A (ja) * 1984-10-17 1986-05-14 Matsushita Electric Ind Co Ltd 論理回路

Also Published As

Publication number Publication date
JPH0155504B2 (cs) 1989-11-24

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