JPS5864862A - Digital audible tone generating circuit - Google Patents
Digital audible tone generating circuitInfo
- Publication number
- JPS5864862A JPS5864862A JP16379481A JP16379481A JPS5864862A JP S5864862 A JPS5864862 A JP S5864862A JP 16379481 A JP16379481 A JP 16379481A JP 16379481 A JP16379481 A JP 16379481A JP S5864862 A JPS5864862 A JP S5864862A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- signal tone
- audible
- intermittent
- tone
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q1/00—Details of selecting apparatus or arrangements
- H04Q1/18—Electrical details
- H04Q1/30—Signalling arrangements; Manipulation of signalling currents
- H04Q1/44—Signalling arrangements; Manipulation of signalling currents using alternate current
- H04Q1/444—Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies
- H04Q1/45—Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies using multi-frequency signalling
- H04Q1/457—Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies using multi-frequency signalling with conversion of multifrequency signals into digital signals
- H04Q1/4575—Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies using multi-frequency signalling with conversion of multifrequency signals into digital signals which are transmitted in digital form
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Devices For Supply Of Signal Current (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は自動交換機のディジタル可聴音発生回路に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital audible tone generation circuit for an automatic switchboard.
従来のディジタル可聴音発生回路では、可聴音の断続間
隔は固定されており、また断続間隔と可聴音の組合せも
各タイムスロットに対して一意に定まっており融通性に
欠けるものであった。In conventional digital audible sound generation circuits, the intermittent interval of audible sound is fixed, and the combination of intermittent interval and audible sound is uniquely determined for each time slot, resulting in lack of flexibility.
本発明の目的は、上記欠点を除き、書き換え可能な記憶
装置を設けることKより、任意のタイムスロッ)におい
て任意の可聴音を任意の断続間隔で発生することを可能
とした融通性のあるディジタル可聴音発生回路を提供す
ることにある。An object of the present invention is to eliminate the above-mentioned drawbacks, and to provide a rewritable storage device, which is a flexible digital memory device that makes it possible to generate any audible sound at any intermittent interval in any time slot. The object of the present invention is to provide an auditory sound generation circuit.
本発11によるディジタル可聴音発生回路は、可聴信号
音がディジタル時分割多重されて通話路に供給される自
動交換機において、可聴信号音な構成するに必要な連続
信号音を少くとも1種類以上ディジタル符号化された形
で記憶している第1の記憶装置(以下、可聴音メモリと
称す)、前記可聴音メモリから読み出される連続信号音
の断続制御情報な少くとも1種類以上記憶する第2の記
憶装置(以下、断続情報メモリと称す)、前記連続信号
音と前記断続制御情報との組合せ選択情報を、可聴信号
前を時分割多重するタイムスロッF番号に対応する番地
に記憶する第3の記憶装置(以下、組合せ選択情報メモ
リと称す)を設け、可聴信号前を時分割多重する諌タイ
ムスロット毎に、前記組合せ選択情報メモリにより選択
される前記可聴音メモリの連続信号音と前記断続情報メ
モリの断続制御情報とを読み出し、該2情報を組合せる
ととKより所要の可聴信号前を発生するようにしたもの
である。前記第1.第2.第3の記憶装置は、記憶する
情報を任意に設定することが可能であり、かつ、再設定
が可能であるので融通性のあるディジタル可聴音発生回
路生構成することができる。The digital audible tone generation circuit according to the present invention 11 is capable of digitally generating at least one type of continuous signal tone necessary to construct an audible signal tone in an automatic switching system in which audible signal tones are digitally time-division multiplexed and supplied to a communication line. A first storage device (hereinafter referred to as an audible sound memory) that stores information in encoded form, and a second storage device that stores at least one type of intermittent control information for continuous signal sounds read from the audible sound memory. a storage device (hereinafter referred to as an intermittent information memory), a third memory that stores combination selection information of the continuous signal tone and the intermittent control information at an address corresponding to a time slot F number for time-division multiplexing the front of the audible signal; A device (hereinafter referred to as a combination selection information memory) is provided, and the continuous signal tone of the audible sound memory selected by the combination selection information memory and the intermittent information memory are provided for each time slot for time-division multiplexing the audio signal front. The intermittent control information is read out and the two pieces of information are combined to generate a desired audible signal. Said 1st. Second. Since the third storage device can arbitrarily set the information to be stored and can be reset, it can be configured as a flexible digital audible sound generation circuit.
次に本発明の実施例を図面を用いて説明する。Next, embodiments of the present invention will be described using the drawings.
図面は1本発明の一実施例であり、(n+1)11類の
連続信号音と(m+1)種類の断続制御情報を記憶し、
並列8ビツトの可@信号音を発生するディジタル可聴音
発生回路な示した図である。The drawing shows an embodiment of the present invention, which stores (n+1) 11 types of continuous signal tones and (m+1) types of intermittent control information,
1 is a diagram illustrating a digital audible sound generation circuit that generates a parallel 8-bit signal sound; FIG.
この図において、クロック発生回路10よりクロツタな
受け、カウンタ回路20が動作するととKより、可聴音
メモリ40より(n+1 )種類の連続信号音が読出さ
れ、クロック発生回路10からのりpツクに同期してバ
ッファレジスタ70〜7r%に一時記憶される。また断
続情報メモリ50もカウンタ回路20により読み出され
、Cm+1)種類の断続制御情報が信号線200〜20
mK出力される。一方1組合せ選択情報メモ960は漣
イムスロット番号指定回路30の出力により読み出され
、連続音選択信号を信号線300に、断続制御情報選択
信号を信号線400にそれぞれ出力する。連続音選択回
路90〜97は信号線30Gより連続音選択信号を受け
て(n+1 )種類の連続信号音のうちから1つを選択
して出力し、断続制御情報選択回路80は、信号線40
0より断続制御情報選択信号を受け、信号線200〜2
0mより入力する断続制御情報のうちから1つを選択し
て出力する。連続音断続回路100〜107では連続音
選択回路90〜97より入力する連続信号音を断続制御
情報選択回路80より受けた断続制御情報により断続し
て出力する。In this figure, when the clock generation circuit 10 receives a clock signal and the counter circuit 20 operates, (n+1) types of continuous signal tones are read out from the audible sound memory 40 and are synchronized with the clock signal output from the clock generation circuit 10. and is temporarily stored in buffer registers 70 to 7r%. The intermittent information memory 50 is also read out by the counter circuit 20, and Cm+1) types of intermittent control information are stored on the signal lines 200 to 20.
mK is output. On the other hand, the one combination selection information memo 960 is read out by the output of the slot number designation circuit 30, and outputs a continuous tone selection signal to the signal line 300 and an intermittent control information selection signal to the signal line 400, respectively. The continuous sound selection circuits 90 to 97 receive the continuous sound selection signal from the signal line 30G, select one from (n+1) types of continuous signal sounds, and output it.
0 to receive an intermittent control information selection signal, signal lines 200 to 2
One of the intermittent control information input from 0m is selected and output. The continuous sound intermittent circuits 100 to 107 output continuous signal sounds input from the continuous sound selection circuits 90 to 97 intermittently based on the intermittent control information received from the intermittent control information selection circuit 80.
以上の動作が可聴信号音を時分割多重する各タイムス1
ly)において行われる。The above operation is performed for each time 1 time division multiplexing of audible signal tones.
ly).
以上の説明により明らかなように第1.第2゜第3の記
憶装置の情報を任意に設定可能とすることにより、任意
のタイムスロットにおいて任意の可聴青な任意の断続間
隔で発生することができ。As is clear from the above explanation, the first. By making it possible to set the information in the second and third storage devices arbitrarily, it is possible to generate an audible blue signal at an arbitrary intermittent interval in an arbitrary time slot.
融通性のあるディジタル可聴音発生回路が得られる。A flexible digital audible sound generation circuit is obtained.
図面は本発明の一実施例に係るディジタル可聴音発生回
路を示した図である。
10−り田ツク発生回路、
20−カウンタ回路、
30−タイムスロット番号指定回路。
40−可聴音メモリ(第1の記憶装置)。
50−断続情報メモリ(第2の記憶装置)、60−組合
せ選択情報メモリ
(第3の記憶装置)。
70〜7n−・・バッファレジスタ。
80・・・断続制御情報選択回路。
90〜97−・連続音選択回路。
100〜IG7−・連続信号前断続回路。
代理人 弁理士 染 川 利 盲The drawing is a diagram showing a digital audible sound generation circuit according to an embodiment of the present invention. 10-Ritatsuku generation circuit, 20-Counter circuit, 30-Time slot number designation circuit. 40 - Audible tone memory (first storage). 50-intermittent information memory (second storage device), 60-combination selection information memory (third storage device). 70 to 7n--Buffer register. 80...Intermittent control information selection circuit. 90-97-・Continuous sound selection circuit. 100~IG7-・Continuous signal front intermittent circuit. Agent Patent Attorney Toshi Somekawa Blind
Claims (1)
される自動交換機において、前記可聴信号音を構成する
に必要な連続信号青な少くとも1種類以上ゲイジタル符
号化された形で記憶している第1の記憶装置と、前記第
1の記憶装置から読み出される連続信号音の断続制御情
報を少くとも1種類以上記憶する第2の記憶装置と、前
記連続信号音と前記断続制御情報の組合(選択情報を。 前記可聴信号音を時分割多重するタイムスロット番号に
対応する番地に記憶する第3の記憶装置とを設け、前記
可聴信号音を時分割多重するタイムスーット4IK前記
第3の記憶装置により選択される前記第1の記憶装置の
連続信号音と前記第2の記憶装置の断続制御情報とを読
み出し、#2情騙を鳳み合わせることにより所要の可聴
信号音を発生することを特徴とするディジタル可聴音発
生回路。[Claims] In an automatic switching system in which an audible signal tone is digitally time-division multiplexed and supplied to a communication path, at least one type of continuous signal blue necessary to constitute the audible signal tone is gay-digitally encoded. a first storage device that stores at least one type of intermittent control information for the continuous signal tone read out from the first storage device; a third storage device that stores a combination of intermittent control information (selection information) at an address corresponding to a time slot number in which the audible signal tone is time-division multiplexed; The continuous signal tone of the first storage device selected by the third storage device and the intermittent control information of the second storage device are read out, and the desired audible signal tone is generated by combining #2. A digital audible sound generation circuit characterized by generating.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16379481A JPS5864862A (en) | 1981-10-14 | 1981-10-14 | Digital audible tone generating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16379481A JPS5864862A (en) | 1981-10-14 | 1981-10-14 | Digital audible tone generating circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5864862A true JPS5864862A (en) | 1983-04-18 |
JPS6332310B2 JPS6332310B2 (en) | 1988-06-29 |
Family
ID=15780822
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16379481A Granted JPS5864862A (en) | 1981-10-14 | 1981-10-14 | Digital audible tone generating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5864862A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6068761A (en) * | 1983-09-26 | 1985-04-19 | Oki Electric Ind Co Ltd | Digital signal oscillator |
JPS61107260U (en) * | 1984-12-17 | 1986-07-08 | ||
JPS62126759A (en) * | 1985-11-27 | 1987-06-09 | Nec Corp | Digital audible sound generation circuit |
JPS62222763A (en) * | 1986-03-20 | 1987-09-30 | Fujitsu Ltd | Tone transmission system |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51111324A (en) * | 1975-03-26 | 1976-10-01 | Nec Corp | Reserved sound generating apparatus |
-
1981
- 1981-10-14 JP JP16379481A patent/JPS5864862A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51111324A (en) * | 1975-03-26 | 1976-10-01 | Nec Corp | Reserved sound generating apparatus |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6068761A (en) * | 1983-09-26 | 1985-04-19 | Oki Electric Ind Co Ltd | Digital signal oscillator |
JPS61107260U (en) * | 1984-12-17 | 1986-07-08 | ||
JPS62126759A (en) * | 1985-11-27 | 1987-06-09 | Nec Corp | Digital audible sound generation circuit |
JPS62222763A (en) * | 1986-03-20 | 1987-09-30 | Fujitsu Ltd | Tone transmission system |
JPH0439260B2 (en) * | 1986-03-20 | 1992-06-29 |
Also Published As
Publication number | Publication date |
---|---|
JPS6332310B2 (en) | 1988-06-29 |
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